Signed-off-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com>

Signed-off-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com>

Signed-off-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com>

Previously the backlight code was called from IRQ context which isn't
allowed. This patch moves all the asle work into a work task which takes
care of the locking bug reported by users.

Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=64221Signed-off-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com>

The gma500 driver sets DRIVER_GEM unconditionally, so testing for the
absence of the feature will always fail.
Signed-off-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com>

We'll need this for our gem create ioctl in a later patch.
Signed-off-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com>

All of these ioctls are unused and most of them just duplicate what drm
already provides.
Signed-off-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com>

Signed-off-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com>

Properly init the MMU and add MMU entries when adding GTT entries
Signed-off-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com>

Right now, all we need to know about the blitter is that it's not doing
anything that can be messed up when fiddling with MMU mappings.
Signed-off-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com>

Signed-off-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com>

Add 2D blit status and MMU fault interrupts to the IRQ handler.
Signed-off-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com>

Old MMU code never wrote PDs or PTEs to any registers. Now we do, and
that's a good start.
Signed-off-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com>

Just move all fields into radeon_cs_reloc, removing unused/duplicated fields.
Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>

Not needed any more.
Signed-off-by: NChristian König <christian.koenig@amd.com>

Not needed any more.
Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>

No need to make it more complicated than necessary,
just allocate the page tables as normal BO and
flush whenever the address change.

v2: update comments and function name
v3: squash bug fixes, page directory and tables patch
v4: rebased on Mareks changes
Signed-off-by: NChristian König <christian.koenig@amd.com>

Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>

Both are complex enough on their own.
Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NChristian König <christian.koenig@amd.com>

Signed-off-by: NChristian König <christian.koenig@amd.com>

Signed-off-by: NMarek Olšák <marek.olsak@amd.com>
Reviewed-by: NChristian König <christian.koenig@amd.com>

Userspace should set the first 4 bits of drm_radeon_cs_reloc::flags to
a number from 0 to 15. The higher the number, the higher the priority,
which means a buffer with a higher number will be validated sooner.

The old behavior is preserved: Buffers used for write are prioritized over
read-only buffers if the userspace doesn't set the number.

v2: add buffers to buckets directly, then concatenate them
v3: use a stable sort
Signed-off-by: NMarek Olšák <marek.olsak@amd.com>
Reviewed-by: NChristian König <christian.koenig@amd.com>

Signed-off-by: NMarek Olšák <marek.olsak@amd.com>
Reviewed-by: NChristian König <christian.koenig@amd.com>

Signed-off-by: NMarek Olšák <marek.olsak@amd.com>
Reviewed-by: NChristian König <christian.koenig@amd.com>

The statistics are:
- VRAM usage in bytes
- GTT usage in bytes
- number of bytes moved by TTM

The last one is actually a counter, so you need to sample it before and after
command submission and take the difference.

This is useful for finding performance bottlenecks. Userspace queries are
also added.

v2: use atomic64_t
Signed-off-by: NMarek Olšák <marek.olsak@amd.com>
Reviewed-by: NChristian König <christian.koenig@amd.com>

When passing buffers between processes, the receiving process needs to know
the original buffer domain, so that it doesn't accidentally move the buffer.

v2: reserve the buffer
Signed-off-by: NMarek Olšák <marek.olsak@amd.com>
Reviewed-by: NChristian König <christian.koenig@amd.com>

Now that Christian fixed the performance problems with
the feedback buffer in mesa, we can enable variable UVD
clocks.  There are multiple UVD power states associated
with different types and numbers of streams.  This uses
the appropriate state based on that information rather
than always using the fastest UVD clocks which saves some
power.  One possible downside is that this may adversely
affect decode benchmarks since these power states target
specific playback requirements rather than maximum
performance.  If that becomes an issue, we can add a
sysfs attribute to force the max UVD state.
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: NChristian König <christian.koenig@amd.com>

We no longer need to take the ring lock while checking for
a gpu lockup, so just cleanup the code.
Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>

Use atomics and jiffies_64, so that we don't need to have the
ring mutex locked any more and avoid wrap arounds.

v2: fix some checkpatch warnings
Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>

Implements an I2C-over-AUX I2C adapter on top of the generic drm_dp_aux
infrastructure. It extracts the retry logic from existing drivers, which
should help in porting those drivers to this new helper.
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: NJani Nikula <jani.nikula@intel.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>
---
Changes in v5:
- move comments partially to to header file
- keep MOT set between I2C messages
- return -EPROTO on short reads

Changes in v4:
- fix typo "bitrate" -> "bit rate"

Changes in v3:
- add back DRM_DEBUG_KMS and DRM_ERROR messages
- embed i2c_adapter within struct drm_dp_aux
- fix typo in comment

Add a helper to probe a DP link (read out the supported DPCD revision,
maximum rate, link count and capabilities) as well as power up the DP
link and configure it accordingly.
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: NJani Nikula <jani.nikula@intel.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>
---
Changes in v5:
- export helpers

Changes in v4:
- fix a couple of typos in comments as pointed out by Alex Deucher

Changes in v3:
- split into drm_dp_link_power_up() and drm_dp_link_configure()
- do not change sink state for DPCD versions earlier than 1.1
- sleep for 1-2 ms after setting local sink to D0 state
- read and write consecutive registers where possible
- read DPCD revision when link is probed
- remove duplicate kerneldoc

The function reads the link status (6 bytes starting at offset 0x202)
from the DPCD so that it can be conveniently passed to other DPCD
helpers.
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: NJani Nikula <jani.nikula@intel.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

This is a superset of the current i2c_dp_aux bus functionality and can
be used to transfer native AUX in addition to I2C-over-AUX messages.

Helpers are provided to read and write the DPCD, either blockwise or
byte-wise. Many of the existing helpers for DisplayPort take a copy of a
portion of the DPCD and operate on that, without a way to write data
back to the DPCD (e.g. for configuration of the link).

Subsequent patches will build upon this infrastructure to provide common
functionality in a generic way.
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: NJani Nikula <jani.nikula@intel.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>
---
Changes in v5:
- move comments partially to struct drm_dp_aux_msg in header file
- return -EPROTO on short reads in DPCD helpers

Changes in v4:
- fix a typo in a comment

Changes in v3:
- reorder drm_dp_dpcd_writeb() arguments to be more intuitive
- return number of bytes transferred in drm_dp_dpcd_write()
- factor out drm_dp_dpcd_access()
- describe error codes

This reverts commit d8a5dc30.

This breaks plymouth installs, either because plymouth is using the file
"incorrectly" or because the patch is incorrect.  Either way, this needs
to be reverted until it is all figured out.
Reported-by: NJosh Boyer <jwboyer@fedoraproject.org>
Reported-by: NRay Strode <halfline@gmail.com>
Cc: Lennart Poettering <lennart@poettering.net>
Cc: Kay Sievers <kay@vrfy.org>
Cc: Jiri Slaby <jslaby@suse.cz>
Cc: David Herrmann <dh.herrmann@gmail.com>
Cc: Werner Fink <werner@suse.de>
Cc: Hannes Reinecke <hare@suse.de>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

This fixes bug introduced in 667a6b7a (regulator: max14577: Add missing
of_node_put). The DTS parsing function returned number of matched
regulators as success status which then was compared against 0 in probe.

Result was a probe fail after successful parsing the DTS:
max14577-regulator: probe of max14577-regulator failed with error 2
Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Reviwed-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NMark Brown <broonie@linaro.org>

Enabling SPARSE_IRQ shows up a bug in the irq-orion bridge interrupt
handler. The bridge interrupt is implemented using a single generic
chip. Thus the parameter passed to irq_get_domain_generic_chip()
should always be zero.
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Acked-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Fixes: 9dbd90f1 ("irqchip: Add support for Marvell Orion SoCs")
Cc: <stable@vger.kernel.org> # v3.11+
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

ENDPTFLUSH and ENDPTPRIME registers are set by software and clear
by hardware. There is a bit for each endpoint. When we are setting
a bit for an endpoint we should make sure we do not touch other
endpoint bit. There is a race condition if the hardware clear the
bit between the read and the write in hw_write.

Cc: stable <stable@vger.kernel.org> # 3.11+
Signed-off-by: NPeter Chen <peter.chen@freescale.com>
Signed-off-by: NMatthieu CASTET <matthieu.castet@parrot.com>
Tested-by: NMichael Grzeschik <mgrzeschik@pengutronix.de>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

The change (008fa749) that moved the
node release code to a separate function broke death notifications in
some cases. When it encountered a reference without a death
notification request, it would skip looking at the remaining
references, and therefore fail to send death notifications for them.

Cc: Colin Cross <ccross@android.com>
Cc: Android Kernel Team <kernel-team@android.com>
Cc: stable <stable@vger.kernel.org> # 3.10
Signed-off-by: NArve Hjønnevåg <arve@android.com>
Signed-off-by: NJohn Stultz <john.stultz@linaro.org>
Signed-off-by: NJeremy Compostella <jeremy.compostella@intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Most WDT driver modules return ENODEV during modprobe if
no valid device was found, but w83697hf_wdt returns EIO.

Let w83697hf_wdt return ENODEV.
Signed-off-by: NStanislav Kholmanskikh <stanislav.kholmanskikh@oracle.com>
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>