This patch adds ethernet support to the LPC32xx ARM architecture. The actual
driver in drivers/net is contained in a separate patch.
Signed-off-by: NRoland Stigge <stigge@antcom.de>
Acked-by: NArnd Bergmann <arnd@arndb.de>

This patch adds OHCI support to the LPC32xx ARM platform. Besides the trivial
addition of platform "usb-ohci" support, fixes for the USB PLL have been added
to arch/arm/mach-lpc32xx/clock.c, ported from NXP's lpclinux.com.

(This is the mach-lpc32xx specific part, the USB subsystem specific changes are
in a separate patch for the USB maintainers.)
Signed-off-by: NRoland Stigge <stigge@antcom.de>

Thomas Arbrahams's patchset have changed the device name in sdhci-s3c.c
(mmc: sdhci-s3c: Rework platform data and add device tree support)
But didn't change the regulator_consumer name.
So maybe didn't initialize the mmc/sd card for exynos4.

This patch is fixed that (based-on linux-samsung for-next branch)
Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Nkyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

In mmc, there are capabilities and use the host_caps.
That capability is expressed with bit[0:31].
But now..already filled the bit[0:31]...
so we need to denote with the other capability field.
(if we want to use the cache, powerclass, etc for eMMC..
 this field is necessary)
Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NKyungmin Park <Kyungmin.park@samsung.com>
Acked-by: NChris Ball <cjb@laptop.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds support for V4L2 video display to DM6446 EVM.

Support for SD and ED modes is provided, along with composite
and component outputs.
Signed-off-by: NManjunath Hadli <manjunath.hadli@ti.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Add functions to register various video devices like venc, osd,
vpbe and the v4l2 display driver for dm644x.

Change dm644x_init_video() to make room for display related
configuration. Register the vpfe or vpbe devices only if valid
display configuration is provided to make sure boards without
video support dont erroneously register video devices.
Signed-off-by: NManjunath Hadli <manjunath.hadli@ti.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Signed-off-by: NBoojin Kim <boojin.kim@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Amba core assumes the pclk to be named as apb_pclk. During device probe,
it tries to get that clock and enable that. When PM_RUNTIME is enabled,
dma clock is not explicitly enabled in pl330_probe, which causes device
probe to fail. Adding a clkdev entry for apb_pclk for mdma1 fixes the
problem.

This patch fixes following runtime error.

dma-pl330 dma-pl330.2: PERIPH_ID 0x0, PCELL_ID 0x0 !
dma-pl330: probe of dma-pl330.2 failed with error -22
Signed-off-by: NTushar Behera <tushar.behera@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds MDMA platform data and enables
MDMA for DMA memcpy operation for EXYNOS SoCs.
Signed-off-by: NBoojin Kim <boojin.kim@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

EXYNOS4212/4412 memory bus devfreq driver requires some register
addresses that were not defined with EXYNOS4210 support.
This patch adds the required register addresses and shift/mask data.
Signed-off-by: NMyungJoo Ham <myungjoo.ham@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NJaecheol Lee <jc.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch changes prefix of the clk register from S5P_ to
EXYNOS4_ for new EXYNOS SoCs such as EXYNOS5 and adds prefix
exynos4_ on clk declarations.
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch uses static declaration struct which is not
used in other file and re-arrange with group in header
file.
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch changes the name of clock.c to clock-exynos4.c for other
EXYNOS series such as EXYNOS5. And since the header file of clock
is used only in arch/arm/mach-exynos, moves it in the local directory.
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add JPEG power domain (PD) to generic power domain infrastructure.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add G2D power domain (PD) to generic power domain infrastructure.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The bq24022 on these machines is a very simple regulator using gpios.
One provides the on/off functionality and a second one is used to
change the current between 100 and 500 mA.

This functionality can also be provided by the more generic gpio-regulator.

Therefore convert both machines which makes it possible to remove the
bq24022 driver later on.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
Tested-by: NPaul Parsons <lost.distance@yahoo.com>
Signed-off-by: NHaojian Zhuang <haojian.zhuang@gmail.com>

Fix the code to correctly use IS_ERR and PTR_ERR on the return
values pointers
Reported-by: NSergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: NJean Pihet <j-pihet@ti.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

The debugfs_create_* API returns a return code or NULL
in the return ptr in case of problem.
Fix the smartreflex code to take this into account.
Signed-off-by: NJean Pihet <j-pihet@ti.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

val && (val != 1) == val > 1
Signed-off-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NJean Pihet <j-pihet@ti.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

There are no functional changes here, only misc cleanups in general:
- re-organize variable declarations,
- converting if {} else if {} else {} into switch statements,
- correct comments typos,
- add/remove white lines to improve readability,
- etc.
Signed-off-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NJean Pihet <j-pihet@ti.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

no functional changes, trivial patch.
Signed-off-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NJean Pihet <j-pihet@ti.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

That's very useful to fetch the correct struct sr_info
from the PM handlers.
Signed-off-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NJean Pihet <j-pihet@ti.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

Add OMAP3 SmartReflex IRQs in hwmod structures. Without these IRQs
being registered the SmartReflex driver will be unable to get the
IRQ numbers to handle notifications.
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NJean Pihet <j-pihet@ti.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

The VPBOUNDINTST field of the ERRCONFIG register has an additional
functional meaning of force clearing the SR internal signal with VP
(sr_interruptz).
This can result in scenarios where the VP->SR protocol is violated
because the SR internal signal with VP is already high and VP will
never clear the vpirqclr signal.
Therefore during the next force update to reset to nominal voltage,
VP cannot pulse vpirqclr, so the PRCM HW cannot generate the tranxdone
IRQ and the situation is not recoverable until a cold reset is invoked.

To prevent this situation, check if status is set before clearing it
as this needs to be done only on a need basis.
Reported-by: NVincent Bour <v-bour@ti.com>
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NJean Pihet <j-pihet@ti.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

ERRCONFIG register has status bits that were intended not to
be destroyed by bad modification. We cleanup and simplify the
handling the status in the modify path.
Reported-by: NVincent Bour <v-bour@ti.com>
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NJean Pihet <j-pihet@ti.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

SmartReflex fix for erratum ID i724.

Since OMAP's VP and PRM modules do not get reset by warm reset,
we should ensure that proper shutdown procedure is followed prior
to allowing the kernel to reboot back up.

Without this, Smartreflex module might be left active or
system might be caught in an indeterminate sequence when
software controlled reboot is triggered, leaving the next
reboot behavior to be unpredictable.

In the case of hardware controlled warm reset such as that
by watchdog timer, prevention of this scenario is not possible.
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NJean Pihet <j-pihet@ti.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

SmartReflex AVS Errorgen module supplies signals to Voltage
Processor. It is suggested that by disabling Errorgen module
before we disable VP, we might be able to ensure lesser
chances of race condition to occur in the system.
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NJean Pihet <j-pihet@ti.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

sr_modify_mask takes mask, value as parameters, the usage
currently is value, mask which is wrong, as a result
vpboundint_st which was supposed to have been disabled,
does not get disabled.
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NJean Pihet <j-pihet@ti.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

To set sr ntarget values for all volt_domain,
volt_table is retrieved by doing a look_up of 'vdd_name'
field from omap_hwmod but voltage domain pointer does not
belong to omap_hwmod and is not used anywhere else.
As a part of voltage layer and SR Layer clean up volt
pointer is removed from omap_hwmod and added in dev
attributes of SR. The value of the field must match
the voltage domain names for the binding to be effective.

Tested on OMAP3630 SDP, OMAP3530 Beagleboard and
OMAP4430 SDP Board.
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NShweta Gulati <shweta.gulati@ti.com>
Acked by: Nishanth Menon <nm@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: NJean Pihet <j-pihet@ti.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

It turned out that a performance counter on AMD does not
count at all when the GO or HO bit is set in the control
register and SVM is disabled in EFER.

This patch works around this issue by masking out the HO bit
in the performance counter control register when SVM is not
enabled.

The GO bit is not touched because it is only set when the
user wants to count in guest-mode only. So when SVM is
disabled the counter should not run at all and the
not-counting is the intended behaviour.
Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Avi Kivity <avi@redhat.com>
Cc: Stephane Eranian <eranian@google.com>
Cc: David Ahern <dsahern@gmail.com>
Cc: Gleb Natapov <gleb@redhat.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: stable@vger.kernel.org # v3.2
Link: http://lkml.kernel.org/r/1330523852-19566-1-git-send-email-joerg.roedel@amd.comSigned-off-by: NIngo Molnar <mingo@elte.hu>

The user may wish to set their own value (for real cross compiles).  Since the
top level Makefile initialises CROSS_COMPILE to empty by default, we must
check it for being empty (rather than for being defined) before we override.
Reported-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

Support rtc-sa1100 driver in pxa910.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>

sa1100-rtc driver could be shared among sa1100/pxa/mmp series silicon.
Since clk is used in mmp series silicon, add dummy clock support in
pxa also.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>

Add rtc clock support and clean clock support for gpio.
Signed-off-by: NJett.Zhou <jtzhou@marvell.com>
signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>

Avoid to hard coded irq in rtc-sa1100 driver since we could share
it among arch-sa1100/arch-pxa/arch-mmp.

We still keep hard coded register address since the requirement is
enabling both rtc-sa1100 and rtc-pxa driver. The register addresses
are conflict since they're only two wrappers on the same rtc device.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

This fixes the following compile error:

  CC      arch/arm/boot/compressed/misc.o
In file included from arch/arm/boot/compressed/misc.c:28:0:
arch/arm/mach-tegra/include/mach/uncompress.h: In function 'arch_decomp_setup':
arch/arm/mach-tegra/include/mach/uncompress.h:125:2: error: implicit declaration of function 'BUILD_BUG_ON_ZERO' [-Werror=implicit-function-declaration]
cc1: some warnings being treated as errors

This is due to use of the ARRAY_SIZE() macro. Typically, this would be
solved by including <linux/bug.h>, but the compressor code isn't part of
the kernel, and so should not include kernel headers. Instead, define
the few macros the code uses directly, and in a way that doesn't depend
on <linux/bug.h>.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Some of the LPC32XX_* macros were typed ("LCP32XX_*"), which is fixed by this
patch. (Besides another LCP doc typo.)

Further, the LPC32XX_GPIO_P2_MUX_SET/CLR/STATE macros were missing.
Signed-off-by: NRoland Stigge <stigge@antcom.de>

This patch fixes a wrong loop limit on UART init.
Signed-off-by: NRoland Stigge <stigge@antcom.de>
Cc: stable@vger.kernel.org

This patch fixes a HW bug by flushing RX FIFOs of the UARTs on init. It was
ported from NXP's git.lpclinux.com tree.
Signed-off-by: NRoland Stigge <stigge@antcom.de>
Cc: stable@vger.kernel.org