To standarize among other uarts (1 to 3), we shall now:

 - Enable uart4 autodile bit.
 - Enable uart4 wakeup in PER.
 - Allow uart4 to wakeup the MPU.
Signed-off-by: NSergio Aguirre <saaguirre@ti.com>
Signed-off-by: NGovindraj.R <govindraj.raja@ti.com>
Acked-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

Fix all of the remaining OMAP3 PRCM register shift/bitmask macros that
did not use the _SHIFT/_MASK suffixes to use them.  This makes the use
of these macros consistent.  It is intended to reduce error, as code
can be inspected visually by reviewers to ensure that bitshifts and
bitmasks are used in the appropriate places.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>

OMAP 3430 ES3.1 chips have a separate bit for IO daisy-chain
wake up enabling. It needs to be enabled when entering
retention or off state, otherwise waking up might not work
in all situations.
Signed-off-by: NKalle Jokiniemi <kalle.jokiniemi@digia.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

The OMAP3430ES2_SAVEANDRESTORE_SHIFT macro is used
by powerdomain code in
"1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT" manner, but
the definition was also (1 << 4), meaning we actually
modified bit 16. So the definition needs to be 4.

This fixes also a cold reset HW bug in OMAP3430 ES3.x
where some of the efuse bits are not isolated during
wake-up from off mode. This can cause randomish
cold resets with off mode. Enabling the USBTLL hardware
SAVEANDRESTORE causes the core power up assert to be
delayed in a way that we will not get faulty values
when boot ROM is reading the unisolated registers.
Signed-off-by: NKalle Jokiniemi <kalle.jokiniemi@digia.com>
Acked-by: NKevin Hilman <khilman@deeprootsystems.com>
Acked-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Signed-off-by: NJouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Add OMAP3-specific powerdomains.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

This patch adds register access for 34xx power and clock management.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>