- 18 4月, 2017 1 次提交
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由 Chopra, Manish 提交于
This patch adds necessary APIs to interface with qede aRFS support in successive patch. It also reserves separate PTT entry for aRFS, [as being in fastpath flow] for hardware access instead of trying to acquire it at run time from the ptt pool. Signed-off-by: NManish Chopra <manish.chopra@cavium.com> Signed-off-by: NYuval Mintz <yuval.mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 07 4月, 2017 10 次提交
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由 Michal Kalderon 提交于
No need to maintain the various open archipelagos as a list - The maximal number of them is known, and we can use the CID as key for random-access into the array. Signed-off-by: NMichal Kalderon <Michal.Kalderon@caviumc.om> Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Mintz, Yuval 提交于
Management firmware can query for some basic iSCSI-related statistics. Provide those just as we do for other protocols. Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Mintz, Yuval 提交于
Now that management firmware is capable of telling us the number of CQs available for a given PF, qed needs to communicate the number to qedi so it would know have many to use. Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Mintz, Yuval 提交于
Firmware provides a statistic for the number of out-of-order isles it used - fill it in the iscsi-related statistics. Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Mintz, Yuval 提交于
Before initializing the chip's engine, driver currently closes a set of registers on the HW's ingress flow to prevent packets from slipping in while they're not supposed to. This configuration is insufficient, as there are some scenarios where packets would still arrive even when said registers are set, but the management firmware already closes other per-port registers that do suffice, making this setting unnecessray. Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Tomer Tayar 提交于
Default HW configuration is optimal for an architecture where cache line size is 64B. During chip initialization, properly initialize the cache line size in HW to avoid possible redundant PCI transactions. Signed-off-by: NTomer Tayar <Tomer.Tayar@cavium.com> Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Rahul Verma 提交于
In order to access HW registers driver needs to acquire a PTT entry [mapping between bar memory and internal chip address]. Since acquiring PTT entries could fail [at least in theory] as their number is finite and other flows can hold them, we reserve special PTT entries for 'important' enough flows - ones we want to guarantee that would not be susceptible to such issues. One such special entry is the 'main' PTT which is meant to be used in flows such as chip initialization and de-initialization. However, there are other flows that are also using that same entry for their own purpose, and might run concurrently with the original flows [notice that for most cases using the main-ptt by mistake, such a race is still impossible, at least today]. This patch re-organizes the various functions that currently use the main_ptt in one of two ways: - If a function shouldn't use the main_ptt it starts acquiring and releasing it's own PTT entry and use it instead. Notice if those functions previously couldn't fail, they now can [as acquisition might fail]. - Change the prototypes so that the main_ptt would be received as a parameter [instead of explicitly accessing it]. This prevents the future risk of adding codes that introduces new use-cases for flows using the main_ptt, ones that might be in race with the actual 'main' flows. Signed-off-by: NRahul Verma <Rahul.Verma@cavium.com> Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Mintz, Yuval 提交于
PTT entries are per-hwfn; If some errneous flow is trying to use a PTT belonging to a differnet hwfn warn user, as this can break every register accessing flow later and is very hard to root-cause. Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Mintz, Yuval 提交于
When qedr is enabled, qed would try dividing the msi-x vectors between L2 and RoCE, starting with L2 and providing it with sufficient vectors for its queues. Problem is qed would also do that for storage partitions, and as those don't need queues it would lead qed to award those partitions with 0 msi-x vectors, causing them to believe theye're using INTa and preventing them from operating. Fixes: 51ff1725 ("qed: Add support for RoCE hw init") Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Colin Ian King 提交于
There seems to be a missing break on the OOO_LB_TC case, pq_id is being assigned and then re-assigned on the fall through default case and that seems suspect. Detected by CoverityScan, CID#1424402 ("Missing break in switch") Fixes: b5a9ee7c ("qed: Revise QM cofiguration") Signed-off-by: NColin Ian King <colin.king@canonical.com> Acked-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 05 4月, 2017 1 次提交
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由 Dan Carpenter 提交于
We should be returning -ENOMEM if qed_mcp_cmd_add_elem() fails. The current code returns success. Fixes: 4ed1eea8 ("qed: Revise MFW command locking") Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Acked-by: NTomer Tayar <Tomer.Tayar@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 04 4月, 2017 5 次提交
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由 Ram Amrani 提交于
It's possible some configurations would prevent driver from utilizing all the Memory Regions due to a lack of ILT lines. In such a case, calculate how many memory regions would have to be dropped due to limit, and manage without those. Signed-off-by: NRam Amrani <Ram.Amrani@cavium.com> Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Mintz, Yuval 提交于
As RoCE doesn't need to use the SRC, allocating ILT memory on behalf of RoCE is wasting available ILT lines. Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Mintz, Yuval 提交于
As of today there's no protocol supported that requires support from the TM hardware block and enables SRIOV, but we should still correct the calculation to reflect the lines required for such future VFs instead of changing the PF's own lines. Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michal Kalderon 提交于
When configuring the HW timers block we should set the number of CIDs up until the last CID that require timers, instead of only those CIDs whose protocol needs timers support. Today, the protocols that require HW timers' support have their CIDs before any other protocol, but that would change in future [when we add iWARP support]. Signed-off-by: NMichal Kalderon <Michal.Kalderon@cavium.com> Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Ariel Elior 提交于
Refactor and clean up the queue manager initialization logic. Also, this adds support for RoC low latency queues, which later would be used for improving RoCE latency in high throughput scenarios. Signed-off-by: NAriel Elior <Ariel.Elior@cavium.com> Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 29 3月, 2017 7 次提交
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由 Mintz, Yuval 提交于
Until now, qed used some port-defined value as BDQ index for both iSCSI and FCoE. As management firmware now treats BDQ as a resource and tells each PF its BDQ-range, start using a valure from that range instead. Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Tomer Tayar 提交于
Management firmware is used as an arbiter between the various PFs in matters of resources, but some of the resources that need to be divided are dependent on the non-management firmware used, so management firmware first needs to be told how many resources there are before trying to divide them. As part of the initialization sequence, driver would first inform the management firmware of the available resources under a dedicated resource lock, and afterwards request for various resources which might be based on the previous set values. Signed-off-by: NTomer Tayar <Tomer.Tayar@cavium.com> Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Tomer Tayar 提交于
Global locking can't properly be used to synchronize between different PFs in all scenarios, as those instances might reside in different logical partitions [e.g., when a PF is assigned via PDA to some VM]. The management firmware provides a generic infrastructure for device locks. For each 'resource', it's guaranteed it could be acquired by at most a single PF at any given time [or by management firmware]. This patch adds the necessary logic in qed for utilizing said infrastructure, implementing lock/unlock internal APIs. Signed-off-by: NTomer Tayar <Tomer.Tayar@cavium.com> Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Mintz, Yuval 提交于
During HW initialization, driver would set various registers to their needed values - but it assumes all registers start at their reset-value, so there's no need to re-configure a register's default value. This assumption might be incorrect, e.g., in case of preboot driver running and initializing the driver prior to our driver. To overcome this, we now ask management firmware to initiate a PF-flr early during the initialization sequence. That would return everything in the PF's scope back to default and prevent previous configurations from still being applied. Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Tomer Tayar 提交于
Management firmware is used as an arbiter between the various PFs in regard to loading - it causes the various PFs to load/unload sequentially and informs each of its appropriate rule in the init. But the existing flow is too weak to handle some scenarios where PFs aren't properly cleaned prior to loading. The significant scenarios falling under this criteria: a. Preboot drivers in some environment can't properly unload. b. Unexpected driver replacement [kdump, PDA]. Modern management firmware supports a more intricate loading flow, where the driver has the ability to overcome previous limitations. This moves qed into using this newer scheme. Notice new scheme is backward compatible, so new drivers would still be able to load properly on top of older management firmwares and vice versa. Signed-off-by: NTomer Tayar <Tomer.Tayar@cavium.com> Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Mintz, Yuval 提交于
We'll soon need additional information, so start by changing the infrastructure to receive the initializing variables via a parameter struct. Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Tomer Tayar 提交于
Management firmware is used as arbiter between different PFs which are loading/unloading, but in order to use the synchronization it offers the contending configurations need to be applied either between their LOAD_REQ <-> LOAD_DONE or UNLOAD_REQ <-> UNLOAD_DONE management firmware commands. Existing HW stop flow utilizes 2 different functions: qed_hw_stop() and qed_hw_reset() which don't abide this requirement; Most of the closure is doing outside the scope of the unload request. This patch removes qed_hw_reset() and places the relevant stop functionality underneath the management firmware protection. Signed-off-by: NTomer Tayar <Tomer.Tayar@cavium.com> Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 24 3月, 2017 6 次提交
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由 Mintz, Yuval 提交于
Align the driver feature distribution with the flow utilized by the management firmware - first reserve L2 queues for VFs and use all the remaining for the PF. The current distribution might lead to PFs with an enormous amount of queues, but at the same time leave us with insufficient resources for starting all VFs. Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Mintz, Yuval 提交于
When RoCE is enabled on a given L2 interface, the interrupt lines are divided equally between L2 and RoCE - But in case number of lines needed for RoCE is limited by number of available CNQs, we can utilize the additional lines for L2. Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Mintz, Yuval 提交于
Management firmware and driver are meant to be both backward and forward compatibile with each other. If a new mangement firmware would work with an older driver, it's possible that driver would receive indications which are meaningless to it. That's perfectly acceptible from the firmware part - so no need to log such messages at default verbosity; That would only serve to confuse users. Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Mintz, Yuval 提交于
The management firmware is running on a Big Endian processor, and when running on LE platform HW is configured to swap access to memory shared between management firmware and driver on 32-bit granulariy. As a result, for matters of simplicity most of the APIs between driver and management firmware are based on 32-bit variables. MAC settings are one exception, as driver needs to fill a byte array when indicating to management firmware that primary MAC has changed. Due to the swap, driver must make sure that the mac that was provided in byte-order would be translated into native order, otherwise after the swap the management firmware would read it swapped. Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Tomer Tayar 提交于
The driver interaction with management firmware involves a union of all the data-members relating to the commands the driver prepares. Current interface assumes the caller always passes such a union - but thats cumbersome as well as risky [chancing a stack corruption in case caller accidentally passes a smaller member instead of union]. Change implementation so that caller could pass a pointer to any of the members instead of the union. Signed-off-by: NTomer Tayar <Tomer.Tayar@cavium.com> Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Tomer Tayar 提交于
Interaction of driver -> management firmware is based on a one-pending mailbox [per interface], and various mailbox commands need to be synchronized. Current scheme is messy, and there's a difficulty extending it as it deals differently with various commands as well as making assumption on the required behavior for load/unload requests. Drop the current scheme into a completion-list-based approach; Each flow would try sending the command when possible, allowing one flow to complete another flow's completion and relieve the mailbox before sending its own command. Signed-off-by: NTomer Tayar <Tomer.Tayar@cavium.com> Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 22 3月, 2017 9 次提交
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由 Mintz, Yuval 提交于
The link information exists only on the leading hwfn, but some of its derivatives [e.g., min/max rate] need to be configured for each hwfn. When re-basing the VF link view, use the leading hwfn information as basis for all existing hwfns to allow said configurations to stick. Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Mintz, Yuval 提交于
Malicious VF existance should be interesting enough for the hyperuser. Change the PF indication that one of its child VF became malicious to appear by default. Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Mintz, Yuval 提交于
Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Mintz, Yuval 提交于
The PF<->VF interface allows for the VF to request multiple queues closure via a single message, but this has never been used by any official driver. We now deprecate this option, forcing each queue close to arrive via a different command; This would be required for future TLVs that are going to extend the queue TLVs with additional information on a per-queue basis. Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Mintz, Yuval 提交于
PF needs to validate the status of VF queues before asking firmware to configure anything for them, but that validation is done in various different forms - sometimes inadequate. Add auxillary functions that can be used for testing of the queue state and convert the various flows to use those instead of current existing flows; Also, add missing validations where needed. Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Mintz, Yuval 提交于
When starting the VF's vport, the PF would first configure the status blocks of the VF and then reset them. That would cause some of the configured information to be lost - specifically it would mean that all the VFs queues would use the Rx coalescing state-machine of the status block. Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Mintz, Yuval 提交于
When PF responds to the VF requests it also cleans the HW-channel indication in firmware to allow further VF messages to arrive, but the order currently applied is wrong - The PF is copying by DMAE the response the VF is polling on for completion, and only afterwards sets the HW-channel to ready state. This creates a race condition where the VF would be able to send an additional message to the PF before the channel would get ready again, causing the firmware to consider the VF as malicious. Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Mintz, Yuval 提交于
When a VF is considered malicious, driver handling of the VF FLR flow would clean said indication - but not if the FLR is part of an sriov-disable flow. That leads to further issues, as PF wouldn't re-enable the previously malicious VF when sriov is re-enabled. No reason for that - simply clean malicious indications in the sriov-disable flow as well. Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Mintz, Yuval 提交于
VFs are currently logging errors when communicating with their PFs in a too-low verbosity that wouldn't be shown by default. As timeouts and failed commands are crucial for VF operability, make them appear by default. Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 15 3月, 2017 1 次提交
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由 Mintz, Yuval 提交于
This adds the necessary infrastructure changes for initializing and working with the new series of QL41xxx adapaters. It also adds 2 new PCI device-IDs to qede: - 0x8070 for QL41xxx PFs - 0x8090 for VFs spawning from QL41xxx PFs Signed-off-by: NTomer Tayar <Tomer.Tayar@cavium.com> Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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