CPUIMX51 is build around Freescale's i.MX515 and has up to
512MB of RAM, NAND Flash, Ethernet, USB Host with 4 ports
hub, USB OTG, ST16554 Quad UART on nCS1, I2C RTC ...

MBIMX51 adds LEDS, Keypad, TSC2007 touchscreen controler ...
Signed-off-by: NEric Bénard <eric@eukrea.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The commit 9a763bfb "get rid of mxc_gpio_init" changed gpio_init
and irq_init sequence. Usually we will call set_irq_chained_handler
in gpio_init functions, this should be called after the irq_init
called, otherwise the chained irq can't get propoer irq_chip and this
irq will remain masked even we called set_irq_chained_handler.
Signed-off-by: NJason Wang <jason77.wang@gmail.com>
Tested-by: NEric Bénard <eric@eukrea.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The i.MX51 generates 2 IRQ for each GPIO bank : one for gpio 0 to 15
and one for gpio 16 to 31.
Actually only the lower IRQ is registered so register the second one.
Signed-off-by: NEric Bénard <eric@eukrea.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Add keymaps and imx_keypad device registration for imx51_3ds board.
Signed-off-by: NJason Wang <jason77.wang@gmail.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

add imx_keypad platform device definition and clocks for mx51
platforms.
Signed-off-by: NJason Wang <jason77.wang@gmail.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

3-stack is a reference board from Freescale for their i.MX51 SoC.

Add board definition, Kconfig and Makefile to enable Freescale 3-stack
board.

Boot tested on a i.MX51 3-stack Rev2.0 board
Signed-off-by: NJason Wang <jason77.wang@gmail.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The pads capable of being used as GPIOs had their pad-name and mode-name
switched. Also, fix the following:

- Whitespace fixes
- Replace IOMUX_CONFIG_ALTn with 'n'
Signed-off-by: NAmit Kucheria <amit.kucheria@canonical.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Add device registration and setup IOMUX pins in the mx51_babbage
board feil.
Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This patch adds I2C functionality to the Freescale MX51 Babbage HW.
The patch adds device structures, i2c board slave device defines,
IOMUX pin defines, and clocks.
Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This function is defined once for each imx family and so is in the way
when compiling a kernel for more than one SoC.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

This patch de-asserts the reset line that is connected to the USB
ULPI PHY on USB Host1.

This patch should be included with the original USB host enablement
set of patches of mx51 babbage hw, but was accidentily left out.
Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This patch enables usb gadget for freescale mx51 babbage hw. By default,
the OTG port will be in device mode. To put the OTG port into Host mode,
pass "otg_mode=host" in the exec command.

This patch applies to 2.6.34-rc7.
Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

For power management reasons, pll2 should be used to source the USBOH3
clock for mx51. PLL3 can be completely gated off when USB is not used.

This patch applies to 2.6.34-rc7.
Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This patch enables USB host functionality for Host1 and OTG port on
Freescale MX51 Babbage HW. This patch contains the board specific
HW initialization of the USB HW.

This patch applies to 2.6.34-rc6.
Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com>
Reviewed-by: NDaniel Mack <daniel@caiaq.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This patch is part of enabling USB for Freescale MX51 Babbage HW. This
patch adds device structures for USB Host1 and OTG port, and adds
clocking information for USB HW.

This patch applies to 2.6.34-rc6.
Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Register the gpio irqs on Freescale's MX51 Babbage HW.
Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: NAmit Kucheria <amit.kucheria@canonical.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Need to include <asm/div64.h> for do_div calls.
Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This area contains the Nand Flash controller registers. There
is no need to map them statically as the Nand driver uses ioremap().
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Freescale redboot passes the silicon revision via
ATAG_REVISION. Remove this bootloader dependency by
doing the same as redboot does in the Kernel.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This looks cleaner and allows us to call mx51_revision
later when we can use ioremap to determine the silicon
revision dynamically.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The gpt uses the ipg clock, not ipg_perclk
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This patch is to be applied into Sascha's mxc-master branch.

Fix ckih2 parameter in mx51_clocks_init funtion. CKIH2 pin is left unconnected on Babbage.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NAmit Kucheria <amit.kucheria@canonical.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Babbage is a reference board from Freescale for their i.MX51 SoC.

Add board definition, Kconfig and Makefiles to enable Freescale i.MX51
processor and Babbage board.

Boot tested on a Babbage2.5 board
Signed-off-by: NAmit Kucheria <amit.kucheria@canonical.com>

Add basic clock support, cpu identification, I/O mapping, interrupt
controller, serial port and ethernet.
Signed-off-by: NAmit Kucheria <amit.kucheria@canonical.com>