As we always use Device Tree now, we can add the configuration here.
Also remove the condition for PINCTRL_AT91.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: NBoris BREZILLON <boris.brezillon@free-electrons.com>

As the ARCH_AT91RM9200 is removed because being !DT, we use
the SOC_AT91RM9200 variant. This option can certainly be removed
once the ST driver is reworked a bit.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: NBoris BREZILLON <boris.brezillon@free-electrons.com>

Second part of at91rm9200 legacy !DT removal. This is the core !DT support
removal for this Atmel SoC.
Note that from now on, the Kconfig.non_dt file and its specialized options are
completely removed.
Use the Device Tree for running this board with newer kernels.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: NBoris BREZILLON <boris.brezillon@free-electrons.com>

Remove old board files that use at91rm9200 Atmel SoC. The
device tree is mature on this SoCs. It must be used now.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: NBoris BREZILLON <boris.brezillon@free-electrons.com>

Remove legacy support for at91sam9261/at91sam9g10 boards.
This include board files removal plus all legacy code for non DT boards
support.
Use the Device Tree for running this board with newer kernels.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Second part of at91sam9260/at91sam9g20 legacy !DT removal. This is the core !DT
support removal for these two Atmel SoCs.
Use the Device Tree for running this board with newer kernels.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Remove old board files that use at91sam9260 or at91sam9g20 Atmel SoCs. The
device tree is mature on these SoCs. It must be used now.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Remove legacy support for at91sam9263 boards.
This include board files removal plus all legacy code for non DT boards
support.
Use the Device Tree for running this board with newer kernels.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Remove this useless cpu.h header file forgotten during the !DT support removal.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Move the (DDR) SDRAM controller headers to include/soc/at91 to remove the
dependency on mach/ headers from the at91-reset driver.
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

CONFIG_MACH_SAMA5_DT is useless as the only way to boot on sama5 based boards is
to use device tree.
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
[nicolas.ferre@atmel.com: adapt on top of cleanup branch]
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

The CONFIG_ARCH_AT91SAM9G45 config option was removed by ("ARM: at91: remove
at91sam9g45/9m10 legacy board support") so cleanup the use of it.
Reported-by: NPaul Bolle <pebolle@tiscali.nl>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

init_time is only needed when booting non-DT boards, we can thus safely
remove init_time functions.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Fixes the following missing includes:

arch/arm/mach-at91/at91sam9g45.c: In function 'at91sam9g45_init_time':
arch/arm/mach-at91/at91sam9g45.c:39:23: error: 'NR_IRQS_LEGACY' undeclared (first use in this function)
  at91sam926x_pit_init(NR_IRQS_LEGACY + AT91_ID_SYS);
                       ^
arch/arm/mach-at91/at91sam9g45.c:39:23: note: each undeclared identifier is reported only once for each function it appears in
make[3]: *** [arch/arm/mach-at91/at91sam9g45.o] Error 1
arch/arm/mach-at91/at91sam9rl.c: In function 'at91sam9rl_init_time':
arch/arm/mach-at91/at91sam9rl.c:51:23: error: 'NR_IRQS_LEGACY' undeclared (first use in this function)
  at91sam926x_pit_init(NR_IRQS_LEGACY + AT91_ID_SYS);

Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Remove legacy support for at91sam9rl boards.
This include board files removal plus all legacy code for non DT boards
support.
Use the Device Tree for running this board with newer kernels.
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
[nicolas.ferre@atmel.com: Add sentence about DT]
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Remove legacy support for at91sam9g45/9m10 boards.
This include board files removal plus all legacy code for non DT boards
support (i.e. at91sam9g45.c and at91sam9g45_devices.c).
Use the Device Tree for running this board with newer kernels.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
[nicolas.ferre@atmel.com: Add sentence about DT, removed defconfig]
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

As there is currently no-one to take care of this old !MMU target and as its
support in recent kernels is a bit rotten, remove this at91x40 support and the
board file associated with it (at91eb01).
There are modern ARM !MMU in Mainline now so this target is not interesting for
building tests anymore. It would be better to start from these modern ARM !MMU
platforms to reintroduce at91x40 support if needed.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NGreg Ungerer <gerg@uclinux.org>
Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

Commit 78b81f46 ("ARM: dts: imx28-evk: Run I2C0 at 400kHz") caused issues
when doing the following sequence in loop:

- Boot the kernel
- Perform audio playback
- Reboot the system via 'reboot' command

In many times the audio card cannot be probed, which causes playback to fail.

After restoring to the original i2c0 frequency of 100kHz there is no such
problem anymore.

This reverts commit 78b81f46.

Cc: <stable@vger.kernel.org> # 3.16+
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Fix a typo error, the "emi" names refer to the eim clocks.

The change fixes typo in EIM and EIM_SLOW pre-output dividers and
selectors clock names. Notably EIM_SLOW clock itself is named correctly.
Signed-off-by: NSteve Longerbeam <steve_longerbeam@mentor.com>
[vladimir_zapolskiy@mentor.com: ported to v3.17]
Signed-off-by: NVladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Allows booting from SD/MMC on RK3288 and other platforms. Added here so I
can enable the board in the boot farm.
Signed-off-by: NOlof Johansson <olof@lixom.net>

I missed in 9a2ad529 that REGULATOR_FIXED_VOLTAGE had also gotten
deselected, so it needs to be added back as an explicit option.
Signed-off-by: NOlof Johansson <olof@lixom.net>

Without the 3.3V regulator node, the SDMMC driver will give these warnings:

dw_mmc ff704000.dwmmc0: No vmmc regulator found
dw_mmc ff704000.dwmmc0: No vqmmc regulator found

This patch adds the regulator node, and points the SD/MMC to the regulator.
Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com>
Reviewed-by: NDoug Anderson <dianders@chromium.org>
---
v3: Rename nodes to have schematic-name_regulator and remove "boot-on" and
    "always-on"
v2: Move the regulator nodes to their respective board dts file and
    correctly rename them to match the schematic

Without this patch, the booting the SOCFPGA platform would hang at the
SDMMC driver loading. The issue, debugged by Doug Anderson, turned out
to be that the GPIO bank used by the SD card-detect was not set to
status="okay".

Also update the cd-gpios to point to portb of the &gpio1 GPIO IP.
Suggested-by: NDoug Anderson <dianders@chromium.org>
Reviewed-by: NDoug Anderson <dianders@chromium.org>
Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com>
---
v4: Use &gpio1 to set status="okay" and update cd-gpio=&portb
v3: Correctly degugged the issue to be a gpio node not having status="okay"

Since the Synopsys GPIO IP can support multiple ports of varying widths, it
would make more sense to have the GPIO node DTS entry as this:

gpio0: gpio@ff708000{
	porta{
	};
};

Also, this is documented in the snps-dwapb-gpio.txt.
Suggested-by: NDoug Anderson <dianders@chromium.org>
Reviewed-by: NDoug Anderson <dianders@chromium.org>
Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com>

PLLB input and output ranges were wrongly copied from at91sam9261 as the
datasheet didn't mention explicitly PLLB. Correct their values.

This fixes USB.
Reported-by: NAndreas Henriksson <andreas.henriksson@endian.se>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Tested-by: NAndreas Henriksson <andreas.henriksson@endian.se>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

When CPU1 is brought out of reset, it's MMU is not turned on yet, so it will
only be able to use physical addresses. For systems with that have the
MMU page configured for 0xC0000000, 0x80000000, or 0x40000000
"BIC 0x40000000" will work just fine, as it was just converting the
virtual address of &cpu1start_addr into a physical address, ie. 0xC0000000
became 0x80000000. So for systems where the SDRAM controller was able to do a
wrap-around access, this was working fine, as it was just dropping the MSB,
but for systems where out of bounds memory access is not allowed, this would
not allow CPU1 to correctly fetch &cpu1start_addr.

This patch fixes the secondary_trampoline code to correctly fetch the
physical address of cpu1start_addr directly. The patch will subtract the
correct PAGE_OFFSET from &cpu1start_addr. And since on this platform, the
physical memory will always start at 0x0, subtracting PAGE_OFFSET from
&cpu1start_addr will allow CPU1 to correctly fetch the value of cpu1start_addr.

While at it, change the name of cpu1start_addr to socfpga_cpu1start_addr
to avoid any future naming collisions for multiplatform image.
Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com>
---
v4: Updated commit log to correctly lay out the usage of PAGE_OFFSET and
    add comments to the same effect.
v3: Used PAGE_OFFSET to get the physical address
v2: Correctly get the physical address instead of just a BIC hack.

Update the multi_v7_defconfig enabling the watchdog driver for Meson
SoCs.
Signed-off-by: NCarlo Caione <carlo@caione.org>
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>

sed -i 's/}\ ;/};/g'
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Add the cadence watchdog node to the Zynq devicetree.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Add missing reference for memory-controller.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Add missing reference for ADC node.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

By in sync with others node and add also baseaddr
to the node name.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Due to dependencies between timer and CPU frequency, only changes by
powers of two are allowed. The clocksource driver prevents other
changes, but with cpufreq and its governors it can result in being
spammed with error messages constantly. Hence, remove the 222 MHz OPP.
Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

The size of the GEM's register area is only 0x1000 bytes.
Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Explicitly set the dr_mode for the second dwc3 controller on the
Arndale Octa board to host mode. This is required to ensure the
controller is initialized in the right mode if the kernel is build
with USB gadget support.
Reported-By: NAndreas Faerber <afaerber@suse.de>
Signed-off-by: NSjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

In case the optional dr_mode property isn't set in the dwc3 nodes the
the controller will go into OTG mode if both USB host and USB gadget
functionality are enabled in the kernel configuration. Unfortunately
this results in USB not working on exynos5420-peach-pit and
exynos5800-peach-pi with such a kernel configuration unless manually
change the mode. To resolve that explicitly configure the dual role
mode as host.
Signed-off-by: NSjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: NAndreas Faerber <afaerber@suse.de>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The EIRSR and ELRSR registers are 32-bit registers on GICv2, and we
store these as an array of two such registers on the vgic vcpu struct.
However, we access them as a single 64-bit value or as a bitmap pointer
in the generic vgic code, which breaks BE support.

Instead, store them as u64 values on the vgic structure and do the
word-swapping in the assembly code, which already handles the byte order
for BE systems.
Tested-by: NVictor Kamensky <victor.kamensky@linaro.org>
Acked-by: NMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>

CM-QS600 is a APQ8064 based computer on module.
The details are available at
http://compulab.co.il/products/computer-on-modules/cm-qs600/Signed-off-by: NMike Rapoport <mike.rapoport@gmail.com>
Acked-by: NIgor Grinberg <grinberg@compulab.co.il>
Signed-off-by: NKumar Gala <galak@codeaurora.org>

This DTS has support for the Sony Xperia Z1 phone (codenamed Honami).
This first version of the DTS supports just a serial console.
Signed-off-by: NTim Bird <tim.bird@sonymobile.com>
Tested-by: NKevin Hilman <khilman@linaro.org>
Signed-off-by: NKumar Gala <galak@codeaurora.org>

Add SATA PHY and SATA AHCI controller nodes to device tree to enable
generic ahci support on the IPQ8064/AP148 board.
Signed-off-by: NKumar Gala <galak@codeaurora.org>