1. 15 10月, 2018 2 次提交
  2. 13 10月, 2018 2 次提交
    • D
      sparc: Throttle perf events properly. · 455adb31
      David S. Miller 提交于
      Like x86 and arm, call perf_sample_event_took() in perf event
      NMI interrupt handler.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      455adb31
    • D
      sparc: Fix single-pcr perf event counter management. · cfdc3170
      David S. Miller 提交于
      It is important to clear the hw->state value for non-stopped events
      when they are added into the PMU.  Otherwise when the event is
      scheduled out, we won't read the counter because HES_UPTODATE is still
      set.  This breaks 'perf stat' and similar use cases, causing all the
      events to show zero.
      
      This worked for multi-pcr because we make explicit sparc_pmu_start()
      calls in calculate_multiple_pcrs().  calculate_single_pcr() doesn't do
      this because the idea there is to accumulate all of the counter
      settings into the single pcr value.  So we have to add explicit
      hw->state handling there.
      
      Like x86, we use the PERF_HES_ARCH bit to track truly stopped events
      so that we don't accidently start them on a reload.
      
      Related to all of this, sparc_pmu_start() is missing a userpage update
      so add it.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      cfdc3170
  3. 10 10月, 2018 1 次提交
  4. 09 10月, 2018 1 次提交
  5. 08 10月, 2018 9 次提交
  6. 07 10月, 2018 7 次提交
  7. 06 10月, 2018 18 次提交