Allow the qcom_scm driver to be loadable as a permenent module.

This still uses the "depends on QCOM_SCM || !QCOM_SCM" bit to
ensure that drivers that call into the qcom_scm driver are
also built as modules. While not ideal in some cases its the
only safe way I can find to avoid build errors without having
those drivers select QCOM_SCM and have to force it on (as
QCOM_SCM=n can be valid for those drivers).
Signed-off-by: NJohn Stultz <john.stultz@linaro.org>
Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: NKalle Valo <kvalo@codeaurora.org>
Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Joerg Roedel <joro@8bytes.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Kalle Valo <kvalo@codeaurora.org>
Cc: Maulik Shah <mkshah@codeaurora.org>
Cc: Lina Iyer <ilina@codeaurora.org>
Cc: Saravana Kannan <saravanak@google.com>
Cc: Todd Kjos <tkjos@google.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: linux-arm-msm@vger.kernel.org
Cc: iommu@lists.linux-foundation.org
Cc: linux-gpio@vger.kernel.org
Link: https://lore.kernel.org/r/20201106042710.55979-3-john.stultz@linaro.orgSigned-off-by: NLinus Walleij <linus.walleij@linaro.org>

This adds a new SCM memprotect command to set virtual address ranges.
Signed-off-by: NStanimir Varbanov <stanimir.varbanov@linaro.org>
Reviewed-by: NElliot Berman <eberman@codeaurora.org>
Acked-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NMauro Carvalho Chehab <mchehab+huawei@kernel.org>

Add support for the Inline Crypto Engine (ICE) key programming interface
that's needed for the ufs-qcom driver to use inline encryption on
Snapdragon SoCs.  This interface consists of two SCM calls: one to program
a key into a keyslot, and one to invalidate a keyslot.

Although the UFS specification defines a standard way to do this, on these
SoCs the Linux kernel isn't permitted to access the needed crypto
configuration registers directly; these SCM calls must be used instead.

Link: https://lore.kernel.org/r/20200710072013.177481-2-ebiggers@kernel.orgAcked-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NEric Biggers <ebiggers@google.com>
Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>

This change adds a compatible for msm8994,
which requires no additional clocks for
scm to probe correctly.
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NKonrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200624150107.76234-2-konradybcio@gmail.comSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

The move to a combined driver for the QCOM SCM hardware changed the
io_writel and io_readl helpers to use non-atomic calls, despite the
commit message saying that atomic was a better option. This breaks these
helpers on hardware that uses the old legacy convention (access fails
with a -95 return code). Switch back to using the atomic calls.

Observed as a failure routing GPIO interrupts to the Apps processor on
an IPQ8064; fix is confirmed as correctly allowing the interrupts to be
routed and observed.
Reviewed-by: NElliot Berman <eberman@codeaurora.org>
Fixes: 57d3b816 ("firmware: qcom_scm: Remove thin wrappers")
Cc: stable@vger.kernel.org
Signed-off-by: NJonathan McDowell <noodles@earth.li>
Link: https://lore.kernel.org/r/20200704172334.GA759@earth.liSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

As far as the device is concerned the dma address is the physical
address.  There is no need to convert it to a physical address,
especially not using dma-direct internals that are not available
to drivers and which will interact badly with IOMMUs.  Last but not
least the commit introducing it claimed to just fix a type issue,
but actually changed behavior.

Fixes: 6e37ccf7 ("firmware: qcom_scm: Use proper types for dma mappings")
Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NChristoph Hellwig <hch@lst.de>
Link: https://lore.kernel.org/r/20200414123136.441454-1-hch@lst.deSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

The '>' expression itself is bool, no need to convert it to bool again.
This fixes the following coccicheck warning:

drivers/firmware/qcom_scm.c:946:25-30: WARNING: conversion to bool not
needed here
Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NJason Yan <yanaijie@huawei.com>
Link: https://lore.kernel.org/r/20200420123516.7888-1-yanaijie@huawei.comSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Dynamically support SMCCCC and legacy conventions by detecting which
convention to use at runtime. qcom_scm_call_atomic and qcom_scm_call can
then be moved in qcom_scm.c and use underlying convention backend as
appropriate. Thus, rename qcom_scm-64,-32 to reflect that they are
backends for -smc and -legacy, respectively.

Also add support for making SCM calls earlier than when SCM driver
probes to support use cases such as qcom_scm_set_cold_boot_addr. Support
is added by lazily initializing the convention and guarding the query
with a spin lock.  The limitation of these early SCM calls is that they
cannot use DMA, as in the case of >4 arguments for SMC convention and
any non-atomic call for legacy convention.

Tested-by: Brian Masney <masneyb@onstation.org> # arm32
Tested-by: NStephan Gerhold <stephan@gerhold.net>
Signed-off-by: NElliot Berman <eberman@codeaurora.org>
Link: https://lore.kernel.org/r/1578431066-19600-18-git-send-email-eberman@codeaurora.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

qcom_scm-32 and qcom_scm-64 implementations are nearly identical, so
make qcom_scm_call and qcom_scm_call_atomic unique to each and the SCM
descriptor creation common to each. There are the following catches:
- __qcom_scm_is_call_available is still in each -32,-64 implementation
  as the argument is unique to each convention
- For some functions, only one implementation was provided in -32 or
  -64. The actual implementation was moved into qcom_scm.c
- io_writel and io_readl in -64 were non-atomic calls and in -32 they
  were. Atomic is the better option, so use it.

Tested-by: Brian Masney <masneyb@onstation.org> # arm32
Tested-by: NStephan Gerhold <stephan@gerhold.net>
Signed-off-by: NElliot Berman <eberman@codeaurora.org>
Link: https://lore.kernel.org/r/1578431066-19600-17-git-send-email-eberman@codeaurora.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Definitions throughout qcom_scm are loosely grouped and loosely ordered.
Sort all the functions/definitions by service ID/command ID to improve
sanity when needing to add new functionality to this driver.
Acked-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Brian Masney <masneyb@onstation.org> # arm32
Tested-by: NStephan Gerhold <stephan@gerhold.net>
Signed-off-by: NElliot Berman <eberman@codeaurora.org>
Link: https://lore.kernel.org/r/1578431066-19600-16-git-send-email-eberman@codeaurora.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Add unused "device" parameter to reduce merge friction between SMCCC and
legacy based conventions in an upcoming patch.

Tested-by: Brian Masney <masneyb@onstation.org> # arm32
Tested-by: NStephan Gerhold <stephan@gerhold.net>
Signed-off-by: NElliot Berman <eberman@codeaurora.org>
Link: https://lore.kernel.org/r/1578431066-19600-15-git-send-email-eberman@codeaurora.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Create a consistent naming scheme for command IDs. The scheme is
QCOM_SCM_##svc_##cmd. Remove unused macros QCOM_SCM_FLAG_HLOS,
QCOM_SCM_FLAG_COLDBOOT_MC, QCOM_SCM_FLAG_WARMBOOT_MC,
QCOM_SCM_CMD_CORE_HOTPLUGGED, and QCOM_SCM_BOOT_ADDR_MC.
Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: NVinod Koul <vkoul@kernel.org>
Reviewed-by: NStephen Boyd <swboyd@chromium.org>
Tested-by: Brian Masney <masneyb@onstation.org> # arm32
Tested-by: NStephan Gerhold <stephan@gerhold.net>
Signed-off-by: NElliot Berman <eberman@codeaurora.org>
Link: https://lore.kernel.org/r/1578431066-19600-3-git-send-email-eberman@codeaurora.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Qcom's smmu-500 needs to toggle wait-for-safe sequence to
handle TLB invalidation sync's.
Few firmwares allow doing that through SCM interface.
Add API to toggle wait for safe from firmware through a
SCM call.
Signed-off-by: NVivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: NStephen Boyd <swboyd@chromium.org>
Acked-by: NAndy Gross <agross@kernel.org>
Signed-off-by: NSai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: NWill Deacon <will@kernel.org>

Add support to restore the secure configuration for qcm_scm-32.c. This
is needed by the On Chip MEMory (OCMEM) that is present on some
Snapdragon devices.
Signed-off-by: NRob Clark <robdclark@gmail.com>
[masneyb@onstation.org: ported to latest kernel; set ctx_bank_num to
 spare parameter.]
Signed-off-by: NBrian Masney <masneyb@onstation.org>
Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Gabriel Francisco <frc.gabrielgmail.com>
Signed-off-by: NRob Clark <robdclark@chromium.org>

Add support for the OCMEM lock/unlock interface that is needed by the
On Chip MEMory (OCMEM) that is present on some Snapdragon devices.
Signed-off-by: NRob Clark <robdclark@gmail.com>
[masneyb@onstation.org: ported to latest kernel; minor reformatting.]
Signed-off-by: NBrian Masney <masneyb@onstation.org>
Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Gabriel Francisco <frc.gabrielgmail.com>
Signed-off-by: NRob Clark <robdclark@chromium.org>

There are some questionable coding styles in this function. It looks
quite odd to deref a pointer with array indexing that only uses the
first element. Also, destroying an input/output variable halfway through
the function and then overwriting it on success is not clear. It's
better to use a local variable and the kernel macros to step through
each bit set in a bitmask and clearly show where outputs are set.

Cc: Ian Jackson <ian.jackson@citrix.com>
Cc: Julien Grall <julien.grall@arm.com>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org>
Tested-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NStephen Boyd <swboyd@chromium.org>
[bjorn: Changed for_each_set_bit() size to BITS_PER_LONG]
Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Some words are misspelled and we put a full stop after a return value
integer. Fix these things up so it doesn't look so odd.

Cc: Ian Jackson <ian.jackson@citrix.com>
Cc: Julien Grall <julien.grall@arm.com>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org>
Signed-off-by: NStephen Boyd <swboyd@chromium.org>
Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

We need to use the proper types and convert between physical addresses
and dma addresses here to avoid mismatch warnings. This is especially
important on systems with a different size for dma addresses and
physical addresses. Otherwise, we get the following warning:

  drivers/firmware/qcom_scm.c: In function "qcom_scm_assign_mem":
  drivers/firmware/qcom_scm.c:469:47: error: passing argument 3 of "dma_alloc_coherent" from incompatible pointer type [-Werror=incompatible-pointer-types]

We also fix the size argument to dma_free_coherent() because that size
doesn't need to be aligned after it's already aligned on the allocation
size. In fact, dma debugging expects the same arguments to be passed to
both the allocation and freeing sides of the functions so changing the
size is incorrect regardless.
Reported-by: NIan Jackson <ian.jackson@citrix.com>
Cc: Ian Jackson <ian.jackson@citrix.com>
Cc: Julien Grall <julien.grall@arm.com>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org>
Tested-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NStephen Boyd <swboyd@chromium.org>
Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 and
  only version 2 as published by the free software foundation this
  program is distributed in the hope that it will be useful but
  without any warranty without even the implied warranty of
  merchantability or fitness for a particular purpose see the gnu
  general public license for more details

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 294 file(s).
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Reviewed-by: NAllison Randal <allison@lohutok.net>
Reviewed-by: NAlexios Zavras <alexios.zavras@intel.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190529141900.825281744@linutronix.deSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

At one point in time all "future" platforms required three clocks, so
the binding and driver was written to treat this as the default case.
But new platforms has no clock requirements, which currently makes them
all a special case, causing the need for a patch in the binding and
driver for each new platform added.

This patch reworks the driver logic so that it will attempt to acquire
all three clocks and fail based on the given compatible. This allow us
to drop the clock requirement from "qcom,scm", in a way that will remain
backwards compatible with existing DT files.

Specific compatibles are added for apq8084, msm8916 and msm8974 to match
the updated binding and although equivalent to qcom,scm both ipq4019 and
msm8996 are kept as these have been used without fallback to qcom,scm.

The result of this patch is that new platforms, that require no clocks,
can be use the fallback compatible of "qcom,scm".
Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: NStephen Boyd <sboyd@kernel.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

Add the compatible for ipq4019.
This does not need clocks to do scm calls.
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NSricharan R <sricharan@codeaurora.org>
Acked-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

Now that of_platform_default_populate_init() takes care of populating
all the devices under the /firmware/ node, this patch removes the
redandant call to of_platform_populate here.

Cc: Andy Gross <andy.gross@linaro.org>
Cc: David Brown <david.brown@linaro.org>
Cc: linux-arm-msm@vger.kernel.org
Signed-off-by: NSudeep Holla <sudeep.holla@arm.com>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

Two different processors on a SOC need to switch memory ownership
during load/unload. To enable this, second level memory map table
need to be updated, which is done by secure layer.
This patch adds the interface for making secure monitor call for
memory ownership switching request.
Acked-by: NAndy Gross <andy.gross@linaro.org>
Signed-off-by: NAvaneesh Kumar Dwivedi <akdwived@codeaurora.org>
[bjorn: Minor style and kerneldoc updates]
Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

In order to aid post-mortem debugging the Qualcomm platforms provide a
"memory download mode", where the boot loader will provide an interface
for custom tools to "download" the content of RAM to a host machine.

The mode is triggered by writing a magic value somewhere in RAM, that is
read in the boot code path after a warm-restart. Two mechanism for
setting this magic value are supported in modern platforms; a direct SCM
call to enable the mode or through a secure io write of a magic value.

In order for a normal reboot not to trigger "download mode" the magic
must be cleared during a clean reboot.

Download mode has to be enabled by including qcom_scm.download_mode=1 on
the command line.
Reviewed-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

The secure IO service provides operations for reading and writing secure
memory from non-secure mode, expose this API through SCM.
Reviewed-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

Those two new SCM calls are needed from qcom-iommu driver in order
to initialize secure iommu page table.
Signed-off-by: NStanimir Varbanov <stanimir.varbanov@linaro.org>
Signed-off-by: NRob Clark <robdclark@gmail.com>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

Signed-off-by: NRob Clark <robdclark@gmail.com>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

This patch adds a set remote state SCM API.  This will be used by the
Venus and GPU subsystems to set state on the remote processors.

This work was based on two patch sets by Jordan Crouse and Stanimir
Varbanov.
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

This patch masks the core clk requirement for the APQ8064.  Until the
other peripherals correctly describe their clock dependencies or the
bus driver is put in place to handle the RPM dependencies, this bit
will remain masked.
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

When devm_clk_get fails for core clock, the failure was ignored
and the core_clk was explicitly set to NULL so that other
remaining clocks can be queried. However, now that we have a
cleaner way of expressing the clock dependency, return failure
when devm_clk_get fails for core clock.
Signed-off-by: NSarangdhar Joshi <spjoshi@codeaurora.org>
Reviewed-by: NStephen Boyd <sboyd@codeaurora.org>
Acked-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

Core, iface and bus clocks are not required to be voted from SCM
driver for some of the Qualcomm chipsets. Remove dependency on
these clocks from driver.
Suggested-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NSarangdhar Joshi <spjoshi@codeaurora.org>
Acked-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

Use devm_reset_controller_register() for the reset controller
registration and fixes the memory leak when unload the module.
Signed-off-by: NWei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

The Kconfig currently controlling compilation of this code is:

drivers/firmware/Kconfig:config QCOM_SCM
drivers/firmware/Kconfig:       bool

...meaning that it currently is not being built as a module by anyone.

Lets remove the modular code that is essentially orphaned, so that
when reading the driver there is no doubt it is builtin-only.

Since module_init was not in use by this code, the init ordering
remains unchanged with this commit.

Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code.

We also delete the MODULE_LICENSE tag etc. since all that information
was (or is now) contained at the top of the file in the comments.

Cc: Andy Gross <andy.gross@linaro.org>
Cc: David Brown <david.brown@linaro.org>
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-soc@vger.kernel.org
Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

The patch changes the initcall for SCM to use subsys_initcall
instead of arch_initcall.  This corrects the order so that we don't
probe defer when trying to get clks which causes issues later when
the spm driver makes calls to qcom_set_warm_boot_addr().

The order became an issue due to the changes to use arch_initcall_sync
for of_platform_default_populate_init().
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

Add back function that was dropped when reworking the SCM code.
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

PAS command 10 is used to assert and deassert the MSS reset via
TrustZone, expose this as a reset-controller to mimic the direct
access case.

Cc: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: NSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

This adds the Peripheral Authentication Service (PAS) interface to the
Qualcomm SCM interface. The API is used to authenticate and boot a range
of external processors in various Qualcomm platforms.
Signed-off-by: NBjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

Add an implementation of the SCM interface that works on ARM64 SoCs.  This
is used by things like determine if we have HDCP support or not on the
system.
Signed-off-by: NKumar Gala <galak@codeaurora.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>
Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: NStephen Boyd <sboyd@codeaurora.org>

This patch converts the Qualcomm SCM driver to use the streaming DMA APIs
for communication buffers.  This is being done so that the
secure_flush_area call can be removed.  Using the DMA APIs will also make
the SCM32 symmetric to the coming SCM64 code.
Signed-off-by: NAndy Gross <andy.gross@linaro.org>
Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: NStephen Boyd <sboyd@codeaurora.org>

This patch converts the Qualcomm SCM firmware driver into a platform
driver.  It also adds clock management for firmware calls which require
clocks to be enabled during the duration of their execution.  Rate
setting of the core clock is also in place for higher performance.
Signed-off-by: NAndy Gross <andy.gross@linaro.org>
Acked-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: NStephen Boyd <sboyd@codeaurora.org>