- 20 11月, 2014 1 次提交
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由 Radek Dostal 提交于
all other nodes in bcm63138.dtsi use "interrupts", this had to be just a typo which never got noticed, even it may have quite some consequences. Signed-off-by: NRadek Dostal <radek.dostal@streamunlimited.com> Acked-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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- 17 11月, 2014 1 次提交
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由 Peter Rosin 提交于
Some DT files had a typo with a missing "5" in sama5d3x first compatible string. Signed-off-by: NPeter Rosin <peda@axentia.se> [nicolas.ferre@atmel.com: modify commit log] Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 14 11月, 2014 1 次提交
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由 Will Deacon 提交于
To speed up decompression, the decompressor sets up a flat, cacheable mapping of memory. However, when there is insufficient space to hold the page tables for this mapping, we don't bother to enable the caches and subsequently skip all the cache maintenance hooks. Skipping the cache maintenance before jumping to the relocated code allows the processor to predict the branch and populate the I-cache with stale data before the relocation loop has completed (since a bootloader may have SCTLR.I set, which permits normal, cacheable instruction fetches regardless of SCTLR.M). This patch moves the cache maintenance check into the maintenance routines themselves, allowing the v6/v7 versions to invalidate the I-cache regardless of the MMU state. Cc: <stable@vger.kernel.org> Reported-by: NMarc Carino <marc.ceeeee@gmail.com> Tested-by: NJulien Grall <julien.grall@linaro.org> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 11 11月, 2014 3 次提交
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由 Keerthy 提交于
DCDC3 supplies voltage to DDR. Fix DCDC3 volatge to 1.5V which is the reset value. Programming to a non-reset value while executing from DDR will result in random hangs. Signed-off-by: NKeerthy <j-keerthy@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Keerthy 提交于
DCDC3 supplies voltage to DDR. Fix DCDC3 volatge to 1.5V which is the reset value. Programming to a non-reset value while executing from DDR will result in random hangs. Signed-off-by: NKeerthy <j-keerthy@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Keerthy 提交于
DCDC3 supplies voltage to DDR. Fix DCDC3 volatge to 1.5V which is the reset value. Programming to a non-reset value while executing from DDR will result in random hangs. Signed-off-by: NKeerthy <j-keerthy@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 09 11月, 2014 1 次提交
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由 Andreas Färber 提交于
The Parallella board comes with a U-Boot bootloader that loads one of two predefined FPGA bitstreams before booting the kernel. Both define an AXI interface to the on-board Epiphany processor. Enable clocks FCLK0..FCLK3 for the Programmable Logic by default. Otherwise accessing, e.g., the ESYSRESET register freezes the board, as seen with the Epiphany SDK tools e-reset and e-hw-rev, using /dev/mem. Cc: <stable@vger.kernel.org> # 3.17.x Signed-off-by: NAndreas Färber <afaerber@suse.de> Acked-by: NMichal Simek <michal.simek@xilinx.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 07 11月, 2014 1 次提交
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由 Roger Quadros 提交于
The 5th NAND partition should be named "NAND.u-boot-spl-os" instead of "NAND.u-boot-spl". This is to be consistent with other TI boards as well as u-boot. Fixes: 91994fac ("ARM: dts: am335x-evm: NAND: update MTD partition table") Signed-off-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 06 11月, 2014 1 次提交
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由 Olof Johansson 提交于
Driver has been there since a while back, but the dts never seems to have been updated with the node (nor pinctrl). Do so now. Cc: Matt Porter <mporter@linaro.org> Acked-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NStefan Agner <stefan@agner.ch> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 01 11月, 2014 1 次提交
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由 Tony Lindgren 提交于
With legacy booting, the platform init code was taking care of the configuring of GPIOs. With device tree based booting, things may or may not work depending what bootloader has configured or if the legacy platform code gets called. Let's add support for the pwrdn and reset GPIOs to the smc91x driver to fix the issues of smc91x not working properly when booted in device tree mode. And let's change n900 to use these settings as some versions of the bootloader do not configure things properly causing errors. Reported-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 25 10月, 2014 1 次提交
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由 Fabio Estevam 提交于
Commit 78b81f46 ("ARM: dts: imx28-evk: Run I2C0 at 400kHz") caused issues when doing the following sequence in loop: - Boot the kernel - Perform audio playback - Reboot the system via 'reboot' command In many times the audio card cannot be probed, which causes playback to fail. After restoring to the original i2c0 frequency of 100kHz there is no such problem anymore. This reverts commit 78b81f46. Cc: <stable@vger.kernel.org> # 3.16+ Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 23 10月, 2014 3 次提交
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由 Dinh Nguyen 提交于
Without the 3.3V regulator node, the SDMMC driver will give these warnings: dw_mmc ff704000.dwmmc0: No vmmc regulator found dw_mmc ff704000.dwmmc0: No vqmmc regulator found This patch adds the regulator node, and points the SD/MMC to the regulator. Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com> Reviewed-by: NDoug Anderson <dianders@chromium.org> --- v3: Rename nodes to have schematic-name_regulator and remove "boot-on" and "always-on" v2: Move the regulator nodes to their respective board dts file and correctly rename them to match the schematic
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由 Dinh Nguyen 提交于
Without this patch, the booting the SOCFPGA platform would hang at the SDMMC driver loading. The issue, debugged by Doug Anderson, turned out to be that the GPIO bank used by the SD card-detect was not set to status="okay". Also update the cd-gpios to point to portb of the &gpio1 GPIO IP. Suggested-by: NDoug Anderson <dianders@chromium.org> Reviewed-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com> --- v4: Use &gpio1 to set status="okay" and update cd-gpio=&portb v3: Correctly degugged the issue to be a gpio node not having status="okay"
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由 Dinh Nguyen 提交于
Since the Synopsys GPIO IP can support multiple ports of varying widths, it would make more sense to have the GPIO node DTS entry as this: gpio0: gpio@ff708000{ porta{ }; }; Also, this is documented in the snps-dwapb-gpio.txt. Suggested-by: NDoug Anderson <dianders@chromium.org> Reviewed-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com>
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- 22 10月, 2014 1 次提交
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由 Boris Brezillon 提交于
PLLB input and output ranges were wrongly copied from at91sam9261 as the datasheet didn't mention explicitly PLLB. Correct their values. This fixes USB. Reported-by: NAndreas Henriksson <andreas.henriksson@endian.se> Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Acked-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Tested-by: NAndreas Henriksson <andreas.henriksson@endian.se> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 20 10月, 2014 7 次提交
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由 Michal Simek 提交于
sed -i 's/}\ ;/};/g' Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Add the cadence watchdog node to the Zynq devicetree. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Add missing reference for memory-controller. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Add missing reference for ADC node. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
By in sync with others node and add also baseaddr to the node name. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Soren Brinkmann 提交于
Due to dependencies between timer and CPU frequency, only changes by powers of two are allowed. The clocksource driver prevents other changes, but with cpufreq and its governors it can result in being spammed with error messages constantly. Hence, remove the 222 MHz OPP. Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Soren Brinkmann 提交于
The size of the GEM's register area is only 0x1000 bytes. Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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- 17 10月, 2014 2 次提交
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由 Sjoerd Simons 提交于
Explicitly set the dr_mode for the second dwc3 controller on the Arndale Octa board to host mode. This is required to ensure the controller is initialized in the right mode if the kernel is build with USB gadget support. Reported-By: NAndreas Faerber <afaerber@suse.de> Signed-off-by: NSjoerd Simons <sjoerd.simons@collabora.co.uk> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Sjoerd Simons 提交于
In case the optional dr_mode property isn't set in the dwc3 nodes the the controller will go into OTG mode if both USB host and USB gadget functionality are enabled in the kernel configuration. Unfortunately this results in USB not working on exynos5420-peach-pit and exynos5800-peach-pi with such a kernel configuration unless manually change the mode. To resolve that explicitly configure the dual role mode as host. Signed-off-by: NSjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: NAndreas Faerber <afaerber@suse.de> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 16 10月, 2014 3 次提交
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由 Mike Rapoport 提交于
CM-QS600 is a APQ8064 based computer on module. The details are available at http://compulab.co.il/products/computer-on-modules/cm-qs600/Signed-off-by: NMike Rapoport <mike.rapoport@gmail.com> Acked-by: NIgor Grinberg <grinberg@compulab.co.il> Signed-off-by: NKumar Gala <galak@codeaurora.org>
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由 Tim Bird 提交于
This DTS has support for the Sony Xperia Z1 phone (codenamed Honami). This first version of the DTS supports just a serial console. Signed-off-by: NTim Bird <tim.bird@sonymobile.com> Tested-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NKumar Gala <galak@codeaurora.org>
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由 Kumar Gala 提交于
Add SATA PHY and SATA AHCI controller nodes to device tree to enable generic ahci support on the IPQ8064/AP148 board. Signed-off-by: NKumar Gala <galak@codeaurora.org>
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- 14 10月, 2014 1 次提交
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由 Chanwoo Choi 提交于
Fix wrong compatible string of Exynos3250 RTC (Real-Time Clock) dt node. The RTC of Exynos3250 must need additional source clock (XrtcXTI). Signed-off-by: NChanwoo Choi <cw00.choi@samsung.com> Acked-by: NKyungmin Park <kyungmin.park@samsung.com> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 10 10月, 2014 1 次提交
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由 Tony Lindgren 提交于
I added smc91x support but turns out we currently do not set the smc91x timings in gpmc.c but rely on the bootloader timings. This produces the following error unless the smc91x GPMC timings are initialized by the bootloader: Unhandled fault: external abort on non-linefetch (0x1008) at 0xd080630e ... [<c04067fc>] (smc_drv_probe) from [<c038e9c4>] (platform_drv_probe+0x2c/0x5c) [<c038e9c4>] (platform_drv_probe) from [<c038d450>] (driver_probe_device+0x104/0x22c) [<c038d450>] (driver_probe_device) from [<c038d60c>] (__driver_attach+0x94/0x98) [<c038d60c>] (__driver_attach) from [<c038bc3c>] (bus_for_each_dev+0x54/0x88) [<c038bc3c>] (bus_for_each_dev) from [<c038cc3c>] (bus_add_driver+0xd8/0x1d8) [<c038cc3c>] (bus_add_driver) from [<c038dd74>] (driver_register+0x78/0xf4) [<c038dd74>] (driver_register) from [<c0008924>] (do_one_initcall+0x80/0x1c0) [<c0008924>] (do_one_initcall) from [<c0852d9c>] (kernel_init_freeable+0x1b8/0x28c) [<c0852d9c>] (kernel_init_freeable) from [<c05ce86c>] (kernel_init+0x8/0xec) [<c05ce86c>] (kernel_init) from [<c000e728>] (ret_from_fork+0x14/0x2c) Let's fix the issue by disabling the smc91x module for now until we have sorted out the issues in gpmc.c. Reported-by: NKevin Hilman <khilman@linaro.org> Tested-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 09 10月, 2014 1 次提交
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Regulators for MMC2 (SD card) are PVDD_TFLASH_2V8 (LDO19) for vmmc and PVDD_APIO_MMCOFF_2V8 (LDO13) for vqmmc. Currently the device tree entry for MMC2 uses PVDD_PRE_1V8 (LDO10) for vmmc and vqmmc is not specified. Fix it. Without this patch: - "mmc: dw_mmc: use mmc_regulator_get_supply to handle regulators" patch causes a SD card detection to fail - "mmc: dw_mmc: Support voltage changes" patch causes a boot hang This patch fixes both above problems. Suggested-by: NDoug Anderson <dianders@google.com> Cc: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com> Cc: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Acked-by: NKyungmin Park <kyungmin.park@samsung.com> Fixes: 01730558 ("mmc: dw_mmc: Support voltage changes") Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 03 10月, 2014 1 次提交
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由 Carlo Caione 提交于
Reviewed-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NCarlo Caione <carlo@caione.org>
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- 01 10月, 2014 7 次提交
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由 Grygorii Strashko 提交于
The K2L MDIO io space has different start address. Hence, fix it to be 0x26200f00 according to TRM. Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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由 Grygorii Strashko 提交于
The K2E MDIO io space has different start address. Hence, fix it to be 0x24200f00 according to TRM. Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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由 Grygorii Strashko 提交于
Keystone supports dma-coherent on USB master and also needs dma-ranges to specify the hardware alias memory range in which DMA can be operational. Such configuration applied for USB0 devices, but It's missed for USB1 device which is present only in K2E SoC - hence apply it. Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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由 Grygorii Strashko 提交于
The IO range size is set incorrectly for USB PHY0 deivice it should be 24 instead of 32. Otherwise, It causes USB PHY1 probing failure. Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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由 Antoine Ténart 提交于
This patch enables the Ethernet port on the Marvell Berlin2Q DMP board. Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Antoine Ténart 提交于
This patch adds the Ethernet node, enabling the network unit on Berlin BG2Q SoCs. Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Robert Jarzmik 提交于
Add the clock tree description for the PXA27x based boards. Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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- 30 9月, 2014 2 次提交
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由 Markus Pargmann 提交于
There are 2 MACIDs stored in the control module of the am33xx. These are read by the cpsw driver if no valid MACID was found in the devicetree. Signed-off-by: NMarkus Pargmann <mpa@pengutronix.de> Reviewed-by: NWolfram Sang <wsa@the-dreams.de> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Markus Pargmann 提交于
Signed-off-by: NMarkus Pargmann <mpa@pengutronix.de> Reviewed-by: NWolfram Sang <wsa@the-dreams.de> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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