1. 15 4月, 2016 1 次提交
    • I
      drm/i915/gen9: Reset secondary power well requests left on by DMC/KVMR · c6782b76
      Imre Deak 提交于
      DMC forces on power well 1 and the misc IO power well by setting the
      corresponding request bits both in the BIOS and the DEBUG power well
      request registers. This is somewhat unexpected since the firmware should
      really just save and restore state but not alter it. We also depend on
      being able to disable power well 1, and the misc IO power well before
      entering S3/S4 on BXT and SKL or entering DC9 on BXT. To fix this make
      sure these request bits are cleared whenever we want to disable the
      given power wells.
      
      On SKL there is another twist where the firmware also clears the power
      well 1 request bit in HSW_POWER_WELL_DRIVER (but not that of the misc IO
      power well). This happens to not cause a problem due to the forced-on
      request bits in the other request registers.
      
      I've filed a bug about all this, but fixing that may take a while and
      having this sanity check in place makes sense even for future firmware
      versions.
      
      At the same time also check the KVMR request bits. I haven't seen this
      being altered, but we don't expect any request bits in here either, so
      sanitize this register as well.
      
      v2:
      - Apply the workaround on SKL as well. I noticed the related failure
        from the CI report, later Patrik also reported seeing it on his
        machine.
      
      CC: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
      Signed-off-by: NImre Deak <imre.deak@intel.com>
      Reviewed-by: NPatrik Jakobsson <patrik.jakobsson@linux.intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1459851965-6137-1-git-send-email-imre.deak@intel.com
      c6782b76
  2. 13 4月, 2016 1 次提交
  3. 07 4月, 2016 1 次提交
  4. 21 3月, 2016 1 次提交
  5. 09 3月, 2016 1 次提交
  6. 07 3月, 2016 1 次提交
  7. 02 3月, 2016 6 次提交
  8. 01 3月, 2016 1 次提交
  9. 26 2月, 2016 1 次提交
  10. 23 2月, 2016 4 次提交
  11. 22 2月, 2016 5 次提交
  12. 17 2月, 2016 1 次提交
    • I
      drm/i915: Add helper to get a display power ref if it was already enabled · 09731280
      Imre Deak 提交于
      We have many places in the code where we check if a given display power
      domain is enabled and if so access registers backed by this power
      domain. We assumed that some modeset lock will prevent the power
      reference from vanishing in the middle of the HW access, but this
      assumption doesn't always hold. In such cases we get either the wakeref
      not held, or an unclaimed register access error message. To fix this in
      a future-proof way that's independent of other locks wrap any such
      access with a get_ref_if_enabled()/put_ref() pair.
      
      Kudos to Ville and Joonas for the ideas of this new interface.
      
      v2:
      - init the power_domains ptr when declaring it everywhere (Joonas)
      v3:
      - don't report the device to be powered if runtime PM is disabled
      
      CC: Mika Kuoppala <mika.kuoppala@intel.com>
      CC: Chris Wilson <chris@chris-wilson.co.uk>
      CC: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      CC: Ville Syrjälä <ville.syrjala@linux.intel.com>
      Signed-off-by: NImre Deak <imre.deak@intel.com>
      Reviewed-by: NJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1455711462-7442-1-git-send-email-imre.deak@intel.com
      09731280
  13. 12 1月, 2016 1 次提交
  14. 09 1月, 2016 1 次提交
  15. 07 1月, 2016 1 次提交
  16. 18 12月, 2015 1 次提交
  17. 17 12月, 2015 8 次提交
  18. 02 12月, 2015 2 次提交
  19. 25 11月, 2015 1 次提交
  20. 23 11月, 2015 1 次提交