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  1. 11 2月, 2016 1 次提交
    • N
      gpio: add tps65218 gpio · c366c76a
      由 Nicolas Saenz Julienne 提交于 
      Driver for the GPIO block found in ti's tps65218 pmics.

The device has two GPIOs and one GPO pin which can be configured as follows:
GPIO1:
	-general-purpose, open-drain output controlled by GPO1 user bit and/or
	 sequencer
	-DDR3 reset input signal from SOC. Signal is either latched or
	 passed-trough to GPO2 pin. See below for details.
GPO2:
	-general-purpose output controlled by GPO2 user bit
	-DDR3 reset output signal. Signal is controlled by GPIO1 and PGOOD.
	 See below for details.
	-Output buffer can be configured as open-drain or push-pull.
GPIO3:
	-general-purpose, open-drain output controlled by GPO3 user bit and/or
	 sequencer
	-reset input-signal for DCDC1 and DCDC2.

The input configurations are not meant to be used by the user so the driver
only offers GPOs.

v2: Added request routine that evaluates the fw config flags and removed module
    owner
v3: Added .direction_input() routine, and took care of all Linus Walleij
suggestions (clamp to bool, use proper include)
Signed-off-by: NNicolas Saenz Julienne <nicolassaenzj@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      c366c76a
  3. 10 2月, 2016 5 次提交
  5. 05 2月, 2016 1 次提交
  7. 28 1月, 2016 4 次提交
  9. 07 1月, 2016 1 次提交
  11. 11 12月, 2015 2 次提交
  13. 02 12月, 2015 1 次提交
    • A
      gpio: samsung: move gpio-samsung driver back to platform code · 0f20e456
      由 Arnd Bergmann 提交于 
      The gpio-samsung driver is special in the sense that it
interacts directly in multiple ways with the legacy platform
code for the s3c24xx and s3c64xx platforms. In contrast,
all devicetree based machines for Samsung, including the
ones on those two SoC families use a different driver.

The header files that define the interface between the platform
code and the gpio driver are not visible when building a
kernel for ARCH_MULTIPLATFORM, which prevents us from
turning on this option for s3c64xx.

To work around this, we now move the driver back into platform
code, from where it was originally moved to as part of commit
1b39d5f2 ("gpio/samsung: gpio-samsung.c to support
Samsung GPIOs").

The long-term plan for this driver would be to remove it
entirely, after all Samsung machines have been converted
over to boot from DT, but there is currently no timeline
for when that might happen.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Reviewed-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
      0f20e456
  15. 01 12月, 2015 1 次提交
    • W
      gpio: Add GPIO support for the ACCES 104-IDI-48 · 6ddcf9b4
      由 William Breathitt Gray 提交于 
      The ACCES 104-IDI-48 family of PC/104 utility boards feature 48
individually optically isolated digital inputs. Enabled inputs feature
change-of-state detection capability; if change-of-state detection is
enabled, an interrupt is fired off if a change of input level
(low-to-high or high-to-low) is detected. Change-of-state IRQs are
enabled/disabled on 8-bit boundaries, for a total of six boundaries.

This driver provides GPIO and IRQ support for these 48 channels of
digital input. The base port address for the device may be configured
via the idi_48_base module parameter. The interrupt line number for the
device may be configured via the idi_48_irq module parameter.
Signed-off-by: NWilliam Breathitt Gray <vilhelm.gray@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      6ddcf9b4
  17. 19 11月, 2015 1 次提交
  19. 01 11月, 2015 4 次提交
  21. 27 10月, 2015 2 次提交
  23. 26 10月, 2015 1 次提交
    • Y
      gpio: driver for AMD Promontory · 6057d40f
      由 YD Tseng 提交于 
      This patch adds a new GPIO driver for AMD Promontory chip.

This GPIO controller is enumerated by ACPI and the ACPI compliant
hardware ID is AMDF030.

Change history:

v2: 1. fix coding style
    2. registers renaming
v3: 1. change include file
    2. fix coding style
    3. remove module_init/exit, add module_platform_driver
    4. remove MODULE_ALIAS
v4: 1. change TOTAL_GPIO_PINS to PT_TOTAL_GPIO
    2. remove PCI dependency in Kconfig
    3. fix subject line
Signed-off-by: NYD Tseng <Yd_Tseng@asmedia.com.tw>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      6057d40f
  25. 22 10月, 2015 1 次提交
  27. 19 10月, 2015 1 次提交
  29. 02 10月, 2015 2 次提交
  31. 14 9月, 2015 1 次提交
  33. 13 8月, 2015 1 次提交
    • G
      gpio: brcmstb: Add interrupt and wakeup source support · 19a7b694
      由 Gregory Fong 提交于 
      Uses the gpiolib irqchip helpers.  For this to work, the irq setup
function is called once per bank instead of once per device.  Note
that all known uses of this block have a BCM7120 L2 interrupt
controller as a parent.  Supports interrupts for all GPIOs.

In the IRQ handler, we check for raised IRQs for invalid GPIOs and
warn (ratelimited) if they're encountered.

Also, several drivers (e.g. gpio-keys) allow for GPIOs to be
configured as wakeup sources, and this GPIO controller supports that
through a separate interrupt path.

The de-facto standard DT property "wakeup-source" is checked, since
that indicates whether the GPIO controller hardware can wake.  Uses
the IRQCHIP_MASK_ON_SUSPEND irq_chip flag because UPG GIO doesn't have
any of its own wakeup source configuration.

Aside regarding gpiolib irqchip helpers: It wasn't obvious (to me)
that you can have multiple chained irqchips and associated IRQ domains
for a single parent IRQ, and as long as the xlate function is written
correctly, a GPIO IRQ request end up checking the correct domain and
will get associated with the correct IRQ.  What helps make this clear
is to read
  drivers/gpio/gpiolib-of.c:
   - of_gpiochip_find_and_xlate()
   - of_get_named_gpiod_flags()
  drivers/gpio/gpiolib.c:
   - gpiochip_find()
Signed-off-by: NGregory Fong <gregory.0xf0@gmail.com>
Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      19a7b694
  35. 03 8月, 2015 1 次提交
  37. 16 7月, 2015 3 次提交
  39. 10 6月, 2015 2 次提交
  41. 02 6月, 2015 1 次提交
    • G
      gpio: Add GPIO support for Broadcom STB SoCs · 3b0213d5
      由 Gregory Fong 提交于 
      This adds support for the GPIO IP "UPG GIO" used on
Broadcom STB SoCs (BCM7XXX and some others). Uses
basic_mmio_gpio to instantiate a gpio_chip for each bank.
The driver assumes that it handles the base set of GPIOs
on the system and that it can start its numbering sequence
from 0, so any GPIO expanders used with it must dynamically
assign GPIO numbers after this driver has finished
registering its GPIOs.

Does not implement the interrupt-controller portion yet,
will be done in a future commit.

v2:
- change include to use <linux/gpio/driver.h> instead of
  <linux/gpio.h>
- get rid of unnecessary imask member in struct bank
- rename GPIO_PER_BANK -> MAX_GPIO_PER_BANK
- always have 32 GPIOs per bank and add 'width' member in
  struct bank to hold actual number of GPIOs in use
- mark of_match table as const
List-usage-fixed-by: NBrian Norris <computersforpeace@gmail.com>
Signed-off-by: NGregory Fong <gregory.0xf0@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      3b0213d5
  43. 06 5月, 2015 2 次提交
  45. 05 5月, 2015 1 次提交