- 11 2月, 2016 1 次提交
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由 Nicolas Saenz Julienne 提交于
Driver for the GPIO block found in ti's tps65218 pmics. The device has two GPIOs and one GPO pin which can be configured as follows: GPIO1: -general-purpose, open-drain output controlled by GPO1 user bit and/or sequencer -DDR3 reset input signal from SOC. Signal is either latched or passed-trough to GPO2 pin. See below for details. GPO2: -general-purpose output controlled by GPO2 user bit -DDR3 reset output signal. Signal is controlled by GPIO1 and PGOOD. See below for details. -Output buffer can be configured as open-drain or push-pull. GPIO3: -general-purpose, open-drain output controlled by GPO3 user bit and/or sequencer -reset input-signal for DCDC1 and DCDC2. The input configurations are not meant to be used by the user so the driver only offers GPOs. v2: Added request routine that evaluates the fw config flags and removed module owner v3: Added .direction_input() routine, and took care of all Linus Walleij suggestions (clamp to bool, use proper include) Signed-off-by: NNicolas Saenz Julienne <nicolassaenzj@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 10 2月, 2016 7 次提交
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由 Andrew F. Davis 提交于
Add driver for TI TPIC2810 8-Bit LED Driver with I2C Interface. The TPIC2810 has 8 open-drain outputs that can but used to drive LEDs and other low-side switched resistive loads. Signed-off-by: NAndrew F. Davis <afd@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Andrew F. Davis 提交于
Add generic parallel-in/serial-out shift register GPIO driver. This includes SPI compatible devices like SN74165 serial-out shift registers and the SN65HVS88x series of industrial serializers that can be read over the SPI bus and used for GPI (General Purpose Input). Signed-off-by: NAndrew F. Davis <afd@ti.com> Tested-by: NSean Nyekjaer <sean.nyekjaer@prevas.dk> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Alban Bedel 提交于
Add myself to the copyright list and remove the reference to Atheros' BSP as nothing is left of this code. Signed-off-by: NAlban Bedel <albeu@free.fr> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Alban Bedel 提交于
Add support for the interrupt controller using GPIOLIB_IRQCHIP. Both edges isn't supported by the chip and has to be emulated by switching the polarity on each interrupt. Signed-off-by: NAlban Bedel <albeu@free.fr> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Alban Bedel 提交于
As we now allow the driver to be built as a module it should be removable. Signed-off-by: NAlban Bedel <albeu@free.fr> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Alban Bedel 提交于
To allow building the driver in compile tests we must drop the dependency on asm/mach-ath79/ar71xx_regs.h. For this we replace the include with local definition of the registers needed for this driver. Signed-off-by: NAlban Bedel <albeu@free.fr> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Alban Bedel 提交于
Drop most of the code in favor of the generic MMIO GPIO driver. As the driver now depend on CONFIG_GPIO_GENERIC also add a Kconfig entry to make the driver optional. We leave the base pointer and lock in the data struct because they are needed for the IRQ support. Signed-off-by: NAlban Bedel <albeu@free.fr> Acked-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 09 2月, 2016 4 次提交
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由 Linus Walleij 提交于
A new chardev that is to be used for userspace GPIO access is added in this patch. It is intended to gradually replace the horribly broken sysfs ABI. Using a chardev has many upsides: - All operations are per-gpiochip, which is the actual device underlying the GPIOs, making us tie in to the kernel device model properly. - Hotpluggable GPIO controllers can come and go, as this kind of problem has been know to userspace for character devices since ages, and if a gpiochip handle is held in userspace we know we will break something, whereas the sysfs is stateless. - The one-value-per-file rule of sysfs is really hard to maintain when you want to twist more than one knob at a time, for example have in-kernel APIs to switch several GPIO lines at the same time, and this will be possible to do with a single ioctl() from userspace, saving a lot of context switching. We also need to add a new bus type for GPIO. This is necessary for example for userspace coldplug, where sysfs is traversed to find the boot-time device nodes and create the character devices in /dev. This new chardev ABI is *non* *optional* and can be counted on to be present in the future, emphasizing the preference of this ABI. The ABI only implements one single ioctl() to get the name and number of GPIO lines of a chip. Even this is debatable: see it as a minimal example for review. This ABI shall be ruthlessly reviewed and etched in stone. The old /sys/class/gpio is still optional to compile in, but will be deprecated. Unique device IDs are created using IDR, which is overkill and insanely scalable, but also well tested. Cc: Johan Hovold <johan@kernel.org> Cc: Michael Welling <mwelling@ieee.org> Cc: Markus Pargmann <mpa@pengutronix.de> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
We use the new struct device inside gpio_chip to related debug prints and warnings, and we also add it to the debugfs dump. Cc: Johan Hovold <johan@kernel.org> Cc: Michael Welling <mwelling@ieee.org> Cc: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
GPIO chips have been around for years, but were never real devices, instead they were piggy-backing on a parent device (such as a platform_device or amba_device) but this was always optional. GPIO chips could also exist without any device at all, with its struct device *parent (ex *dev) pointer being set to null. When sysfs was in use, a mock device would be created, with the optional parent assigned, or just floating orphaned with NULL as parent. If sysfs is active, it will use this device as parent. We now create a gpio_device struct containing a real struct device and move the subsystem over to using that. The list of struct gpio_chip:s is augmented to hold struct gpio_device:s and we find gpio_chips:s by first looking up the struct gpio_device. The struct gpio_device is designed to stay around even if the gpio_chip is removed, so as to satisfy users in userspace that need a backing data structure to hold the state of the session initiated with e.g. a character device even if there is no physical chip anymore. From this point on, gpiochips are devices. Cc: Johan Hovold <johan@kernel.org> Cc: Michael Welling <mwelling@ieee.org> Cc: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Liu Gang 提交于
The new Layerscape platforms has the same ip block/controller as GPIO on PowerPC platforms(MPC8XXX), but the GPIO registers may be big or little endian. So the code needs to get the endian property from DTB, then make additional functions to fit all the PowerPC/Layerscape GPIO register read/write operations. gpio-generic.c provides an universal infrastructure for both big and little endian register operations. So switch the gpio-mpc8xxx to use gpio-generic can simplify the driver and reduce a lot of code. The IRQ and some workaround parts in gpio-mpc8xxx.c will be updated with the new API interfaces but following the original functionalities. Signed-off-by: NLiu Gang <Gang.Liu@nxp.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 05 2月, 2016 1 次提交
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由 Julien Grossholtz 提交于
The TS-4800 GPIO driver provide support for the GPIOs available on the Technologic Sytems board FPGA. It allows to set direction and read/write states. It uses the generic gpio driver. Signed-off-by: NJulien Grossholtz <julien.grossholtz@savoirfairelinux.com> Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 28 1月, 2016 6 次提交
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由 Geliang Tang 提交于
Use irq_data_get_chip_type() instead of container_of(). Signed-off-by: NGeliang Tang <geliangtang@163.com> Reviewed-by: NGrygorii Strashko <grygorii.strashko@ti.com> Acked-by: NSantosh Shilimkar <ssantosh@kernel.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Liu Gang 提交于
The gpio-mpc8xxx.c should can support qoriq and Layerscape platforms. Signed-off-by: NLiu Gang <Gang.Liu@nxp.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Peter Hung 提交于
Add F81866 GPIO supports Fintek F81866 is a SuperIO. It contains HWMON/GPIO/Serial Ports. and it has totally 72(9x8 sets) gpio pins. Here is the PDF spec: http://www.alldatasheet.com/datasheet-pdf/pdf/459085/FINTEK/F81866AD-I.html The control method is the same with F7188x, but we should care the address of GPIO8x. GPIO address is below: GPIO0x based: 0xf0 GPIO1x based: 0xe0 GPIO2x based: 0xd0 GPIO3x based: 0xc0 GPIO4x based: 0xb0 GPIO5x based: 0xa0 GPIO6x based: 0x90 GPIO7x based: 0x80 GPIO8x based: 0x88 <-- not 0x70. Signed-off-by: NPeter Hung <hpeter+linux_kernel@gmail.com> Acked-by: NSimon Guinot <simon.guinot@sequanux.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 William Breathitt Gray 提交于
The ACCES 104-DIO-48E device provides 48 lines digital I/O via two Programmable Peripheral Interface (PPI) chips of type 82C55. Bit C3 at each 24-bit Group can be used as an external interrupt, triggered by a rising edge. This driver provides GPIO and IRQ support for these 48 channels of digital I/O. The base port address for the device may be configured via the dio_48e_base module parameter. The interrupt line number for the device may be configured via the dio_48e_irq module parameter. Signed-off-by: NWilliam Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 William Breathitt Gray 提交于
The WinSystems WS16C48 device provides 48 lines of digital I/O. In addition, the first 24 lines may be used for interrupt-handled edge detection; rising edge detection and falling edge detection are supported. This driver provides GPIO and IRQ support for these 48 channels of digital I/O. The base port address for the device may be configured via the ws16c48_base module parameter. The interrupt line number for the device may be configured via the ws16c48_irq module parameter. Signed-off-by: NWilliam Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 William Breathitt Gray 提交于
The ACCES 104-IDI-48 can differentiate between its own and other devices' interrupt requests. Therefore, IRQ sharing is possible and should be permitted. Signed-off-by: NWilliam Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 26 1月, 2016 1 次提交
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由 Linus Walleij 提交于
As we want gpio_chip .get() calls to be able to return negative error codes and propagate to drivers, we need to go over all drivers and make sure their return values are clamped to [0,1]. We do this by using the ret = !!(val) design pattern. Cc: Anatolij Gustschin <agust@denx.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 25 1月, 2016 2 次提交
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由 Josh Boyer 提交于
Like the Yoga 900 models the Lenovo Yoga 700 does not have a hw rfkill switch, and trying to read the hw rfkill switch through the ideapad module causes it to always reported blocking breaking wifi. This commit adds the Lenovo Yoga 700 to the no_hw_rfkill dmi list, fixing the wifi breakage. BugLink: https://bugzilla.redhat.com/show_bug.cgi?id=1295272 Tested-by: <dinyar.rabady+spam@gmail.com> Cc: stable@vger.kernel.org Signed-off-by: NJosh Boyer <jwboyer@fedoraproject.org> Signed-off-by: NDarren Hart <dvhart@linux.intel.com>
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由 Souvik Kumar Chakravarty 提交于
This patch fixes compile time warnings when CONFIG_PM_SLEEP is undefined. In this case sleep related counters are unused. Signed-off-by: NSouvik Kumar Chakravarty <souvik.k.chakravarty@intel.com> Signed-off-by: NDarren Hart <dvhart@linux.intel.com>
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- 24 1月, 2016 3 次提交
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由 Simon Arlott 提交于
The extended flash address needs to be subtracted from bcm_tag flash image offsets. Move this value to the bcm_tag header file. Renamed define name to consistently use bcm963xx for flash layout which should be considered a property of the board and not the SoC (i.e. bcm63xx could theoretically be used on a board without CFE or any flash). Signed-off-by: NSimon Arlott <simon@fire.lp0.eu> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Jonas Gorski <jogo@openwrt.org> Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org> Cc: MIPS Mailing List <linux-mips@linux-mips.org> Cc: MTD Maling List <linux-mtd@lists.infradead.org> Patchwork: https://patchwork.linux-mips.org/patch/11833/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Simon Arlott 提交于
Move Broadcom BCM963xx image tag data structure to include/linux/ so that drivers outside of mach-bcm63xx can use it. Signed-off-by: NSimon Arlott <simon@fire.lp0.eu> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Jonas Gorski <jogo@openwrt.org> Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org> Cc: MIPS Mailing List <linux-mips@linux-mips.org> Cc: MTD Maling List <linux-mtd@lists.infradead.org> Patchwork: https://patchwork.linux-mips.org/patch/11832/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Cristian Birsan 提交于
This adds support for the interrupt controller present on PIC32 class devices. It handles all internal and external interrupts. This controller exists outside of the CPU core and is the arbitrator of all interrupts (including interrupts from the CPU itself) before they are presented to the CPU. The following features are supported: - DT properties for EVIC and for devices/peripherals that use interrupt lines - Persistent and non-persistent interrupt handling - irqdomain and generic chip support - Configuration of external interrupt edge polarity Signed-off-by: NCristian Birsan <cristian.birsan@microchip.com> Signed-off-by: NJoshua Henderson <joshua.henderson@microchip.com> Acked-by: NThomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/12092/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 23 1月, 2016 3 次提交
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由 Tetsuo Handa 提交于
There are many locations that do if (memory_was_allocated_by_vmalloc) vfree(ptr); else kfree(ptr); but kvfree() can handle both kmalloc()ed memory and vmalloc()ed memory using is_vmalloc_addr(). Unless callers have special reasons, we can replace this branch with kvfree(). Please check and reply if you found problems. Signed-off-by: NTetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp> Acked-by: NMichal Hocko <mhocko@suse.com> Acked-by: NJan Kara <jack@suse.com> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Reviewed-by: NAndreas Dilger <andreas.dilger@intel.com> Acked-by: N"Rafael J. Wysocki" <rjw@rjwysocki.net> Acked-by: NDavid Rientjes <rientjes@google.com> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Oleg Drokin <oleg.drokin@intel.com> Cc: Boris Petkov <bp@suse.de> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Al Viro 提交于
parallel to mutex_{lock,unlock,trylock,is_locked,lock_nested}, inode_foo(inode) being mutex_foo(&inode->i_mutex). Please, use those for access to ->i_mutex; over the coming cycle ->i_mutex will become rwsem, with ->lookup() done with it held only shared. Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
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由 Al Viro 提交于
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
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- 22 1月, 2016 12 次提交
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由 Arnd Bergmann 提交于
gcc warns about the 'found' variable possibly being used uninitialized: drivers/soc/qcom/spm.c: In function 'spm_dev_probe': drivers/soc/qcom/spm.c:305:5: error: 'found' may be used uninitialized in this function [-Werror=maybe-uninitialized] However, the code is correct because we know that there is always at least one online CPU. This initializes the 'found' variable to zero before the loop so the compiler knows it does not have to warn about it. Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Allen Hubbe 提交于
If the parameter given to the macro is replaced throughout the macro as it is evaluated. The intent is that the macro parameter should replace the only the first parameter to container_of(). However, the way the macro was written, it would also inadvertantly replace a structure field name. If a parameter of any other name is given to the macro, it will fail to compile, if the structure does not contain a field of the same name. At worst, it will compile, and hide improper access of an unintended field in the structure. Change the macro parameter name, so it does not conflict with the structure field name. Signed-off-by: NAllen Hubbe <Allen.Hubbe@emc.com> Acked-by: NDave Jiang <dave.jiang@intel.com> Signed-off-by: NJon Mason <jdmason@kudzu.us>
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由 Xiangliang Yu 提交于
This adds support for AMD's PCI-Express Non-Transparent Bridge (NTB) device on the Zeppelin platform. The driver connnects to the standard NTB sub-system interface, with modification to add hooks for power management in a separate patch. The AMD NTB device has 3 memory windows, 16 doorbell, 16 scratch-pad registers, and supports up to 16 PCIe lanes running a Gen3 speeds. Signed-off-by: NXiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: NAllen Hubbe <Allen.Hubbe@emc.com> Signed-off-by: NJon Mason <jdmason@kudzu.us>
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由 Markus Elfring 提交于
The rbd_dev_destroy() function tests whether its argument is NULL and then returns immediately. Thus the test around the call is not needed. This issue was detected by using the Coccinelle software. Signed-off-by: NMarkus Elfring <elfring@users.sourceforge.net> Signed-off-by: NIlya Dryomov <idryomov@gmail.com>
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由 Leon Romanovsky 提交于
The create_cq() can receive creation flags which were used differently by two commits which added create_cq extended command and cross-channel. The merged code caused to not accept any flags at all. This patch unifies the check into one function and one return error code. Fixes: 972ecb82 ("IB/mlx5: Add create_cq extended command") Fixes: 051f2630 ("IB/mlx5: Add driver cross-channel support") Signed-off-by: NLeon Romanovsky <leonro@mellanox.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 majd@mellanox.com 提交于
Added Raw Packet QP modify functionality which will enable user space consumers to use it. Since Raw Packet QP is built of SQ and RQ sub-objects, therefore Raw Packet QP state changes are implemented by changing the state of the sub-objects. Signed-off-by: NMajd Dibbiny <majd@mellanox.com> Reviewed-by: NMatan Barak <matanb@mellanox.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 majd@mellanox.com 提交于
When modifying a QP, the desired operation was determined in the mlx5_core using a transition table that takes the current state, the final state, and returns the desired operation. Since this logic will be used for Raw Packet QP, move the operation table to the mlx5_ib. Signed-off-by: NMajd Dibbiny <majd@mellanox.com> Reviewed-by: NMatan Barak <matanb@mellanox.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 majd@mellanox.com 提交于
When the user changes the Address Vector(AV) in the modify QP, he provides an SL. This SL should be translated to Ethernet Priority by taking the 3 LSB bits, and modify the QP's TIS according to this Ethernet priority. Signed-off-by: NMajd Dibbiny <majd@mellanox.com> Reviewed-by: NMatan Barak <matanb@mellanox.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 majd@mellanox.com 提交于
Since Raw Packet QP is composed of RQ and SQ, the IB QP's state is derived from the sub-objects. Therefore we need to query each one of the sub-objects, and decide on the IB QP's state. Signed-off-by: NMajd Dibbiny <majd@mellanox.com> Reviewed-by: NMatan Barak <matanb@mellanox.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 majd@mellanox.com 提交于
This patch adds support for Raw Packet QP for the mlx5 device. Raw Packet QP, unlike other QP types, has no matching mlx5_core_qp object but rather it is built of RQ/SQ/TIR/TIS/TD mlx5_core object. Since the SQ and RQ work-queue (WQ) buffers are not contiguous like other QPs, we allocate separate buffers in the user-space and pass the address of each one of them separately to the kernel. Signed-off-by: NMajd Dibbiny <majd@mellanox.com> Reviewed-by: NMatan Barak <matanb@mellanox.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 majd@mellanox.com 提交于
Extract specific IB QP fields to mlx5_ib_qp_trans structure. The mlx5_core QP object resides in mlx5_ib_qp_base, which all QP types inherit from. When we need to find mlx5_ib_qp using mlx5_core QP (event handling and co), we use a pointer that resides in mlx5_ib_qp_base. In addition, we delete all redundant fields that weren't used anywhere in the code: -doorbell_qpn -sq_max_wqes_per_wr -sq_spare_wqes Signed-off-by: NMajd Dibbiny <majd@mellanox.com> Reviewed-by: NMatan Barak <matanb@mellanox.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 majd@mellanox.com 提交于
Transport Domain groups several TIS and TIR object. By grouping these object, it defines wheather local loopback packets that are sent from the TIS objects in the group are received by the TIR objects in the same group. Allocate a Transport Domain(TD) for each user context to be used in the future by Raw Packet QP for Self-Loopback Control. Signed-off-by: NMajd Dibbiny <majd@mellanox.com> Reviewed-by: NMatan Barak <matanb@mellanox.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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