- 22 5月, 2014 2 次提交
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由 Xuelin Shi 提交于
The count which is used to get_unmap_data maybe not the same as the count computed in dmaengine_unmap which causes to free data in a wrong pool. This patch fixes this issue by keeping the map count with unmap_data structure and use this count to get the pool. Cc: <stable@vger.kernel.org> Signed-off-by: NXuelin Shi <xuelin.shi@freescale.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Ezequiel Garcia 提交于
We need to use writel() instead of writel_relaxed() when starting a channel, to ensure all the descriptors have been flushed before the activation. While at it, remove the unneeded read-modify-write and make the code simpler. Cc: <stable@vger.kernel.org> Signed-off-by: NLior Amsalem <alior@marvell.com> Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 16 4月, 2014 3 次提交
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由 Yuan Yao 提交于
Because of some driver base on DMA, changed the initcall order as subsys_initcall. Signed-off-by: NYuan Yao <yao.yuan@freescale.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Dan Carpenter 提交于
The ">" here should be ">=" or we are one step beyond the end of the sdma->channels[] array. Fixes: 2e041c94 ('dmaengine: sirf: enable generic dt binding for dma channels') Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Acked-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Jean Delvare 提交于
VIDEO_TIMBERDALE selects TIMB_DMA which itself depends on MFD_TIMBERDALE, so VIDEO_TIMBERDALE should either select or depend on MFD_TIMBERDALE as well. I chose to make it depend on it because I think it makes more sense and it is consistent with what other options are doing. Adding a "|| HAS_IOMEM" to the TIMB_DMA dependencies silenced the kconfig warning about unmet direct dependencies but it was wrong: without MFD_TIMBERDALE, TIMB_DMA is useless as the driver has no device to bind to. Signed-off-by: NJean Delvare <jdelvare@suse.de> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Mauro Carvalho Chehab <m.chehab@samsung.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 14 4月, 2014 1 次提交
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由 Sekhar Nori 提交于
The code to handle any length SG lists calls edma_resume() even before edma_start() is called. This is incorrect because edma_resume() enables edma events on the channel after which CPU (in edma_start) cannot clear posted events by writing to ECR (per the EDMA user's guide). Because of this EDMA transfers fail to start if due to some reason there is a pending EDMA event registered even before EDMA transfers are started. This can happen if an EDMA event is a byproduct of device initialization. Fix this by calling edma_resume() only if it is not the first batch of MAX_NR_SG elements. Without this patch, MMC/SD fails to function on DA850 EVM with DMA. The behaviour is triggered by specific IP and this can explain why the issue was not reported before (example with MMC/SD on AM335x). Tested on DA850 EVM and AM335x EVM-SK using MMC/SD card. Cc: stable@vger.kernel.org # v3.12.x+ Cc: Joel Fernandes <joelf@ti.com> Acked-by: NJoel Fernandes <joelf@ti.com> Tested-by: NJon Ringle <jringle@gridpoint.com> Tested-by: NAlexander Holler <holler@ahsoftware.de> Reported-by: NJon Ringle <jringle@gridpoint.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 05 4月, 2014 1 次提交
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由 Andy Gross 提交于
Add the DMA engine driver for the QCOM Bus Access Manager (BAM) DMA controller found in the MSM 8x74 platforms. Each BAM DMA device is associated with a specific on-chip peripheral. Each channel provides a uni-directional data transfer engine that is capable of transferring data between the peripheral and system memory (System mode), or between two peripherals (BAM2BAM). The initial release of this driver only supports slave transfers between peripherals and system memory. Signed-off-by: NAndy Gross <agross@codeaurora.org> Tested-by: NStanimir Varbanov <svarbanov@mm-sol.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 04 4月, 2014 20 次提交
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由 Russell King 提交于
We can move the handling of the DMA synchronisation control out of the prepare functions; this can be pre-calculated when the DMA channel has been allocated, so we don't need to duplicate this in both prepare functions. Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Move the interrupt handling for OMAP2+ into omap-dma, rather than using the legacy support in the platform code. Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Export the DMA register information from the SoC specific data, such that we can access the registers directly in omap-dma.c, mapping the register region ourselves as well. Rather than calculating the DMA channel register in its entirety for each access, we pre-calculate an offset base address for the allocated DMA channel and then just use the appropriate register offset. Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Provide a function to read the CSAC/CDAC register, working around the OMAP 3.2/3.3 erratum (which requires two reads of the register if the first returned zero. Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Provide a pair of channel register accessors, and a pair of global accessors for non-channel specific registers. Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
We don't need to read-modify-write the CCR register; we already know what value it should contain at this point. Use the cached CCR value when setting the enable bit. Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
We don't need to issue a barrier for every segment of a DMA transfer; doing this just once per descriptor will do. Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Move the clnk_ctrl setup to the preparation functions, saving its value in the omap_desc. This only needs to be set once per descriptor, not for each segment, so set it in omap_dma_start_desc() rather than omap_dma_start(). Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
The only thing which changes is which registers are written, so put this in local variables instead. This results in smaller code. Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Consolidate clearing of the channel status register, rather than open coding the same functionality in two places. Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Since we record the CCR register in the dma transaction, we can move the processing of the iframe buffering errata out of the omap_dma_start(). Move it to the preparation functions. Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Provide our own set of more complete register definitions; this allows us to get rid of the meaningless 1 << n constants scattered throughout this code. Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Consolidate the setup of the channel control register. Prepare the basic value in the preparation of the DMA descriptor, and write it into the register upon descriptor execution. Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Consolidate the setup of the channel source destination parameters register. This way, we calculate the required CSDP value when we setup a transfer descriptor, and only write it to the device registers once when we start the descriptor. Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Read the current DMA position from the hardware directly rather than via arch/arm/plat-omap/dma.c. Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Program the non-cyclic mode DMA start/stop directly, rather than via arch/arm/plat-omap/dma.c. Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
There's no need to keep writing registers which don't change value in omap_dma_start_sg(). Move this into omap_dma_start_desc() and merge the register updates together. Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Program the transfer parameters directly into the hardware, rather than using the functions in arch/arm/plat-omap/dma.c. Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Provide and use a hook to obtain the underlying DMA platform operations so that omap-dma.c can access the hardware more directly without involving the legacy DMA driver. Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Use devm_kzalloc() to allocate omap_dmadev() so that we don't need complex error cleanup paths. Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 29 3月, 2014 3 次提交
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由 Kuninori Morimoto 提交于
Add support Audio DMAC peri peri driver for Renesas R-Car Gen2 SoC, using 'shdma-base' DMA driver framework. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> [fixed checkpatch error] Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Barry Song 提交于
move to support of_dma_request_slave_channel() and dma_request_slave_channel. we add a xlate() to let dma clients be able to find right dma_chan by generic "dmas" properties in dts. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Peter Ujfalusi 提交于
With the callback implemented omap-dma can provide information to client drivers regarding to supported address widths, directions, residue granularity, etc. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 26 3月, 2014 3 次提交
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由 Chew, Chiau Ee 提交于
This is to disable/enable DW_DMAC hw during late suspend/early resume. Since DMA is providing service to other clients (eg: SPI, HSUART), we need to ensure DMA suspends after the clients and resume before the clients are active. Signed-off-by: NChew, Chiau Ee <chiau.ee.chew@intel.com> Acked-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Andy Shevchenko 提交于
This makes the probe() function a little bit clearer. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Jerome Blin 提交于
Prevents test result strings from being output on same line. Issue will happen with verbose and multi-iteration modes enabled. Signed-off-by: NJerome Blin <jerome.blin@intel.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 17 3月, 2014 2 次提交
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由 Vinod Koul 提交于
As discussed in [1] the tasklet_disable is not a proper function for teardown. We need to ensure irq is disabled, followed by ensuring that don't schedule any more tasklets and then its safe to use tasklet_kill(). Here in pch dma driver we need to use free_irq() before tasklet_kill(). So move up the free_irq() which will ensure that the irq is disabled and also wait till all scheduled interrupts are executed by invoking synchronize_irq(). [1]: http://lwn.net/Articles/588457/Reported-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Vinod Koul 提交于
As discussed in [1] the tasklet_disable is not a proper function for teardown. We need to ensure irq is disabled, followed by ensuring that don't schedule any more tasklets and then its safe to use tasklet_kill(). Here in at_hdmac driver we use free_irq() before tasklet_kill(). The free_irq() will ensure that the irq is disabled and also wait till all scheduled interrupts are executed by invoking synchronize_irq(). So we need to only do tasklet_kill() after invoking free_irq() [1]: http://lwn.net/Articles/588457/Reported-by: NThomas Gleixner <tglx@linutronix.de> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 11 3月, 2014 2 次提交
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由 George Cherian 提交于
Start the channel tear down only if the channel is busy, else just bail out. In some cases its seen that by the time the tear down is initiated the cppi completes the DMA, especially in ISOCH transfers. Signed-off-by: NGeorge Cherian <george.cherian@ti.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Dan Carpenter 提交于
There is a bug in s3c24xx_dma_probe() where we do: phy->irq = platform_get_irq(pdev, i); if (phy->irq < 0) { The problem is that "phy->irq" is unsigned so the error handling doesn't work. I have changed it to signed. Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 06 3月, 2014 3 次提交
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由 Alexander Shiyan 提交于
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Alexander Shiyan 提交于
Use the dev_* message logging API instead of raw printk. Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Jingchang Lu 提交于
The static checker reports following warning: drivers/dma/fsl-edma.c:732 fsl_edma_xlate() error: we previously assumed 'chan' could be null (see line 737) The changes of the loop cursor in the iteration may result in NULL dereference when dma_get_slave_channel failed but loop will continue. So use list_for_each_entry_safe() instead of list_for_each_entry() to against this. Reported-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NJingchang Lu <b35083@freescale.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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