- 13 11月, 2015 1 次提交
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由 Peter Ujfalusi 提交于
Some module needs more than one functional clock in order to be accessible, like the McASPs found in DRA7xx family. This flag will indicate that the opt_clks need to be handled at the same time as the main_clk for the given hwmod, ensuring that all needed clocks are enabled before we try to access the module's address space. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: NPaul Walmsley <paul@pwsan.com> Tested-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 24 7月, 2015 1 次提交
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由 Tony Lindgren 提交于
Let's add minimal set of dm814x hwmods to have a bootable system. Cc: Matthijs van Duin <matthijsvanduin@gmail.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 16 7月, 2015 1 次提交
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由 Lokesh Vutla 提交于
Some IP blocks like RTC, needs an additional setting for writing to its registers. This is to prevent any spurious writes from changing the register values. This patch adds optional lock and unlock function pointers to the IP block's hwmod data. These unlock and lock function pointers are called by hwmod code before and after writing sysconfig registers. Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com> [paul@pwsan.com: fixed indentation level to conform with the rest of the structure members] Reviewed-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 02 6月, 2015 1 次提交
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由 Tony Lindgren 提交于
We support decoding the bootloader values if DEBUG is defined. But we also need to change the struct omap_hwmod flags to have HWMOD_INIT_NO_RESET to avoid the GPMC being reset during the boot. Otherwise just the default timings will be displayed instead of the bootloader configured timings. This also allows us to clean up the various GPMC related hwmod flags. For debugging, we only need HWMOD_INIT_NO_RESET, and HWMOD_INIT_NO_IDLE is not needed. Cc: Brian Hutchinson <b.hutchman@gmail.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Roger Quadros <rogerq@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 26 2月, 2015 1 次提交
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由 Peter Ujfalusi 提交于
Add struct lock_class_key to omap_hwmod struct and use it to set unique lockdep class per hwmod. This will ensure that lockdep will know that each omap_hwmod->_lock should be treated as separate class and will not give false warning about deadlock or other issues due to nested use of hwmods. DRA7x's ATL hwmod is one example for this since McASP can select ATL clock as functional clock, which will trigger nested oh->_lock usage. This will trigger false warning from lockdep validator as it is dealing with classes and for it all hwmod clocks are the same class. Suggested-by: NPeter Zijlstra <peterz@infradead.org> Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 27 1月, 2015 1 次提交
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由 Tony Lindgren 提交于
Add minimal hwmod support that works at least on dm8168. This is based on the code in the earlier TI CDP tree, and an earlier patch by Aida Mynzhasova <aida.mynzhasova@skitlab.ru>. I've set up things to work pretty much the same way as for am33xx. We are basically using cm33xx.c with a different set of clocks and clockdomains. This code is based on the TI81XX-LINUX-PSP-04.04.00.02 patches published at: http://downloads.ti.com/dsps/dsps_public_sw/psp/LinuxPSP/TI81XX_04_04/04_04_00_02/index_FDS.html Cc: Aida Mynzhasova <aida.mynzhasova@skitlab.ru> Cc: Brian Hutchinson <b.hutchman@gmail.com> Acked-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 18 1月, 2015 1 次提交
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由 Marc Zyngier 提交于
Commit 9a1091ef ("irqchip: gic: Support hierarchy irq domain") changed the GIC driver to use a non-legacy IRQ domain on DT platforms. This patch assumes that DT-driven systems are getting all of their interrupts from device tree. Turns out that OMAP has quite a few hidden gems, and still uses hardcoded interrupts despite having fairly complete DTs. This patch attempts to work around these by offering a translation method that can be called directly from the hwmod code, if present. The same hack is sprinkled over PRCM and TWL. It isn't pretty, but it seems to do the job without having to add more hacks to the interrupt controller code. Tested on OMAP4 (Panda-ES) and OMAP5 (UEVM5432). Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Acked-by: NNishanth Menon <nm@ti.com> [tony@atomide.com: updated to fix make randconfig issue] Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 08 1月, 2015 1 次提交
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由 Rickard Strandqvist 提交于
Removes some functions that are not used anywhere: omap_hwmod_pad_route_irq() omap_hwmod_no_setup_reset() omap_hwmod_read_hardreset() omap_hwmod_del_initiator_dep() omap_hwmod_enable_clocks() omap_hwmod_reset() omap_hwmod_ocp_barrier() omap_hwmod_disable_clocks() omap_hwmod_add_initiator_dep() This was partially found by using a static code analysis program called cppcheck. Signed-off-by: NRickard Strandqvist <rickard_strandqvist@spectrumdigital.se> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 20 11月, 2014 1 次提交
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由 Tomi Valkeinen 提交于
Add parent_hwmod pointer to omap_hwmod. This can be set to point to a "parent" hwmod that needs to be enabled for the "child" hwmod to work. This is used at hwmod setup time: when doing the initial setup and reset, first enable the parent hwmod, and after setup and reset is done, restore the parent hwmod to postsetup_state. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: NArchit Taneja <archit.taneja@gmail.com> [paul@pwsan.com: add kerneldoc documentation for parent_hwmod; note that it is a temporary workaround] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 18 9月, 2014 1 次提交
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由 Tony Lindgren 提交于
Commit cc824534 ("ARM: OMAP2+: hwmod: Rearm wake-up interrupts for DT when MUSB is idled") fixed issues with hung UART wake-up events by calling _reconfigure_io_chain() when MUSB is connected or disconnected. As pointed out by Paul Walmsley, we may need to also call _reconfigure_io_chain() in other cases, so it should be a separate flag. Let's add HWMOD_RECONFIG_IO_CHAIN as suggested by Paul. Reviewed-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 14 10月, 2013 1 次提交
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由 Afzal Mohammed 提交于
Add hwmod support for IP's that are present in AM43x, but not in AM335x. AM43x additional ones added here are, 1. synctimer 2. timer8-11 3. ehrpwm3-5 4. spi2-4 5. gpio4-5 AM43x pruss interconnect which is different as compared to AM335x, has been taken care. And register offsets for same hwmod's shared with AM335x is different, AM43x register offsets are updated appropriately. ocp clock of those in l4_wkup is fed from "sys_clkin_ck" instead of "dpll_core_m4_div2_ck", so "ocpif" for those in AM43x l4_wkup has been added seperately. hwmod's has been added for those that have main clock (wkup_m3, control, gpio0) and clock domain (l4_hs) different from AM335x. debugss and adc_tsc that have different clocks and clockdomains repectively has not been added due to the reasons mentioned below. AM43x also has IP's like qspi, hdq1w, vpfe, des, rng, usb, dss, debugss, adc_tsc. These are not handled here due to both/either of following reasons, 1. To avoid churn; most of them don't have DT bindings, which would necessitate adding address space in hwmod, which any way would have to be removed once DT bindings happen with driver support. 2. patches would come in from sources other than the author Signed-off-by: NAfzal Mohammed <afzal@ti.com> Acked-by: NRajendra Nayak <rnayak@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 23 8月, 2013 1 次提交
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由 Ambresh K 提交于
Adding the hwmod data for DRA7XX platforms. Signed-off-by: NAmbresh K <ambresh@ti.com> Signed-off-by: NTero Kristo <t-kristo@ti.com> Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 30 7月, 2013 2 次提交
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由 Afzal Mohammed 提交于
Address space is being removed from hwmod database and DT information in <reg> property is being used. Currently the 0th index of device address space is used to map for register target address. This is not always true, eg. cpgmac has it's sysconfig in second address space. Handle it by specifying index of device address space to be used for register target. As default value of this field would be zero with static initialization, existing behaviour of using first address space for register target while using DT would be kept as such. Signed-off-by: NAfzal Mohammed <afzal@ti.com> Tested-by: NMugunthan V N <mugunthanvnm@ti.com> [paul@pwsan.com: use u8 rather than int to save memory] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Rajendra Nayak 提交于
With commit '82702ea1' "ARM: OMAP2+: Fix serial init for device tree based booting" stubbing out omap_serial_early_init() for Device tree based booting, there was a crash observed on AM335x based devices when hwmod does a _setup_reset() early at boot. This was rootcaused to hwmod trying to reset console uart while earlycon was using it. The way to tell hwmod not to do this is to specify the HWMOD_INIT_NO_RESET flag, which were infact set by the omap_serial_early_init() function by parsing the cmdline to identify the console device. Parsing the cmdline to identify the uart used by earlycon itself seems broken as there is nothing preventing earlycon to use a different one. This patch, instead, attempts to populate the requiste flags for hwmod based on the CONFIG_DEBUG_OMAPxUARTy FLAGS. This gets rid of the need for cmdline parsing in the DT as well as non-DT cases to identify the uart used by earlycon. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Reported-by: NMark Jackson <mpfj-list@newflow.co.uk> Reported-by: NVaibhav Bedia <vaibhav.bedia@ti.com> Tested-by: NMark Jackson <mpfj-list@newflow.co.uk> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 09 6月, 2013 1 次提交
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由 Benoit Cousson 提交于
Adding the hwmod data for OMAP54xx SOCs. Additional changes done on top of initial SOC data files. - The IO resource information like dma request lines, irq number and ocp address space can be populated via dt blob. So such data is stripped from OMAP5 SOC hwmod data file. - SDMA IO resource information is still kept since dmaengine work is till ongoing. Once the legacy dma platform driver becomes obsolete, SDMA io space information can be removed. - The devices like dss, aess, usb which are missing the device tree bindings, hwmod data is not added since OMAP5 is DT only build. When such devices add the dt bindings, respective hwmod data can be added along with it. With above update, we now need about ~2000 loc vs ~6000 loc with previous version of the patch for OMAP5 hwmod data file. Ofcourse with addition of few more drivers it can go upto ~2400 loc which is still better than the earlier version. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 20 5月, 2013 2 次提交
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由 Santosh Shilimkar 提交于
With the OMAP serial driver sysc cleanup patches in this series, we can now remove the hwmod external apis for sysc fiddling. While at this, also remove unused sysc auto idle api from hwmod code. Tested-by: NVaibhav Bedia <vaibhav.bedia@ti.com> Tested-by: NSourav Poddar <sourav.poddar@ti.com> Signed-off-by: NRajendra nayak <rnayak@ti.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: NKevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> # OMAP4/Panda Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Rajendra Nayak 提交于
Some IPs (like UART) need the sidle mode to be controlled in SW only while they are active. Once they go inactive, they need the IP to be put back in HW control so they are also wakeup capable. The flag HWMOD_SWSUP_SIDLE takes care of IPs which need the sidle mode to be *always* controlled in SWSUP. We now have a need to control IPs sidle mode in SWSUP only while its active. So define a new flag 'HWMOD_SWSUP_SIDLE_ACT' to help the framework know about these new IP requirements. Tested-by: NVaibhav Bedia <vaibhav.bedia@ti.com> Tested-by: NSourav Poddar <sourav.poddar@ti.com> Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: NKevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> # OMAP4/Panda Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 01 4月, 2013 1 次提交
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由 Rajendra Nayak 提交于
_HWMOD_WAKEUP_ENABLED is currently unused across the hwmod framework. Just get rid of it, so we have one less flag to worry about. Tested-by: NVaibhav Bedia <vaibhav.bedia@ti.com> Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 13 3月, 2013 1 次提交
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由 Grazvydas Ignotas 提交于
For some unknown reason, allowing hwmod to control MIDLEMODE causes core_pwrdm to not hit idle states for musb in DM3730 at least. I've verified that setting any MIDLEMODE value other than "force standby" before enabling the device causes subsequent suspend attempts to fail with core_pwrdm not entering idle states, even if the driver is unloaded and "force standby" is restored before suspend attempt. To recover from this, soft reset can be used, but that's not suitable solution for suspend. Keeping the register set at force standby (reset value) makes it work and device still functions properly, as musb has driver-controlled OTG_FORCESTDBY register that controls MSTANDBY signal. Note that TI PSP kernels also have similar workarounds. This patch also fixes HWMOD_SWSUP_MSTANDBY documentation to match the actual flag name. Signed-off-by: NGrazvydas Ignotas <notasas@gmail.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 11 2月, 2013 2 次提交
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由 Paul Walmsley 提交于
Enable the AESS auto-gating control bit during AESS hwmod setup. This fixes the following boot warning on OMAP4: omap_hwmod: aess: _wait_target_disable failed Without this patch, the AESS IP block does not indicate to the PRCM that it is idle after it is reset. This prevents some types of SoC power management until something sets the auto-gating control bit. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NSebastien Guiriec <s-guiriec@ti.com> Cc: Benoît Cousson <b-cousson@ti.com> Cc: Péter Ujfalusi <peter.ujfalusi@ti.com> Cc: Tony Lindgren <tony@atomide.com>
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由 Paul Walmsley 提交于
After setup/enable, some IP blocks need some additional setting to indicate the PRCM that they are inactive until they are configured. Some examples on OMAP4 include the AESS and FSUSB IP blocks. To fix this cleanly, this patch adds another optional function pointer, enable_preprogram, to the IP block's hwmod data. The function that is pointed to is called by the hwmod code immediately after the IP block is reset. This version of the patch includes a patch description fix from Felipe. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NSebastien Guiriec <s-guiriec@ti.com> Cc: Benoît Cousson <b-cousson@ti.com> Cc: Péter Ujfalusi <peter.ujfalusi@ti.com> Cc: Felipe Balbi <balbi@ti.com>
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- 07 2月, 2013 1 次提交
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由 Paul Walmsley 提交于
Apparently, on some OMAPs, the MPU can't be allowed to enter WFI while certain peripherals are active. It's not clear why, and it's likely that there is simply some other bug in the driver or integration code. But since the likelihood that anyone will have the time to track these problems down in the future seems quite small, we'll provide a flag, HWMOD_BLOCK_WFI, to mark these issues in the hwmod data. Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 26 1月, 2013 1 次提交
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由 Paul Walmsley 提交于
Apparently, on some OMAPs, the MPU can't be allowed to enter WFI while certain peripherals are active. It's not clear why, and it's likely that there is simply some other bug in the driver or integration code. But since the likelihood that anyone will have the time to track these problems down in the future seems quite small, we'll provide a flag, HWMOD_BLOCK_WFI, to mark these issues in the hwmod data. Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 22 11月, 2012 2 次提交
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由 Peter Ujfalusi 提交于
Add flags parameter for omap_hwmod_count_resources() so users can tell which type of resources they are interested when counting them in hwmod database. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: NBenoît Cousson <b-cousson@ti.com> [paul@pwsan.com: updated to apply] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Rajendra Nayak 提交于
OMAP4 has module specific context lost registers which makes it now possible to have module level context loss count, instead of relying on the powerdomain level context count. Add 2 private hwmod api's to update/clear the hwmod/module specific context lost counters/register. Update the module specific context_lost_counter and clear the hardware bits just after enabling the module. omap_hwmod_get_context_loss_count() now returns the hwmod context loss count them on platforms where they exist (OMAP4), else fall back on the pwrdm level counters for older platforms. Signed-off-by: NRajendra Nayak <rnayak@ti.com> [paul@pwsan.com: added function kerneldoc, fixed structure kerneldoc, rearranged structure to avoid memory waste, marked fns as OMAP4-specific, prevent fn entry on non-OMAP4 chips, reduced indentation, merged update and clear, merged patches] [t-kristo@ti.com: added support for arch specific hwmod ops, and changed the no context offset indicator to USHRT_MAX] Signed-off-by: NTero Kristo <t-kristo@ti.com> [paul@pwsan.com: use NO_CONTEXT_LOSS_BIT flag rather than USHRT_MAX; convert unsigned context lost counter to int to match the return type; get rid of hwmod_ops in favor of the existing soc_ops mechanism; move context loss low-level accesses to the PRM code] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 19 10月, 2012 2 次提交
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由 Tony Lindgren 提交于
We want to remove plat/cpu.h. To do this, let's first split it to private soc.h to mach-omap1 and mach-omap2. We have to keep plat/cpu.h around until the remaining drivers are fixed, so let's include the local soc.h in plat/cpu.h and for drivers still including plat/cpu.h. Once the drivers are fixed not to include plat/cpu.h, we can remove the file. This is needed for the ARM common zImage support. [tony@atomide.com: updated to not print a warning] Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Let's make omap_hwmod local to mach-omap2 for ARM common zImage support. Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 24 9月, 2012 3 次提交
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由 Tero Kristo 提交于
On OMAP4 most modules/hwmods support module level context status. On OMAP3 and earlier, we relied on the power domain level context status. Identify all modules that don't support 'context_offs' by adding a flag bit, HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT. Rest have a valid 'context_offs' populated in .prcm structure already. Signed-off-by: NTero Kristo <t-kristo@ti.com> [paul@pwsan.com: add flag bit rather than overloading .context_offs; update changelog message] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Tero Kristo 提交于
Currently hwmod only provides the offset for the context lose register, and if we attempt to share the same register between two or more hwmods, the resulting context loss counts get wrong. Thus, we need a way to specify which bits are used for the context loss information for each. This is accomplished by adding a new field to the omap4 prcm struct, 'lostcontext_mask', which specifies a bit-mask to use for filtering the register. Mark the affected hwmods appropriately. 'l4_abe' hwmod uses the LOSTMEM_AESSMEM bit of RM_ABE_AESS_CONTEXT register, as l4_abe doesn't have its own dedicated register for this purpose. This register is shared with 'aess' hwmod, thus both hwmods must also specify which bits of the register are used for them. This patch only adds the hwmod data, but a future patch should add code support such that only the specified bits are read and cleared by the context lose counter update code. If a hwmod doesn't specify 'lostcontext_mask' (default behavior), the whole contents of the context register should be used without any filtering. Signed-off-by: NTero Kristo <t-kristo@ti.com> [paul@pwsan.com: updated to apply after conversion to use flag bit for missing module context-loss register; combined data and code patches; dropped code change due to serial driver breakage] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Igor Grinberg 提交于
Several hwmod function prototypes appear to not have an implementation because the corresponding functions were removed or renamed. Those prototypes are unneeded anymore - remove them. Signed-off-by: NIgor Grinberg <grinberg@compulab.co.il> [paul@pwsan.com: tweaked subject] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 12 9月, 2012 1 次提交
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由 Vaibhav Hiremath 提交于
This patch adds HWMOD data for all the peripherals of AM335X device and also hooks up to the existing OMAP framework. hwmod data has been already been cleaned up for the recent changes in clocktree, where all leaf nodes have been removed, since with modulemode based control, both clock and hwmod interface does same thing. This reduces the code size to large extent and also avoids duplication of same control. So instead of specifying module's leaf node as a main_clk, now we are relying on parent clock of module's functional clock. Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: NAfzal Mohammed <afzal@ti.com> Signed-off-by: NVaibhav Bedia <vaibhav.bedia@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> [paul@pwsan.com: removed period in hwmod device names; changed mmc2 main_clk to mmc_clk at Vaibhav's request; added trailing commas to structure records at Tony's request to deal with some rmk parsing issues; added OMAP_INTC_START to facilitate sparse-IRQ conversion] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 08 9月, 2012 1 次提交
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由 Vaibhav Hiremath 提交于
With the new devices (like, AM33XX and OMAP5) we now only support DT boot mode of operation and now it is the time to start killing slowly the dependency on hwmod, so with this patch, we are starting with device resources. The idea here is implemented considering to both boot modes - - DT boot mode OF framework will construct the resource structure (currently does for MEM & IRQ resource) and we should respect/use these resources, killing hwmod dependency. If pdev->num_resources > 0, we assume that MEM & IRQ resources have been allocated by OF layer already (through DTB). Once DMA resource is available from OF layer, we should kill filling any resources from hwmod. - Non-DT boot mode Here, pdev->num_resources = 0, and we should get all the resources from hwmod (following existing steps) Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@ti.com> [b-cousson@ti.com: Fix some checkpatch CHECK issues] Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
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- 06 7月, 2012 1 次提交
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由 Tony Lindgren 提交于
Commit ac5b0ea3 (Merge tag 'omap-devel-f-for-3.6'...) had a merge conflict that somehow got incorrecly resolved in a lossy way for commit bed9d1bb (ARM: OMAP2+: hwmod: add omap_hwmod_get_main_clk() API). Fix the issue by applying the missing pieces. Reported-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 04 7月, 2012 4 次提交
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由 Kishon Vijay Abraham I 提交于
The DMADISABLE bit is a semi-automatic bit present in sysconfig register of some modules. When the DMA must perform read/write accesses, the DMADISABLE bit is cleared by the hardware. But when the DMA must stop for power management, software must set the DMADISABLE bit back to 1. In cases where the ROMCODE/BOOTLOADER uses dma, the hardware clears the DMADISABLE bit (but the romcode/bootloader might not set it back to 1). In order for the kernel to start in a clean state, it is necessary for the kernel to set DMADISABLE bit back to 1 (irrespective of whether it's been set to 1 in romcode or bootloader). During _reset of the (hwmod)device, the DMADISABLE bit is set so that it does not prevent idling of the system. (NOTE: having DMADISABLE to 0, prevents the system to idle) DMADISABLE bit is present in usbotgss module of omap5. Cc: Benoit Cousson <b-cousson@ti.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> [paul@pwsan.com: updated to apply; fixed checkpatch warnings] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Tarun Kanti DebBarma 提交于
Add an API to get main clock name associated with a given @oh. This will avoid the need to construct fclk names during early initialization in order to get fclk handle using clk_get(). Signed-off-by: NTarun Kanti DebBarma <tarun.kanti@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Vaibhav Hiremath 提交于
In case of AM33XX device, XXX_RSTST register offset is not consistent across PRM modules/instances, PRM_XXX RSTST ========================= PRM_PER_MOD: 0x04 PRM_WKUP_MOD: 0x0C PRM_MPU_MOD: NA PRM_DEVICE_MOD: 0x08 This means, we need to pass on XXX_RSTST register offset information through omap_hwmod data, similar to XXX_RSTCTRL. Currently, this field is only applicable and used for AM33XX devices. Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Vaibhav Hiremath 提交于
In case of AM33xx family of devices (like cpsw) have different sysc bit field offsets defined, sysc_type3: | 3 2 | 1 0 | | STDBYMODE | IDLEMODE | So introduce new sysc_type3 in omap_hwmod common data. Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: NVaibhav Bedia <vaibhav.bedia@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 19 6月, 2012 1 次提交
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由 Kevin Hilman 提交于
The enable/disable module functions are specific to SoCs with OMAP4-class PRCM. Rather than use cpu_is* checks at runtime inside the enable/disable module functions, use cpu_is at init time to initialize function pointers only for SoCs that need them. NOTE: the cpu_is* check for _enable_module was different than the one for _disable_module, and this patch uses cpu_is_omap44xx() for both. Signed-off-by: NKevin Hilman <khilman@ti.com> [paul@pwsan.com: moved soc_ops function pointers to be per-kernel rather than per-hwmod since they do not vary by hwmod; added kerneldoc] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 20 4月, 2012 1 次提交
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由 Paul Walmsley 提交于
Add the SL2 interface IP block and interconnect data. The SL2 is related to the IVA-HD subsystem. Add IP block and interconnect data for the C2C ("Chip-to-chip") interconnect. This can provide a direct system interconnect link to other devices stacked on the OMAP package. Add the ELM IP block and interconnect data. The ELM can be used to locate errors in NAND flash connected to the GPMC. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NBenoît Cousson <b-cousson@ti.com>
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- 19 4月, 2012 1 次提交
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由 Paul Walmsley 提交于
Now that the data has been converted to use interface registration, we can remove the (now unused) direct hwmod registration code. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Benoît Cousson <b-cousson@ti.com>
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