1. 13 11月, 2015 1 次提交
  2. 24 10月, 2015 4 次提交
  3. 23 10月, 2015 2 次提交
  4. 22 10月, 2015 1 次提交
  5. 20 10月, 2015 2 次提交
  6. 19 10月, 2015 1 次提交
    • T
      ARM: OMAP2+: Fix imprecise external abort caused by bogus SRAM init · 57df5380
      Tony Lindgren 提交于
      Some omaps are producing imprecise external aborts because we are
      wrongly trying to init SRAM for device tree based booting. Only
      omap3 is still using the legacy SRAM code, so we need to make it
      omap3 specific. Otherwise we can get errors like this on at least
      dm814x:
      
      Unhandled fault: imprecise external abort (0xc06) at 0xc08b156c
      ...
      (omap_rev) from [<c08b12e0>] (omap_sram_init+0xf8/0x3e0)
      (omap_sram_init) from [<c08aca0c>] (omap_sdrc_init+0x10/0xb0)
      (omap_sdrc_init) from [<c08b581c>] (pdata_quirks_init+0x18/0x44)
      (pdata_quirks_init) from [<c08b5478>] (omap_generic_init+0x10/0x1c)
      (omap_generic_init) from [<c08a57e0>] (customize_machine+0x1c/0x40)
      (customize_machine) from [<c00098a4>] (do_one_initcall+0x80/0x1dc)
      (do_one_initcall) from [<c08a2ec4>] (kernel_init_freeable+0x218/0x2e8)
      (kernel_init_freeable) from [<c063a554>] (kernel_init+0x8/0xec)
      (kernel_init) from [<c000f890>] (ret_from_fork+0x14/0x24)
      
      Let's fix the issue by making sure omap_sdrc_init only gets called for
      omap3. To do that, we need to have compatible "ti,omap3" in the dts
      files. And let's also use "ti,omap3630" instead of "ti,omap36xx" like
      we're supposed to.
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      57df5380
  7. 17 10月, 2015 7 次提交
    • T
      ARM: OMAP2+: Fix oops with LPAE and more than 2GB of memory · 6a3b764b
      Tony Lindgren 提交于
      On boards with more than 2GB of RAM booting goes wrong with things not
      working and we're getting lots of l3 warnings:
      
      WARNING: CPU: 0 PID: 1 at drivers/bus/omap_l3_noc.c:147
      l3_interrupt_handler+0x260/0x384()
      44000000.ocp:L3 Custom Error: MASTER MMC6 TARGET DMM1 (Idle):
      Data Access in User mode during Functional access
      ...
      [<c044e158>] (scsi_add_host_with_dma) from [<c04705c8>]
      (ata_scsi_add_hosts+0x5c/0x18c)
      [<c04705c8>] (ata_scsi_add_hosts) from [<c046b13c>]
      (ata_host_register+0x150/0x2cc)
      [<c046b13c>] (ata_host_register) from [<c046b38c>]
      (ata_host_activate+0xd4/0x124)
      [<c046b38c>] (ata_host_activate) from [<c047f42c>]
      (ahci_host_activate+0x5c/0x194)
      [<c047f42c>] (ahci_host_activate) from [<c0480854>]
      (ahci_platform_init_host+0x1f0/0x3f0)
      [<c0480854>] (ahci_platform_init_host) from [<c047c9dc>]
      (ahci_probe+0x70/0x98)
      [<c047c9dc>] (ahci_probe) from [<c04220cc>]
      (platform_drv_probe+0x54/0xb4)
      
      Let's fix the issue by enabling ZONE_DMA for LPAE. Note that we need to
      limit dma_zone_size to 2GB as the rest of the RAM is beyond the 4GB limit.
      
      Let's also fix things for dra7 as done in similar patches in the TI tree
      by Lokesh Vutla <lokeshvutla@ti.com>.
      Reviewed-by: NLokesh Vutla <lokeshvutla@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      6a3b764b
    • K
      ARM: OMAP: Change all cpu_is_* occurences to soc_is_* for id.c · 3ea4a182
      Keerthy 提交于
      Currently apart from dra7, omap5 and amx3 all the other SoCs
      are identified using cpu_is_* functions which is not right since
      they are all SoCs(System on Chips). Hence changing the SoC
      identification code to use soc_is instead of cpu_is and keeping
      defines for cpu_is where needed. This allows us to replace the
      rest of cpu_is usage along with other fixes as needed.
      Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      Signed-off-by: NKeerthy <j-keerthy@ti.com>
      [tony@atomide.com: reworked the soc.h changes to minimum]
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      3ea4a182
    • T
      ARM: OMAP2+: Rename cpu_is macros to soc_is · d0b50905
      Tony Lindgren 提交于
      The naming for the cpu_is macros is confusing as the CPU is separate
      and within the SoC. Let's rename all the macros to soc_is, and let's
      define cpu_is also for the ones still in use. Then we can just remove
      the cpu_is macros once the users are fixed up.
      
      To keep the chances of breaking anything, the changes were
      generated with the following regular expressions:
      
      s/cpu_is/soc_is/g
      s/CPU/SoC/g
      
      Then the list of existing cpu_is users was generated with:
      
      $ $ grep -o -e 'cpu_is_.\+()' arch/arm/mach-omap2/*.[chS] | \
      	cut -d: -f2 | sort | uniq
      
      And added to the end of the soc.h.
      
      I decided to rework the earlier patches by Keerthy <j-keerthy@ti.com>
      to keep changes down to minimum to avoid potential errors and stick
      to just search and replace.
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      d0b50905
    • F
      arm: omap2: timer: limit hwmod usage to non-DT boots · bf4c9449
      Felipe Balbi 提交于
      now that we have a working 32k clocksource driver,
      we can limit HWMOD usage to non-DT boots and rely
      on clocksource_of_init() every time we boot
      with DT.
      
      While at that, also make sure that we don't disable
      the 32-counter device so it gets probed by its driver.
      Signed-off-by: NFelipe Balbi <balbi@ti.com>
      bf4c9449
    • F
      arm: omap2+: select 32k clocksource driver · 429ac200
      Felipe Balbi 提交于
      Now that we have a 32k clocksource driver, let's
      select it for OMAP2PLUS builds.
      Signed-off-by: NFelipe Balbi <balbi@ti.com>
      429ac200
    • F
      arm: omap2: timer: rename omap_sync32k_timer_init() · 6f82e25d
      Felipe Balbi 提交于
      this function is not only about the 32k sync
      timer, it's OMAP's generic init_time implementation.
      
      Let's rename it to make that detail easier to
      notice.
      Signed-off-by: NFelipe Balbi <balbi@ti.com>
      6f82e25d
    • F
      arm: omap2: timer: always call clocksource_of_init() when DT · 9c46ffcd
      Felipe Balbi 提交于
      If booting with DT, let's make sure to always
      call clocksource_of_init() as this will make
      it easier to move timer code to drivers/clocksource
      in the future.
      Signed-off-by: NFelipe Balbi <balbi@ti.com>
      9c46ffcd
  8. 16 10月, 2015 6 次提交
  9. 15 10月, 2015 1 次提交
    • T
      ARM: OMAP3: clock: remove un-used core dpll re-program code · d42f265a
      Tero Kristo 提交于
      Remove the OMAP3 core DPLL re-program code, and the associated SRAM
      code that does the low-level programming of the DPLL divider, idling
      of the SDRAM etc.
      
      This code was never fully implemented in the kernel; things missing
      were driver side handling of core clock changes (they need to account
      for their functional clock rate being changed on-the-fly), and the whole
      framework required for handling this. Thus, there is not much point
      to keep carrying the low-level support code either.
      Signed-off-by: NTero Kristo <t-kristo@ti.com>
      Cc: Paul Walmsley <paul@pwsan.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      d42f265a
  10. 14 10月, 2015 3 次提交
  11. 13 10月, 2015 3 次提交
  12. 01 10月, 2015 1 次提交
  13. 17 9月, 2015 1 次提交
  14. 16 9月, 2015 1 次提交
    • T
      genirq: Remove irq argument from irq flow handlers · bd0b9ac4
      Thomas Gleixner 提交于
      Most interrupt flow handlers do not use the irq argument. Those few
      which use it can retrieve the irq number from the irq descriptor.
      
      Remove the argument.
      
      Search and replace was done with coccinelle and some extra helper
      scripts around it. Thanks to Julia for her help!
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Cc: Julia Lawall <Julia.Lawall@lip6.fr>
      Cc: Jiang Liu <jiang.liu@linux.intel.com>
      bd0b9ac4
  15. 15 9月, 2015 4 次提交
  16. 02 9月, 2015 2 次提交