1. 06 10月, 2008 2 次提交
    • H
      atmel-mci: Implement tasklet as a state machine · c06ad258
      Haavard Skinnemoen 提交于
      With the current system of completed/pending events, things may get
      handled in different order depending on which event triggers first. For
      example, if the data transfer is complete before the command, the stop
      command must be sent after the command is complete, not the data. This
      creates a bit of complexity around the stop command.
      
      By having the tasklet go through a sequence of clearly defined states,
      things always happen in a certain order even if the events come at
      different times, so the stop command can simply be sent when we exit the
      "sending data" state because we will never enter that state before the
      command has been sent successfully.
      Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
      c06ad258
    • H
      atmel-mci: Initialize BLKR before sending data transfer command · a252e3e3
      Haavard Skinnemoen 提交于
      The atmel-mci driver sometimes fails data transfers like this:
      
         mmcblk0: error -5 transferring data
         end_request: I/O error, dev mmcblk0, sector 2749769
         end_request: I/O error, dev mmcblk0, sector 2749777
      
      It turns out that this might be caused by the BLKR register (which
      contains the block size and the number of blocks being transfered) being
      initialized too late. This patch moves the initialization of BLKR so
      that it contains the correct value before the block transfer command is
      sent.
      
      This error is difficult to reproduce, but if you insert a long delay
      (mdelay(10) or thereabouts) between the calls to atmci_start_command()
      and atmci_submit_data(), all transfers seem to fail without this patch,
      while I haven't seen any failures with this patch.
      Reported-by: NHein_Tibosch <hein_tibosch@yahoo.es>
      Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
      a252e3e3
  2. 20 9月, 2008 4 次提交
  3. 05 8月, 2008 1 次提交
  4. 27 7月, 2008 2 次提交
  5. 18 7月, 2008 1 次提交
    • B
      avr32: clean up mci platform code · fbfca4b8
      Ben Nizette 提交于
      This patch does a few small cleanups around the atmel mci platform code
      and in the atmel-mci driver.  The platform changes simply removes an
      unused variable, uses the fact that by the end we always have some form
      of platform data and notes that GPIO_PIN_NONE != 0.  This last point
      could cause the incorrect attempt to twice reserve pin PA0.
      
      While we've got the hood up, add linux/err.h to the atmel-mci.c include
      list.  It needs it and generally pulls it by voodoo but I did once
      stumble across a config which don't build.
      
      This is against Linus' latest git.
      Signed-off-by: NBen Nizette <bn@niasdigital.com>
      Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
      fbfca4b8
  6. 15 7月, 2008 2 次提交
    • P
      mmc: remove multiwrite capability · 23af6039
      Pierre Ossman 提交于
      Relax requirements on host controllers and only require that they do not
      report a transfer count than is larger than the actual one (i.e. a lower
      value is okay). This is how many other parts of the kernel behaves so
      upper layers should already be prepared to handle that scenario. This
      gives us a performance boost on MMC cards.
      Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
      23af6039
    • H
      atmel-mci: Driver for Atmel on-chip MMC controllers · 7d2be074
      Haavard Skinnemoen 提交于
      This is a driver for the MMC controller on the AP7000 chips from
      Atmel. It should in theory work on AT91 systems too with some
      tweaking, but since the DMA interface is quite different, it's not
      entirely clear if it's worth merging this with the at91_mci driver.
      
      This driver has been around for a while in BSPs and kernel sources
      provided by Atmel, but this particular version uses the generic DMA
      Engine framework (with the slave extensions) instead of an
      avr32-only DMA controller framework.
      
      This driver can also use PIO transfers when no DMA channels are
      available, and for transfers where using DMA may be difficult or
      impractical for some reason (e.g. the DMA setup overhead is usually
      not worth it for very short transfers, and badly aligned buffers or
      lengths are difficult to handle.)
      
      Currently, the driver only support PIO transfers. DMA support has been
      split out to a separate patch to hopefully make it easier to review.
      
      The driver has been tested using mmc-block and ext3fs on several SD,
      SDHC and MMC+ cards. Reads and writes work fine, with read transfer
      rates up to 3.5 MiB/s on fast cards with debugging disabled.
      
      The driver has also been tested using the mmc_test module on the same
      cards. All tests except 7, 9, 15 and 17 succeed. The first two are
      unsupported by all the cards I have, so I don't know if the driver
      handles this correctly. The last two fail because the hardware flags a
      Data CRC Error instead of a Data Timeout error. I'm not sure how to deal
      with that.
      
      Documentation for this controller can be found in many data sheets from
      Atmel, including the AT32AP7000 data sheet which can be found here:
      
      http://www.atmel.com/dyn/products/datasheets.asp?family_id=682Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
      Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
      7d2be074