- 14 12月, 2017 3 次提交
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由 Masahiro Yamada 提交于
struct nand_buffers is malloc'ed in nand_scan_tail() just for containing three pointers. Squash this struct into nand_chip. Move and rename as follows: chip->buffers->ecccalc -> chip->ecc.calc_buf chip->buffers->ecccode -> chip->ecc.code_buf chip->buffers->databuf -> chip->data_buf Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
The core currently send the READ0 and SEQIN+PAGEPROG commands in nand_do_read/write_ops(). This is inconsistent with ->read/write_oob[_raw]() hooks behavior which are expected to send these commands. There's already a flag (NAND_ECC_CUSTOM_PAGE_ACCESS) to inform the core that a specific controller wants to send the READ/SEQIN+PAGEPROG commands on its own, but it's an opt-in flag, and existing drivers are unlikely to be updated to pass it. Moreover, some controllers cannot dissociate the READ/PAGEPROG commands from the associated data transfer and ECC engine activation, and developers have to hack things in their ->cmdfunc() implementation to handle such complex cases, or have to accept the perf penalty of sending twice the same command. To address this problem we are planning on adding a new interface which is passed all information about a NAND operation (including the amount of data to transfer) and replacing all calls to ->cmdfunc() to calls to this new ->exec_op() hook. But, in order to do that, we need to have all ->cmdfunc() calls placed near their associated ->read/write_buf/byte() calls. Modify the core and relevant drivers to make NAND_ECC_CUSTOM_PAGE_ACCESS the default case, and remove this flag. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> [miquel.raynal@free-electrons.com: tested, fixed and rebased on nand/next] Signed-off-by: NMiquel Raynal <miquel.raynal@free-electrons.com> Acked-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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由 Boris Brezillon 提交于
This is part of the process of removing direct calls to ->cmdfunc() outside of the core in order to introduce a better interface to execute NAND operations. Here we provide several helpers and make use of them to remove all direct calls to ->cmdfunc(). This way, we can easily modify those helpers to make use of the new ->exec_op() interface when available. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> [miquel.raynal@free-electrons.com: rebased and fixed some conflicts] Signed-off-by: NMiquel Raynal <miquel.raynal@free-electrons.com> Acked-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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- 23 8月, 2017 1 次提交
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由 Philipp Zabel 提交于
Commit a53e35db ("reset: Ensure drivers are explicit when requesting reset lines") started to transition the reset control request API calls to explicitly state whether the driver needs exclusive or shared reset control behavior. Convert all drivers requesting exclusive resets to the explicit API call so the temporary transition helpers can be removed. No functional changes. Cc: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: Richard Weinberger <richard@nod.at> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Chen-Yu Tsai <wens@csie.org> Cc: linux-mtd@lists.infradead.org Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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- 13 8月, 2017 1 次提交
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由 Boris Brezillon 提交于
We are planning to share more code between different NAND based devices (SPI NAND, OneNAND and raw NANDs), but before doing that we need to move the existing include/linux/mtd/nand.h file into include/linux/mtd/rawnand.h so we can later create a nand.h header containing all common structure and function prototypes. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NPeter Pan <peterpandong@micron.com> Acked-by: NVladimir Zapolskiy <vz@mleia.com> Acked-by: NAlexander Sverdlin <alexander.sverdlin@gmail.com> Acked-by: NWenyou Yang <wenyou.yang@microchip.com> Acked-by: NKrzysztof Kozlowski <krzk@kernel.org> Acked-by: NHan Xu <han.xu@nxp.com> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: NShawn Guo <shawnguo@kernel.org> Acked-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: NNeil Armstrong <narmstrong@baylibre.com> Acked-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Acked-By: NHarvey Hunt <harveyhuntnexus@gmail.com> Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NKrzysztof Halasa <khalasa@piap.pl>
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- 02 8月, 2017 1 次提交
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由 Bryan O'Donoghue 提交于
clk_round_rate() can return <= 0. Currently the value returned by clk_round_rate() is used directly for a division. This patch introduces a guard to ensure a divide-by-zero or a divide by a negative number for that matter can't happen by bugging out returning -EINVAL if clk_round_rate() returns <= 0. Fixes: 2d43457f ("mtd: nand: sunxi: fix EDO mode selection") Signed-off-by: NBryan O'Donoghue <pure.logic@nexus-software.ie> Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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- 01 6月, 2017 3 次提交
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由 Boris Brezillon 提交于
The core already sends the NAND_CMD_READ0 for us. Duplicating this call in the driver is useless and introduces a perf penalty. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
ecc->read_subpage is set to sunxi_nfc_hw_ecc_read_subpage_dma when ->dmac != NULL, but is then unconditionally overwritten in the common init path. Remove this extra assignment to allow usage of the DMA operation when possible. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
Some NAND controllers can assign different NAND timings to different CS lines. Pass the CS line information to ->setup_data_interface() so that the NAND controller driver knows which CS line is concerned by the setup_data_interface() request. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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- 16 3月, 2017 1 次提交
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由 Philipp Zabel 提交于
As of commit bb475230 ("reset: make optional functions really optional"), the reset framework API calls use NULL pointers to describe optional, non-present reset controls. This allows to return errors from devm_reset_control_get_optional and to call reset_control_(de)assert unconditionally. Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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- 06 2月, 2017 3 次提交
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由 Boris Brezillon 提交于
We only need to call sunxi_nfc_wait_cmd_fifo_empty() if we want to send a new command. Move the sunxi_nfc_wait_cmd_fifo_empty() call to right place to avoid extra register reads. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
Some operations, like read/write an entire page of data with the ECC engine enabled, are known to take a lot of time. Use the interrupt-based waiting mode in these situation. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
wait_for_completion_timeout() returns 0 if a timeout occurred, 1 otherwise. Fix the sunxi_nfc_wait_events() accordingly. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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- 21 10月, 2016 1 次提交
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由 Boris Brezillon 提交于
The driver is incorrectly assuming that the ECC block size is always 1k which is not always true. Also take the other cases into account. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 23 9月, 2016 3 次提交
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由 Boris Brezillon 提交于
Setup the maximum ECC config when NAND_ECC_MAXIMIZE is set. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Sascha Hauer 提交于
The NAND framework is now able to select the best NAND timings for us. All we have to do is implement a ->setup_data_interface() function to apply those timings and remove the timing selection code from the sunxi driver. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Marc Gonzalez 提交于
The code to initialize a struct nand_hw_control is duplicated across several drivers. Factorize it using an inline function. Signed-off-by: NMarc Gonzalez <marc_gonzalez@sigmadesigns.com> Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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- 11 7月, 2016 7 次提交
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由 Dan Carpenter 提交于
I moved the sanity check on ecc->size before the allocation so that we don't leak memory on error. Fixes: 05af074a4b73 ('mtd: nand: sunxi: check ecc->size values') Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Icenowy Zheng 提交于
The NAND controller on some sun8i chips needs its reset line to be deasserted before they can enter working state. Signed-off-by: NIcenowy Zheng <icenowy@aosc.xyz> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
Implement ecc->write_subpage() to prevent core code from assigning this hook to nand_write_subpage_hwecc(). This default implementation tries to call ecc->hwctl() which in our case is NULL, thus leading to a NULL pointer dereference. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
Verify that the ecc->size value is either 512 or 1024 bytes. This should always be the case if this field was assigned to the nand->ecc_step_size_ds value, but can be wrong when the user overloaded this value with the nand-ecc-step-size DT property. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
Switching to 1k ECC blocks when possible provides better resistance against concentrated bitflips. Say you have those two configurations: 1/ 16bits/512bytes 2/ 32bits/1024bytes Both of them require the same amount of ECC bytes (only true for this specific engine), but the second config allows you to correct the case where most of your bitflips are concentrated in a single 512bytes portion. This fact makes the 1k ECC block size more advantageous than the 512bytes one. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
The column address passed to the RNDOUT operation was missing the page size offset. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Fixes: 614049a8 ("mtd: nand: sunxi: add support for DMA assisted operations")
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由 Wei Yongjun 提交于
In case of error, the function dmaengine_prep_slave_sg() returns NULL pointer not ERR_PTR(). The IS_ERR() test in the return value check should be replaced with NULL test. Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn> Fixes: 614049a8 ("mtd: nand: sunxi: add support for DMA assisted operations") Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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- 06 6月, 2016 1 次提交
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由 Boris Brezillon 提交于
The sunxi NAND controller is able to pipeline ECC operations only when operated in DMA mode, which improves a lot NAND throughput while keeping CPU usage low. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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- 06 5月, 2016 2 次提交
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由 Rafał Miłecki 提交于
This value should not be part of nand_ecc_modes_t as it specifies algorithm not a mode. We successfully managed to introduce new "algo" field which is respected now. Signed-off-by: NRafał Miłecki <zajec5@gmail.com> Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
Implementing the mtd_ooblayout_ops interface is the new way of exposing ECC/OOB layout to MTD users. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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- 20 4月, 2016 13 次提交
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由 Boris Brezillon 提交于
Allow for NULL cur_offs values when the caller does not know where the NAND page register pointer points to. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
sunxi_nfc_hw_ecc_read_chunk() always retrieves the ECC and protected free bytes, no matter if the user really asked for it or not. This can take a non negligible amount of time, especially on NAND chips exposing large OOB areas (> 1KB). Make it optional. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
In order to support DMA operations in a clean way we need to extract some of the logic coded in sunxi_nfc_hw_ecc_read/write_page() into their own function. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
Some NAND operations are so fast that it doesn't make any sense to use interrupt based waits (the scheduling overhead is not worth it). Rename sunxi_nfc_wait_int() into sunxi_nfc_wait_events() and add a parameter to specify whether polling should be used or not. Note that all sunxi_nfc_wait_int() are moved to the polling approach now, but this should change as soon as we have more information about the approximate time we are about to wait (can be extracted from the NAND timings, and the type of operation). Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
Replace open coded polling loops by readl_poll_timeout() calls. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
->dev_ready() is not supposed to wait for busy to ready solution (this is the role of ->waitfunc()). Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
When the NAND controller operates in DMA mode it can pipeline ECC operations which improves the throughput. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
mod and ahb clocks are not disabled when the NAND controller device is removed. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
NFC_PAGE_SHIFT() already takes the real page_shift value and subtract 10 to it. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
NFC_ECC_ERR_CNT() is not taking into account the case when the NAND chip contains more than 4 ECC blocks (NANDs with 4kB+ pages). Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
We don't need to manually toggle the CE line since the controller handles it for us. Moreover, keeping the CE line low when interacting with a DDR NAND can be problematic (data loss in some corner cases). Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
Try to pack address and command cycles into a single NAND controller command to avoid polling the status register for each single change on the NAND bus. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
Being able to read subpages can greatly improve read performances if the MTD user is only interested in a small section of a NAND page. This is particularly true with large pages (>= 8k). Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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