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  1. 14 12月, 2017 3 次提交
  3. 30 11月, 2017 1 次提交
  5. 01 6月, 2017 4 次提交
  7. 02 3月, 2017 1 次提交
  9. 23 9月, 2016 1 次提交
  11. 06 5月, 2016 3 次提交
  13. 20 4月, 2016 2 次提交
  15. 24 1月, 2016 2 次提交
  17. 08 1月, 2016 1 次提交
  19. 19 12月, 2015 2 次提交
  21. 09 12月, 2015 1 次提交
  23. 12 11月, 2015 1 次提交
    • B
      mtd: nand: drop unnecessary partition parser data · a61ae81a
      由 Brian Norris 提交于 
      All of these drivers set up a parser data struct just to communicate DT
partition data. This field has been deprecated and is instead supported
by telling nand_scan_ident() about the 'flash_node'.

This patch:
 * sets chip->flash_node for those drivers that didn't already (but used
   OF partitioning)
 * drops the parser data
 * switches to the simpler mtd_device_register() where possible, now
   that we've eliminated one of the auxiliary parameters

Now that we've assigned chip->flash_node for these drivers, we can
probably rely on nand_dt_init() to do more of the DT parsing for us, but
for now, I don't want to fiddle with each of these drivers. The parsing
is done in duplicate for now on some drivers. I don't think this should
break things. (Famous last words.)

(Rolled in some changes by Boris Brezillon)
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
Reviewed-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
      a61ae81a
  25. 14 10月, 2015 2 次提交
    • B
      mtd: nand: pass page number to ecc->write_xxx() methods · 45aaeff9
      由 Boris BREZILLON 提交于 
      The ->read_xxx() methods are all passed the page number the NAND controller
is supposed to read, but ->write_xxx() do not have such a parameter.

This is a problem if we want to properly implement data
scrambling/randomization in order to mitigate MLC sensibility to repeated
pattern: to prevent bitflips in adjacent pages in the same block we need
to avoid repeating the same pattern at the same offset in those pages,
hence the randomizer/scrambler engine need to be passed the page value
in order to adapt its seed accordingly.

Moreover, adding the page parameter to the ->write_xxx() methods add some
consistency to the current API.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
CC: Josh Wu <josh.wu@atmel.com>
CC: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
CC: Maxime Ripard <maxime.ripard@free-electrons.com>
CC: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
CC: Huang Shijie <shijie.huang@arm.com>
CC: Stefan Agner <stefan@agner.ch>
CC: devel@driverdev.osuosl.org
CC: linux-arm-kernel@lists.infradead.org
CC: linux-kernel@vger.kernel.org
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
      45aaeff9
    • F
      mtd: nand: gpmi-nand: show parent device in sysfs · 4dc67b1d
      由 Frans Klaver 提交于 
      Fix a bug where parent device symlinks aren't shown in sysfs.

While at it, make use of the default owner set by mtdcore.
Signed-off-by: NFrans Klaver <fransklaver@gmail.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
      4dc67b1d
  27. 31 3月, 2015 2 次提交
  29. 23 12月, 2014 2 次提交
  31. 01 12月, 2014 2 次提交
  33. 28 7月, 2014 3 次提交
  35. 29 5月, 2014 1 次提交
    • H
      mtd: gpmi: add gpmi support for imx6sx · 91f5498e
      由 Huang Shijie 提交于 
      The gpmi's IP for imx6sx is nearly the same as the gpmi's IP for imx6q,
except the following two new features:

     (1) the new BCH contoller has 62-BIT correcting ECC strength
            (The BCH for imx6q only has 40-BIT ECC strength).

     (2) add the hardware Randomizer support.

This patch does the follow changes:

     (1) add a new macro GPMI_IS_MX6SX to represent the imx6sx's gpmi.

     (2) add a new macro GPMI_IS_MX6.
           We use this macro to initialize the same registers for both
         imx6sx and imx6q, and so on.

     (3) add a new gpmi_devdata instance, the gpmi_devdata_imx6sx, for
         imx6sx.
Signed-off-by: NHuang Shijie <b32955@freescale.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
      91f5498e
  37. 16 4月, 2014 1 次提交
    • H
      mtd: gpmi: add gpmi_devdata{} to simplify the code · 6189cccb
      由 Huang Shijie 提交于 
      More and more chips use the GPMI controller, but these chips may use different
version of the IPs for GPMI and BCH. Different IPs have
 different features, such as the BCH's maximum ECC strength:

     imx23/imx28 -- the BCH's maximum ECC strength is 20
     imx6q       -- the BCH's maximum ECC strength is 40
     imx6sx      -- the BCH's maximum ECC strength is 62

This patch does the following things:

  [1] add a new data structure, gpmi_devdata{}, to store the information for
      each IP. Besides the IP version, we store the following information:
         <1> BCH's maximum ECC strength.
         <2> the maximum chain delay in ns used by the EDO mode.

      but we may add more information in future.

  [2] add the gpmi_devdata_imx{23|28|6q} to replace the gpmi_ids.

  [3] simplify the code by using the ECC strength from gpmi_devdata, such as
      gpmi_check_ecc() and legacy_set_geometry();

  [4] use the maximum chain delay to initialize the EDO mode,
      see gpmi_compute_edo_timing().

  [5] rewrite the macros, such GPMI_IS_MX{23|28|6Q}.
Signed-off-by: NHuang Shijie <b32955@freescale.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
      6189cccb
  39. 11 3月, 2014 2 次提交
    • H
      mtd: gpmi: add subpage read support · b8e2931d
      由 Huang Shijie 提交于 
      1) Why add the subpage read support?
  The page size of the nand chip becomes larger and larger, the imx6 has to
  supports the 16K page or even bigger page. But sometimes, the upper layer only
  needs a small part of the page, such as 512 bytes or less.

  For example, ubiattach may only read 64 bytes per page.

2) We only enable the subpage read support when it meets the conditions:
   <1> the chip is imx6 (or later chips) which can supports large nand page.
   <2> the size of ECC parity is byte aligned.
       If the size of ECC parity is not byte aligned, the calling of NAND_CMD_RNDOUT
       will fail.

3) What does this patch do?
   This patch will fake a virtual small page for the subpage read, and call the
   gpmi_ecc_read_page() to do the real work.

   In order to fake a virtual small page, the patch changes the BCH registers and
   the bch_geometry{}. After the subpage read finished, we will restore them back.

4) Performace:
    4.1) Tested with Toshiba TC58NVG2S0F(4096 + 224) with the following command:
         #ubiattach /dev/ubi_ctrl -m 4

       The detail information of /dev/mtd4 shows below:
       --------------------------------------------------------------
       #mtdinfo /dev/mtd4
        mtd4
        Name:                           test
        Type:                           nand
        Eraseblock size:                262144 bytes, 256.0 KiB
        Amount of eraseblocks:          1856 (486539264 bytes, 464.0 MiB)
        Minimum input/output unit size: 4096 bytes
        Sub-page size:                  4096 bytes
        OOB size:                       224 bytes
        Character device major/minor:   90:8
        Bad blocks are allowed:         true
        Device is writable:             true
       --------------------------------------------------------------

    4.2) Before this patch:
       --------------------------------------------------------------
       [   94.530495] UBI: attaching mtd4 to ubi0
       [   98.928850] UBI: scanning is finished
       [   98.953594] UBI: attached mtd4 (name "test", size 464 MiB) to ubi0
       [   98.958562] UBI: PEB size: 262144 bytes (256 KiB), LEB size: 253952 bytes
       [   98.964076] UBI: min./max. I/O unit sizes: 4096/4096, sub-page size 4096
       [   98.969518] UBI: VID header offset: 4096 (aligned 4096), data offset: 8192
       [   98.975128] UBI: good PEBs: 1856, bad PEBs: 0, corrupted PEBs: 0
       [   98.979843] UBI: user volume: 1, internal volumes: 1, max. volumes count: 128
       [   98.985878] UBI: max/mean erase counter: 2/1, WL threshold: 4096, image sequence number: 2024916145
       [   98.993635] UBI: available PEBs: 0, total reserved PEBs: 1856, PEBs reserved for bad PEB handling: 40
       [   99.001807] UBI: background thread "ubi_bgt0d" started, PID 831
       --------------------------------------------------------------
       The attach time is about 98.9 - 94.5 = 4.4s

    4.3) After this patch:
       --------------------------------------------------------------
       [  286.464906] UBI: attaching mtd4 to ubi0
       [  289.186129] UBI: scanning is finished
       [  289.211416] UBI: attached mtd4 (name "test", size 464 MiB) to ubi0
       [  289.216360] UBI: PEB size: 262144 bytes (256 KiB), LEB size: 253952 bytes
       [  289.221858] UBI: min./max. I/O unit sizes: 4096/4096, sub-page size 4096
       [  289.227293] UBI: VID header offset: 4096 (aligned 4096), data offset: 8192
       [  289.232878] UBI: good PEBs: 1856, bad PEBs: 0, corrupted PEBs: 0
       [  289.237628] UBI: user volume: 0, internal volumes: 1, max. volumes count: 128
       [  289.243553] UBI: max/mean erase counter: 1/1, WL threshold: 4096, image sequence number: 2024916145
       [  289.251348] UBI: available PEBs: 1812, total reserved PEBs: 44, PEBs reserved for bad PEB handling: 40
       [  289.259417] UBI: background thread "ubi_bgt0d" started, PID 847
       --------------------------------------------------------------
       The attach time is about 289.18 - 286.46 = 2.7s

     4.4) The conclusion:
       We achieve (4.4 - 2.7) / 4.4 = 38.6% faster in the ubiattach.
Signed-off-by: NHuang Shijie <b32955@freescale.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
      b8e2931d
    • H
      mtd: gpmi: do not use the mtd->writesize · 4a57d670
      由 Huang Shijie 提交于 
      The nfc_geo->payload_size is equal to the mtd->writesize now,
use the nfc_geo->payload_size to replace the mtd->writesize.

This patch makes preparation for the gpmi's subpage read support.
In the subpage support, the nfc_geo->payload_size maybe smaller then
the mtd->writesize.
Signed-off-by: NHuang Shijie <b32955@freescale.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
      4a57d670
  41. 28 1月, 2014 2 次提交
    • H
      mtd: gpmi: add sanity check when mapping DMA for read_buf/write_buf · 0ff76a92
      由 Huang Shijie 提交于 
      The buffer pointer passed from the upper layer may points to
a buffer in the stack or a buffer allocated by vmalloc, and etc..

This patch adds more sanity check to this buffer.
After this patch, if we meet a buffer which is allocated by vmalloc or
a buffer in the stack, we will use our own DMA buffer @data_buffer_dma
to do the DMA operations. If the buffer is not the cases above, we will
map it for DMA operations directly.
Signed-off-by: NHuang Shijie <shijie8@gmail.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
      0ff76a92
    • H
      mtd: gpmi: allocate a proper buffer for non ECC read/write · 06f216c8
      由 Huang Shijie 提交于 
      The @data_buffer_dma buffer is used for non ECC read/write.

Currently, the length of the buffer is PAGE_SIZE, but the NAND chip may
has 8K page or 16K page. So we have to extend it for the large page NAND
chips.

The gpmi_alloc_dma_buffer will be called twice. The first time is to
allocate a temporary buffer for scanning the NAND chip; The second time
is to allocate a buffer to store the real page content.

This patch allocates a buffer of PAGE_SIZE size for scanning the NAND
chip when gpmi_alloc_dma_buffer is called the first time, and allocates a
buffer of the real NAND page size for the second time gpmi_alloc_dma_buffer
is called.
Signed-off-by: NHuang Shijie <shijie8@gmail.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
      06f216c8
  43. 04 1月, 2014 1 次提交