1. 05 10月, 2021 1 次提交
  2. 23 6月, 2021 1 次提交
  3. 05 6月, 2021 1 次提交
  4. 06 3月, 2021 1 次提交
  5. 07 1月, 2021 1 次提交
    • A
      drm/amdgpu/display: drop DCN support for aarch64 · c241ed2f
      Alex Deucher 提交于
      From Ard:
      
      "Simply disabling -mgeneral-regs-only left and right is risky, given that
      the standard AArch64 ABI permits the use of FP/SIMD registers anywhere,
      and GCC is known to use SIMD registers for spilling, and may invent
      other uses of the FP/SIMD register file that have nothing to do with the
      floating point code in question. Note that putting kernel_neon_begin()
      and kernel_neon_end() around the code that does use FP is not sufficient
      here, the problem is in all the other code that may be emitted with
      references to SIMD registers in it.
      
      So the only way to do this properly is to put all floating point code in
      a separate compilation unit, and only compile that unit with
      -mgeneral-regs-only."
      
      Disable support until the code can be properly refactored to support this
      properly on aarch64.
      Acked-by: NWill Deacon <will@kernel.org>
      Reported-by: NArd Biesheuvel <ardb@kernel.org>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      c241ed2f
  6. 06 1月, 2021 1 次提交
    • A
      drm/amdgpu/display: drop DCN support for aarch64 · 88d5cb25
      Alex Deucher 提交于
      From Ard:
      
      "Simply disabling -mgeneral-regs-only left and right is risky, given that
      the standard AArch64 ABI permits the use of FP/SIMD registers anywhere,
      and GCC is known to use SIMD registers for spilling, and may invent
      other uses of the FP/SIMD register file that have nothing to do with the
      floating point code in question. Note that putting kernel_neon_begin()
      and kernel_neon_end() around the code that does use FP is not sufficient
      here, the problem is in all the other code that may be emitted with
      references to SIMD registers in it.
      
      So the only way to do this properly is to put all floating point code in
      a separate compilation unit, and only compile that unit with
      -mgeneral-regs-only."
      
      Disable support until the code can be properly refactored to support this
      properly on aarch64.
      Acked-by: NWill Deacon <will@kernel.org>
      Reported-by: NArd Biesheuvel <ardb@kernel.org>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      88d5cb25
  7. 05 11月, 2020 1 次提交
  8. 04 11月, 2020 2 次提交
  9. 30 10月, 2020 1 次提交
  10. 27 10月, 2020 2 次提交
  11. 15 10月, 2020 1 次提交
  12. 13 10月, 2020 2 次提交
  13. 06 10月, 2020 1 次提交
  14. 11 8月, 2020 1 次提交
  15. 28 7月, 2020 1 次提交
  16. 01 7月, 2020 1 次提交
  17. 24 4月, 2020 1 次提交
  18. 19 12月, 2019 1 次提交
  19. 12 12月, 2019 2 次提交
  20. 14 11月, 2019 5 次提交
  21. 08 10月, 2019 1 次提交
  22. 03 10月, 2019 1 次提交
  23. 30 8月, 2019 1 次提交
  24. 12 7月, 2019 1 次提交
    • N
      drm/amd/display: Add drm_audio_component support to amdgpu_dm · 6ce8f316
      Nicholas Kazlauskas 提交于
      [Why]
      The drm_audio_component can be used to give pin ELD notifications
      directly to the sound driver. This fixes audio endpoints disappearing
      due to missing unsolicited notifications.
      
      [How]
      Send the notification via the audio component whenever we enable or
      disable audio state on a stream. This matches what i915 does with
      their drm_audio_component and what Takashi Iwai's proposed hack for
      radeon/amdpgu did.
      
      This is a bit delayed in when the notification actually occurs, however.
      We wait until after all the programming is complete rather than sending
      the notification mid sequence.
      
      Particular care is needed for the get ELD callback since it can happen
      outside the locking and fencing DRM does for atomic commits.
      
      Cc: Leo Li <sunpeng.li@amd.com>
      Cc: Harry Wentland <harry.wentland@amd.com>
      Signed-off-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
      Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
      Reviewed-by: NTakashi Iwai <tiwai@suse.de>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      6ce8f316
  25. 22 6月, 2019 3 次提交
  26. 25 5月, 2019 1 次提交
  27. 21 5月, 2019 1 次提交
  28. 14 9月, 2018 1 次提交
  29. 22 8月, 2018 2 次提交