- 15 4月, 2015 1 次提交
-
-
由 Guenter Roeck 提交于
Fix: drivers/spi/spi-bcm2835.c: In function 'chip_match_name': drivers/spi/spi-bcm2835.c:356:21: error: dereferencing pointer to incomplete type drivers/spi/spi-bcm2835.c: In function 'bcm2835_spi_setup': drivers/spi/spi-bcm2835.c:382:2: error: ` implicit declaration of function 'gpiochip_find' drivers/spi/spi-bcm2835.c:387:21: error: dereferencing pointer to incomplete type by adding the now mandatory GPIOLIB dependency. Fixes: a30a555d ("spi: bcm2835: transform native-cs to gpio-cs on first spi_setup") Cc: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 10 3月, 2015 2 次提交
-
-
由 Andy Shevchenko 提交于
intel_mid_dma seems to be unmaintained for a long time. Moreover, the IP block of DMA itself is the same in both dw_dmac and intel_mid_dma. This patch moves spi-dw-midpci to use dw_dmac driver. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
由 Michal Simek 提交于
Remove Kconfig dependency and enable driver for all ARCHs. Also update help description. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Acked-by: NSören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 29 1月, 2015 2 次提交
-
-
由 Chao Fu 提交于
DSPI module need cs change information in a spi transfer. According to cs change, DSPI will give last data the right flag. Bitbang provide cs change behind the last data in a transfer. So DSPI can not deal the last data in every transfer properly, so remove the bitbang in the driver. Signed-off-by: NBhuvanchandra DV <bhuvanchandra.dv@toradex.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
由 Arnd Bergmann 提交于
The pl08x driver originally selected S3C64XX_PL080 to avoid having the legacy Samsung DMA interfaces. Those are now gone, so the select is no longer needed, but it now causes problems when CONFIG_DMA_ENGINE is disabled: arch/arm/plat-samsung/built-in.o: In function `s3c64xx_spi0_set_platdata': :(.init.text+0x518): undefined reference to `pl08x_filter_id' This simply removes the 'select' to avoid this problem. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 17 1月, 2015 1 次提交
-
-
由 Michal Simek 提交于
Trivial fix. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 07 1月, 2015 2 次提交
-
-
由 Christoph Jaeger 提交于
Support for keyword 'boolean' will be dropped later on. No functional change. Reference: http://lkml.kernel.org/r/cover.1418003065.git.cj@linux.comSigned-off-by: NChristoph Jaeger <cj@linux.com> Signed-off-by: NMichal Marek <mmarek@suse.cz>
-
由 Esben Haabendal 提交于
Signed-off-by: NEsben Haabendal <eha@deif.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 23 12月, 2014 2 次提交
-
-
由 Laurentiu Palcu 提交于
This adds support for Diolan DLN2 USB-SPI adapter. Information about the USB protocol interface can be found in the Programmer's Reference Manual [1], see section 5.4.6 for the SPI master module commands and responses. [1] https://www.diolan.com/downloads/dln-api-manual.pdfSigned-off-by: NLaurentiu Palcu <laurentiu.palcu@intel.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
由 Lee Jones 提交于
This patch adds support for the SPI portion of ST's SSC device. Signed-off-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 27 11月, 2014 2 次提交
-
-
由 Beniamino Galvani 提交于
The Meson SPIFC driver uses regmap mmio functions and so it must select REGMAP_MMIO to avoid the following build error: spi-meson-spifc.c: undefined reference to `devm_regmap_init_mmio_clk' Reported-by: NJim Davis <jim.epost@gmail.com> Signed-off-by: NBeniamino Galvani <b.galvani@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
由 Padmavathi Venna 提交于
Exynos7 SPI controller supports only the auto Selection of CS toggle mode and Exynos7 SoC includes six SPI controllers. Add support for these changes in Exynos7 SPI controller driver. Signed-off-by: NPadmavathi Venna <padma.v@samsung.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 25 11月, 2014 1 次提交
-
-
由 Beniamino Galvani 提交于
This is a driver for the Amlogic Meson SPIFC (SPI flash controller), which is one of the two SPI controllers available on the SoC. It doesn't support DMA and has a 64-byte unified transmit/receive buffer. The device is optimized for interfacing with SPI NOR memories and allows the execution of standard operations such as read, page program, sector erase, etc. in a simplified way, toggling a bit in a dedicated register. The driver doesn't use those predefined commands and relies only on custom transfers. Signed-off-by: NBeniamino Galvani <b.galvani@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 17 11月, 2014 1 次提交
-
-
由 Andrew Bresticker 提交于
Add support for the Synchronous Peripheral Flash Interface (SPFI) master controller found on IMG SoCs. The SPFI controller supports 5 chip-select lines and single/dual/quad mode SPI transfers. Signed-off-by: NAndrew Bresticker <abrestic@chromium.org> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 26 9月, 2014 1 次提交
-
-
由 Axel Lin 提交于
config SPI_BCM53XX needs to depend on BCMA_POSSIBLE and select BCMA. This fixes below build error: ERROR: "bcma_driver_unregister" [drivers/spi/spi-bcm53xx.ko] undefined! ERROR: "__bcma_driver_register" [drivers/spi/spi-bcm53xx.ko] undefined! Signed-off-by: NAxel Lin <axel.lin@ingics.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 14 9月, 2014 1 次提交
-
-
由 Andy Shevchenko 提交于
The support of the Moorestown was removed [1] from kernel long time ago. This is just a follow up of that change. [1] http://www.spinics.net/lists/platform-driver-x86/msg02948.htmlSigned-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 31 8月, 2014 1 次提交
-
-
由 Geert Uytterhoeven 提交于
commit dd1053a9 ("spi/drivers: Enable build of drivers with COMPILE_TEST") allows compile-testing drivers on platforms they're not meant for. However, adding "|| COMPILE_TEST" bypasses all other implicit dependencies assumed by the platform dependencies before, like HAS_DMA. If NO_DMA=y: drivers/built-in.o: In function `atmel_spi_dma_unmap_xfer': drivers/spi/spi-atmel.c:915: undefined reference to `dma_unmap_single' drivers/spi/spi-atmel.c:918: undefined reference to `dma_unmap_single' drivers/built-in.o: In function `atmel_spi_next_xfer_data': drivers/spi/spi-atmel.c:690: undefined reference to `dma_sync_single_for_cpu' drivers/built-in.o: In function `atmel_spi_dma_map_xfer': drivers/spi/spi-atmel.c:890: undefined reference to `dma_map_single' drivers/spi/spi-atmel.c:893: undefined reference to `dma_mapping_error' drivers/spi/spi-atmel.c:897: undefined reference to `dma_map_single' drivers/spi/spi-atmel.c:900: undefined reference to `dma_mapping_error' drivers/spi/spi-atmel.c:902: undefined reference to `dma_unmap_single' drivers/built-in.o: In function `atmel_spi_probe': drivers/spi/spi-atmel.c:1540: undefined reference to `dma_alloc_coherent' drivers/spi/spi-atmel.c:1623: undefined reference to `dma_free_coherent' drivers/built-in.o: In function `atmel_spi_remove': drivers/spi/spi-atmel.c:1665: undefined reference to `dma_free_coherent' drivers/built-in.o: In function `ep93xx_spi_dma_finish': drivers/spi/spi-ep93xx.c:550: undefined reference to `dma_unmap_sg' drivers/built-in.o: In function `ep93xx_spi_dma_prepare': drivers/spi/spi-ep93xx.c:516: undefined reference to `dma_map_sg' drivers/spi/spi-ep93xx.c:522: undefined reference to `dma_unmap_sg' drivers/built-in.o: In function `omap2_mcspi_rx_dma': drivers/spi/spi-omap2-mcspi.c:475: undefined reference to `dma_unmap_single' drivers/built-in.o: In function `omap2_mcspi_txrx_dma': drivers/spi/spi-omap2-mcspi.c:589: undefined reference to `dma_unmap_single' drivers/built-in.o: In function `omap2_mcspi_transfer_one_message': drivers/spi/spi-omap2-mcspi.c:1202: undefined reference to `dma_map_single' drivers/spi/spi-omap2-mcspi.c:1204: undefined reference to `dma_mapping_error' drivers/spi/spi-omap2-mcspi.c:1211: undefined reference to `dma_map_single' drivers/spi/spi-omap2-mcspi.c:1213: undefined reference to `dma_mapping_error' drivers/spi/spi-omap2-mcspi.c:1217: undefined reference to `dma_unmap_single' drivers/built-in.o: In function `tegra_spi_deinit_dma_param': drivers/spi/spi-tegra114.c:675: undefined reference to `dma_free_coherent' drivers/built-in.o: In function `tegra_spi_copy_spi_rxbuf_to_client_rxbuf': drivers/spi/spi-tegra114.c:415: undefined reference to `dma_sync_single_for_cpu' drivers/spi/spi-tegra114.c:440: undefined reference to `dma_sync_single_for_cpu' drivers/built-in.o: In function `tegra_spi_copy_client_txbuf_to_spi_txbuf': drivers/spi/spi-tegra114.c:381: undefined reference to `dma_sync_single_for_cpu' drivers/spi/spi-tegra114.c:405: undefined reference to `dma_sync_single_for_cpu' drivers/built-in.o: In function `tegra_spi_start_dma_based_transfer': drivers/spi/spi-tegra114.c:543: undefined reference to `dma_sync_single_for_cpu' drivers/built-in.o: In function `tegra_slink_deinit_dma_param': drivers/spi/spi-tegra20-slink.c:705: undefined reference to `dma_free_coherent' drivers/built-in.o: In function `tegra_slink_copy_spi_rxbuf_to_client_rxbuf': drivers/spi/spi-tegra20-slink.c:427: undefined reference to `dma_sync_single_for_cpu' drivers/spi/spi-tegra20-slink.c:452: undefined reference to `dma_sync_single_for_cpu' drivers/built-in.o: In function `tegra_slink_copy_client_txbuf_to_spi_txbuf': drivers/spi/spi-tegra20-slink.c:393: undefined reference to `dma_sync_single_for_cpu' drivers/spi/spi-tegra20-slink.c:417: undefined reference to `dma_sync_single_for_cpu' drivers/built-in.o: In function `tegra_slink_start_dma_based_transfer': drivers/spi/spi-tegra20-slink.c:561: undefined reference to `dma_sync_single_for_cpu' Add dependencies on HAS_DMA to fix this. Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 20 8月, 2014 1 次提交
-
-
由 Rafał Miłecki 提交于
Broadcom 53xx ARM SoCs use bcma bus that contains various cores (AKA devices). If board has a serial flash, it's connected over SPI and the bcma bus includes a SPI controller. Example log from such a board: bus0: Found chip with id 53010, rev 0x00 and package 0x02 (...) bus0: Core 18 found: SPI flash controller (manuf 0x4BF, id 0x50A, rev 0x01, class 0x0) This patch adds a bcma driver for SPI core, it registers SPI master controller and "bcm53xxspiflash" SPI device. Signed-off-by: NRafał Miłecki <zajec5@gmail.com> Signed-off-by: NMark Brown <broonie@linaro.org>
-
- 17 8月, 2014 1 次提交
-
-
由 Chew, Chiau Ee 提交于
SPI PXA2XX core layer has dependency on common clock framework to obtain information on host supported clock rate. Thus, we setup the clock device in the PCI glue layer to enable PCI mode host pass in the clock rate information. Signed-off-by: NChew, Chiau Ee <chiau.ee.chew@intel.com> Acked-by: NKweh, Hock Leong <hock.leong.kweh@intel.com> Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NMark Brown <broonie@linaro.org>
-
- 10 7月, 2014 2 次提交
-
-
由 Geert Uytterhoeven 提交于
As of commit ab116a4d ("dmaengine: shdma: fix a build failure on platforms with no DMA support"), the DMA filter function shdma_chan_filter() is sufficiently abstracted to allow building without DMA support. Hence drop the SH_DMAE_BASE dependency on SUPERH. Also increase build coverage by allowing the driver to be enabled if COMPILE_TEST=y. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NMark Brown <broonie@linaro.org>
-
由 Geert Uytterhoeven 提交于
If NO_DMA=y: drivers/built-in.o: In function `sh_msiof_release_dma': spi-sh-msiof.c:(.text+0x23cbfe): undefined reference to `dma_unmap_single' drivers/built-in.o: In function `sh_msiof_request_dma': spi-sh-msiof.c:(.text+0x23cd5e): undefined reference to `dma_map_single' spi-sh-msiof.c:(.text+0x23cd70): undefined reference to `dma_mapping_error' spi-sh-msiof.c:(.text+0x23cdca): undefined reference to `dma_unmap_single' drivers/built-in.o: In function `sh_msiof_dma_once': spi-sh-msiof.c:(.text+0x23d450): undefined reference to `dma_sync_single_for_cpu' spi-sh-msiof.c:(.text+0x23d5ea): undefined reference to `dma_sync_single_for_cpu' Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NMark Brown <broonie@linaro.org>
-
- 05 7月, 2014 2 次提交
-
-
由 Mark Brown 提交于
Without the dependencies for the accessors the driver can be enabled on architectures where it will fail to build. Signed-off-by: NMark Brown <broonie@linaro.org>
-
由 addy ke 提交于
In order to facilitate understanding, rockchip SPI controller IP design looks similar in its registers to designware. But IC implementation is different from designware, So we need a dedicated driver for Rockchip RK3XXX SoCs integrated SPI. The main differences: - dma request line: rockchip SPI controller have two DMA request line for tx and rx. - Register offset: RK3288 dw SPI_CTRLR0 0x0000 0x0000 SPI_CTRLR1 0x0004 0x0004 SPI_SSIENR 0x0008 0x0008 SPI_MWCR NONE 0x000c SPI_SER 0x000c 0x0010 SPI_BAUDR 0x0010 0x0014 SPI_TXFTLR 0x0014 0x0018 SPI_RXFTLR 0x0018 0x001c SPI_TXFLR 0x001c 0x0020 SPI_RXFLR 0x0020 0x0024 SPI_SR 0x0024 0x0028 SPI_IPR 0x0028 NONE SPI_IMR 0x002c 0x002c SPI_ISR 0x0030 0x0030 SPI_RISR 0x0034 0x0034 SPI_TXOICR NONE 0x0038 SPI_RXOICR NONE 0x003c SPI_RXUICR NONE 0x0040 SPI_MSTICR NONE 0x0044 SPI_ICR 0x0038 0x0048 SPI_DMACR 0x003c 0x004c SPI_DMATDLR 0x0040 0x0050 SPI_DMARDLR 0x0044 0x0054 SPI_TXDR 0x0400 NONE SPI_RXDR 0x0800 NONE SPI_IDR NONE 0x0058 SPI_VERSION NONE 0x005c SPI_DR NONE 0x0060 - register configuration: such as SPI_CTRLRO in rockchip SPI controller: cr0 = (CR0_BHT_8BIT << CR0_BHT_OFFSET) | (CR0_SSD_ONE << CR0_SSD_OFFSET); cr0 |= (rs->n_bytes << CR0_DFS_OFFSET); cr0 |= ((rs->mode & 0x3) << CR0_SCPH_OFFSET); cr0 |= (rs->tmode << CR0_XFM_OFFSET); cr0 |= (rs->type << CR0_FRF_OFFSET); For more information, see RK3288 chip manual. - Wait for idle: Must ensure that the FIFO data has been sent out before the next transfer. Signed-off-by: Naddy ke <addy.ke@rock-chips.com> Signed-off-by: NMark Brown <broonie@linaro.org>
-
- 17 5月, 2014 1 次提交
-
-
由 Jean Delvare 提交于
The spi-topcliff-pch driver is for a companion chip to the Intel Atom E600 series processors. These are 32-bit x86 processors so the driver is only needed on X86_32. Add COMPILE_TEST as an alternative, so that the driver can still be build-tested elsewhere. Signed-off-by: NJean Delvare <jdelvare@suse.de> Signed-off-by: NMark Brown <broonie@linaro.org>
-
- 15 4月, 2014 3 次提交
-
-
由 Harini Katakam 提交于
Add dependency on ARM in Kconfig. This is to fix the build error related to _relaxed IO. Remove dependency on SPI_MASTER because this is already defined under if SPI_MASTER in Kconfig. Signed-off-by: NHarini Katakam <harinik@xilinx.com> Signed-off-by: NMark Brown <broonie@linaro.org>
-
由 Harini Katakam 提交于
Add driver for Cadence SPI controller. This is used in Xilinx Zynq. Signed-off-by: NHarini Katakam <harinik@xilinx.com> Signed-off-by: NMark Brown <broonie@linaro.org>
-
由 Scott Jiang 提交于
Spi v3 controller is not only used on Blackfin. So rename it and use ioread/iowrite api to make it work on other platform. Signed-off-by: NScott Jiang <scott.jiang.linux@gmail.com> Signed-off-by: NMark Brown <broonie@linaro.org>
-
- 08 4月, 2014 1 次提交
-
-
由 Paul Bolle 提交于
Commit 8fc1b0f8 ("ARM: qcom: Split Qualcomm support into legacy and multiplatform") removed Kconfig symbol ARCH_MSM_DT. But that commit left one (optional) dependency on ARCH_MSM_DT untouched. Three Kconfig symbols used to depend on ARCH_MSM_DT: ARCH_MSM8X60, ARCH_MSM8960, and ARCH_MSM8974. These three symbols now depend on ARCH_QCOM. So it appears this driver needs to depend on ARCH_QCOM too. Signed-off-by: NPaul Bolle <pebolle@tiscali.nl> Reviewed-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NMark Brown <broonie@linaro.org>
-
- 27 3月, 2014 1 次提交
-
-
由 Axel Lin 提交于
This helps increasing build testing coverage. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Signed-off-by: NMark Brown <broonie@linaro.org>
-
- 22 3月, 2014 1 次提交
-
-
由 Axel Lin 提交于
This helps increasing build testing coverage. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Reviewed-by: NMax Filippov <jcmvbkbc@gmail.com> Signed-off-by: NMark Brown <broonie@linaro.org>
-
- 19 3月, 2014 1 次提交
-
-
由 Arnd Bergmann 提交于
The tnetv107x platform is getting removed, so this driver will not be needed any more. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NSekhar Nori <nsekhar@ti.com> Acked-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NMark Brown <broonie@linaro.org>
-
- 13 3月, 2014 1 次提交
-
-
由 Max Filippov 提交于
This simple SPI master controller is built into xtfpga bitstreams. It always transfers 16 bit words in SPI mode 0, automatically asserting CS on transfer start and deasserting on end. Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com> Signed-off-by: NMark Brown <broonie@linaro.org>
-
- 27 2月, 2014 1 次提交
-
-
由 Geert Uytterhoeven 提交于
The only remaining feature of spi-bitbang used by this driver is the chipselect() callback, which just does conditional GPIO. This is handled fine by the SPI core's spi_set_cs(), hence switch the driver to use the core message handling through our own transfer_one() method. As the (optional) GPIO CS is no longer deasserted at spi_master.setup() time (through spi_bitbang_setup() and the spi_bitbang.chipselect() callback), we now have to take care of that ourselves. Remove the call to spi_master_put() in sh_msiof_spi_remove(), as our SPI master is now registered using devm_spi_register_master() (spi_bitbang_start() uses the non-managed version). Signed-off-by: NGeert Uytterhoeven <geert+renesas@linux-m68k.org> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NMark Brown <broonie@linaro.org>
-
- 24 2月, 2014 1 次提交
-
-
由 Axel Lin 提交于
This driver uses writel_relaxed() which does not exist in x86, ppc, etc. Make it depend on ARM && COMPILE_TEST to avoid below build error: CC [M] drivers/spi/spi-qup.o drivers/spi/spi-qup.c: In function 'spi_qup_set_state': drivers/spi/spi-qup.c:180:3: error: implicit declaration of function 'writel_relaxed' [-Werror=implicit-function-declaration] cc1: some warnings being treated as errors make[2]: *** [drivers/spi/spi-qup.o] Error 1 make[1]: *** [drivers/spi] Error 2 make: *** [drivers] Error 2 Reported-by: NStephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: NAxel Lin <axel.lin@ingics.com> Signed-off-by: NMark Brown <broonie@linaro.org>
-
- 23 2月, 2014 3 次提交
-
-
由 Axel Lin 提交于
This helps increasing build testing coverage. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Signed-off-by: NMark Brown <broonie@linaro.org>
-
由 Maxime Ripard 提交于
The older Allwinner SoCs (A10, A13, A10s and A20) all have the same SPI controller. Unfortunately, this SPI controller, even though quite similar, is significantly different from the recently supported A31 SPI controller (different registers offset, split/merged registers, etc.). Supporting both controllers in a single driver would be unreasonable, hence the addition of a new driver. Like its more recent counterpart, it supports DMA, but the driver only does PIO until we have a dmaengine driver for this platform. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NMark Brown <broonie@linaro.org>
-
由 Fabio Estevam 提交于
SPI_IMX is selected by imx_v6_v7_defconfig/imx_v4_v5_defconfig and we don't need to have a default setting which depends on the IMX_HAVE_PLATFORM_SPI_IMX symbol. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NMark Brown <broonie@linaro.org>
-
- 19 2月, 2014 1 次提交
-
-
由 Ivan T. Ivanov 提交于
Qualcomm Universal Peripheral (QUP) core is an AHB slave that provides a common data path (an output FIFO and an input FIFO) for serial peripheral interface (SPI) mini-core. SPI in master mode supports up to 50MHz, up to four chip selects, programmable data path from 4 bits to 32 bits and numerous protocol variants. Cc: Alok Chauhan <alokc@codeaurora.org> Cc: Gilad Avidov <gavidov@codeaurora.org> Cc: Kiran Gunda <kgunda@codeaurora.org> Cc: Sagar Dharia <sdharia@codeaurora.org> Cc: dsneddon@codeaurora.org Signed-off-by: NIvan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: NMark Brown <broonie@linaro.org>
-
- 16 2月, 2014 1 次提交
-
-
由 Chao Fu 提交于
Freescale DSPI module will have two endianess in different platform, but ARM is little endian. So when DSPI in big endian, core in little endian, readl and writel can not adjust R/W register in this condition. This patch will remove general readl/writel, and import regmap mechanism. Data endian will be transfered in regmap APIs. Documents: dspi add bool "big-endian" in dts node if DSPI module work in big endian. Signed-off-by: NChao Fu <b44548@freescale.com> Reviewed-by: NXiubo Li <Li.Xiubo@freescale.com> Signed-off-by: NMark Brown <broonie@linaro.org>
-
- 10 2月, 2014 1 次提交
-
-
由 Paul Bolle 提交于
Commit 0079aae0 ("spi: omap2: Add build dependencies for writel_relaxed()") added an optional Kconfig dependency on SH. That Kconfig symbol doesn't exist. Apparently SUPERH was intended. Use that. Signed-off-by: NPaul Bolle <pebolle@tiscali.nl> Acked-by: NGeert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: NMark Brown <broonie@linaro.org>
-