Add generic DT board support for the r8a7740 SoC.

SCIF serial ports and timers are kept as regular
platform devices. Other on-chip and on-board devices
should be configured via the device tree.

At this point there is no interrupt controller support
in place but such code will be added over time when
proper IRQ domain support has been added to INTC.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

This patch adds basic A4LC pm domain support.
Now, below devices can be controled by PM

MERAM, LCDC, VOU, ICBS, SDENC-Link
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

This patch adds basic A3SP pm domain support.
Now, below devices can be controled by PM

DMAC1/2/3, IPMMU, DDM, FLCTL, SYS-HPB, BBIF1, MSIOF1/2,
SCIFA,SCIFB, IIC1, IrDA, USBH, USBDMAC, SDHI0/1/2, TPU,
DREQPAK (Sys),  MMCIF, RSPI, SIM, USBF
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

This patch adds basic A4S pm domain support.
Now, below devices can be controled by PM

Common-SHwy, Common-HPB, BSC, MFI, MMFROM, HS-SHwy,
SYS-HPB, INTCA, DBSC, DDRPHY (Logic),
ATAPI, GbEther, AXI-bus
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

This patch switch over to use common DMAEngine definitions,
and reduced a waste of code.

It is easy to understand if sh_dmae_pdata / sh_dmae_slave_config
settings are used defined value instead of direct value.
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

Current shdmac can support USB DMAC on r8a7740.
This support reduce CPU duty when USB access.
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

Current shdmac can support SDHI DMAC on r8a7740.
This support reduce CPU duty when SDHI access.
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

Current shdmac can support FSI DMAC on r8a7740.
This support reduce CPU duty when sound was playback.

This patch is based on v1.0 manual
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

r8a7740 chip has lasting errata on MERAM buffer, and this patch adds
its work-around on setup-r8a7740.c
It solved CEU/VIO6C/2D-DMAC/VCP1/VPU5F/JPU/DISP memroy access error.

But MERAM driver can't control this issue,
since this work-around requires access to non-MERAM register address.
So, This it will be called as board specific code at this point.
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: NSimon Horman <horms@verge.net.au>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

The default 2MB size of DMA coherent memory isn't enough for allocate
frame buffer memory.
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: NSimon Horman <horms@verge.net.au>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

Current workaround of I2C on r8a7740 used mdelay(),
but it was an overkill.
This patch cleans up the workaround delay.
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: NSimon Horman <horms@verge.net.au>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

Copy the SoC specific timer code from Bonito board code
to r8a7740 setup code. This makes is possible to share
the SoC specific timer code across boards. The Bonito
specific timer setup code tied to the FPGA is kept as-is.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

Update the r8a7740 SoC and the Bonito board to make use of
the functions r8a7740_map_io() and r8a7740_add_early_devices().
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

Remove NR_IRQS and explicitly include mach/irqs.h as needed. shmobile
properly allocates irq_descs for each irqchip, so setting .nr_irqs for
each machine is not needed.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>

R8A7740 GIC can not get external IRQx interrupt directly
without GIC - INTC demux support.

Current AG5 is using GIC - INTCS demux with
special irq relocation. but GIC - INTCA demux
is still not supported and it needs irq number re-mapping.

OTOH, normal INTC support as before is very enough for R8A7740,
because it is not SMP CPU.
This patch adds INTCA/INTCS support instead of GIC.
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch adds I2C support to r8a7740 CPU
which has lasting errata on I2C I/O pad reset.
This patch is including work-around.
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This adds preliminary support for the R8A7740 (R-Mobile A1) CPU

Timer, serial, gic, clock are supported at this point.
This patch is based on v0.1 manual
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>