1. 17 10月, 2018 9 次提交
  2. 13 7月, 2018 1 次提交
  3. 08 6月, 2018 1 次提交
  4. 14 5月, 2018 1 次提交
  5. 06 3月, 2018 1 次提交
  6. 29 1月, 2018 1 次提交
  7. 19 12月, 2017 1 次提交
  8. 17 8月, 2017 2 次提交
  9. 04 8月, 2017 1 次提交
  10. 03 7月, 2017 1 次提交
  11. 25 2月, 2017 1 次提交
    • G
      PCI: dwc: Fix crashes seen due to missing assignments · c0464062
      Guenter Roeck 提交于
      Fix the following crash, seen in dwc/pci-imx6.
      
        Unable to handle kernel NULL pointer dereference at virtual address 00000070
        pgd = c0004000
        [00000070] *pgd=00000000
        Internal error: Oops: 805 [#1] SMP ARM
        Modules linked in:
        CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.10.0-09686-g9e314890 #1
        Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree)
        task: cb850000 task.stack: cb84e000
        PC is at imx6_pcie_probe+0x2f4/0x414
        ...
      
      While at it, fix the same problem in various drivers instead of waiting for
      individual crash reports.
      
      The change in the imx6 driver was tested with qemu. The changes in other
      drivers are based on code inspection and have been compile tested only.
      
      Fixes: 442ec4c0 ("PCI: dwc: all: Split struct pcie_port into host-only and core structures")
      Signed-off-by: NGuenter Roeck <linux@roeck-us.net>
      Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>  # designware-plat
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Acked-by: NKishon Vijay Abraham I <kishon@ti.com>
      c0464062
  12. 22 2月, 2017 3 次提交
    • K
      PCI: dwc: all: Split struct pcie_port into host-only and core structures · 442ec4c0
      Kishon Vijay Abraham I 提交于
      Keep only the host-specific members in struct pcie_port and move the common
      members (i.e common to both host and endpoint) to struct dw_pcie.  This is
      in preparation for adding endpoint mode support to designware driver.
      
      While at that also fix checkpatch warnings.
      Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      CC: Jingoo Han <jingoohan1@gmail.com>
      CC: Richard Zhu <hongxing.zhu@nxp.com>
      CC: Lucas Stach <l.stach@pengutronix.de>
      CC: Murali Karicheri <m-karicheri2@ti.com>
      CC: Minghuan Lian <minghuan.Lian@freescale.com>
      CC: Mingkai Hu <mingkai.hu@freescale.com>
      CC: Roy Zang <tie-fei.zang@freescale.com>
      CC: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
      CC: Niklas Cassel <niklas.cassel@axis.com>
      CC: Jesper Nilsson <jesper.nilsson@axis.com>
      CC: Joao Pinto <Joao.Pinto@synopsys.com>
      CC: Zhou Wang <wangzhou1@hisilicon.com>
      CC: Gabriele Paoloni <gabriele.paoloni@huawei.com>
      CC: Stanimir Varbanov <svarbanov@mm-sol.com>
      CC: Pratyush Anand <pratyush.anand@gmail.com>
      442ec4c0
    • K
      PCI: dwc: all: Use platform_set_drvdata() to save private data · 9bcf0a6f
      Kishon Vijay Abraham I 提交于
      Add platform_set_drvdata() in all designware-based drivers to store the
      private data structure of the driver so that dev_set_drvdata() can be used
      to get back private data structure in add_pcie_port/host_init.  This is in
      preparation for splitting struct pcie_port into core and host only
      structures. After the split pcie_port will not be part of the driver's
      private data structure and *container_of* used now to get the private data
      pointer cannot be used.
      Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      CC: Jingoo Han <jingoohan1@gmail.com>
      CC: Richard Zhu <hongxing.zhu@nxp.com>
      CC: Lucas Stach <l.stach@pengutronix.de>
      CC: Murali Karicheri <m-karicheri2@ti.com>
      CC: Minghuan Lian <minghuan.Lian@freescale.com>
      CC: Mingkai Hu <mingkai.hu@freescale.com>
      CC: Roy Zang <tie-fei.zang@freescale.com>
      CC: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
      CC: Niklas Cassel <niklas.cassel@axis.com>
      CC: Jesper Nilsson <jesper.nilsson@axis.com>
      CC: Joao Pinto <Joao.Pinto@synopsys.com>
      CC: Zhou Wang <wangzhou1@hisilicon.com>
      CC: Gabriele Paoloni <gabriele.paoloni@huawei.com>
      CC: Stanimir Varbanov <svarbanov@mm-sol.com>
      CC: Pratyush Anand <pratyush.anand@gmail.com>
      9bcf0a6f
    • K
      PCI: Move DesignWare IP support to new drivers/pci/dwc/ directory · 950bf638
      Kishon Vijay Abraham I 提交于
      Group all the PCI drivers that use DesignWare core in dwc directory.
      dwc IP is capable of operating in both host mode and device mode and
      keeping it inside the *host* directory is misleading.
      Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Acked-by: NJingoo Han <jingoohan1@gmail.com>
      Acked-By: NJoao Pinto <jpinto@synopsys.com>
      Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Cc: Minghuan Lian <minghuan.Lian@freescale.com>
      Cc: Mingkai Hu <mingkai.hu@freescale.com>
      Cc: Roy Zang <tie-fei.zang@freescale.com>
      Cc: Richard Zhu <hongxing.zhu@nxp.com>
      Cc: Lucas Stach <l.stach@pengutronix.de>
      Cc: Murali Karicheri <m-karicheri2@ti.com>
      Cc: Pratyush Anand <pratyush.anand@gmail.com>
      Cc: Niklas Cassel <niklas.cassel@axis.com>
      Cc: Jesper Nilsson <jesper.nilsson@axis.com>
      Cc: Zhou Wang <wangzhou1@hisilicon.com>
      Cc: Gabriele Paoloni <gabriele.paoloni@huawei.com>
      Cc: Stanimir Varbanov <svarbanov@mm-sol.com>
      950bf638
  13. 12 10月, 2016 2 次提交
  14. 23 8月, 2016 1 次提交
  15. 02 8月, 2016 1 次提交
    • P
      PCI: keystone: Make explicitly non-modular · 1481bf21
      Paul Gortmaker 提交于
      This code is not being built as a module by anyone:
      
        drivers/pci/host/Kconfig:config PCI_KEYSTONE
        drivers/pci/host/Kconfig:       bool "TI Keystone PCIe controller"
      
      Remove uses of MODULE_DESCRIPTION(), MODULE_AUTHOR(), MODULE_LICENSE(),
      etc., so that when reading the driver there is no doubt it is builtin-only.
      The information is preserved in comments at the top of the file.
      
      Replace module_platform_driver() with builtin_platform_driver(), which uses
      the same init level priority, so init ordering is unchanged.
      
      Note that MODULE_DEVICE_TABLE is a no-op for non-modular code.
      
      [bhelgaas: changelog]
      Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Tested-By: NMurali Karicheri <m-karicheri2@ti.com>
      1481bf21
  16. 26 4月, 2016 1 次提交
    • M
      PCI: keystone: Remove unnecessary goto statement · 1e9f8dcf
      Murali Karicheri 提交于
      Fix the misuse of goto statement in ks_pcie_get_irq_controller_info() as
      simple return is more appropriate for this function.  While at it add an
      error log for absence of interrupt controller node.
      
      [bhelgaas: drop "ret" altogether since we always know the return value]
      Signed-off-by: NMurali Karicheri <m-karicheri2@ti.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      CC: Rob Herring <robh+dt@kernel.org>
      CC: Pawel Moll <pawel.moll@arm.com>
      CC: Mark Rutland <mark.rutland@arm.com>
      CC: Ian Campbell <ijc+devicetree@hellion.org.uk>
      CC: Kumar Gala <galak@codeaurora.org>
      1e9f8dcf
  17. 15 4月, 2016 1 次提交
  18. 15 3月, 2016 1 次提交
    • J
      PCI: designware: Add generic dw_pcie_wait_for_link() · 886bc5ce
      Joao Pinto 提交于
      Several DesignWare-based drivers (dra7xx, exynos, imx6, keystone, qcom, and
      spear13xx) had similar loops waiting for the link to come up.
      
      Add a generic dw_pcie_wait_for_link() for use by all these drivers so the
      waiting is done consistently, e.g., always using usleep_range() rather than
      mdelay() and using similar timeouts and retry counts.
      
      Note that this changes the Keystone link training/wait for link strategy,
      so we initiate link training, then wait longer for the link to come up
      before re-initiating link training.
      
      [bhelgaas: changelog, split into its own patch, update pci-keystone.c, pcie-qcom.c]
      Signed-off-by: NJoao Pinto <jpinto@synopsys.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Acked-by: NPratyush Anand <pratyush.anand@gmail.com>
      886bc5ce
  19. 12 3月, 2016 1 次提交
  20. 16 9月, 2015 1 次提交
    • T
      genirq: Remove irq argument from irq flow handlers · bd0b9ac4
      Thomas Gleixner 提交于
      Most interrupt flow handlers do not use the irq argument. Those few
      which use it can retrieve the irq number from the irq descriptor.
      
      Remove the argument.
      
      Search and replace was done with coccinelle and some extra helper
      scripts around it. Thanks to Julia for her help!
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Cc: Julia Lawall <Julia.Lawall@lip6.fr>
      Cc: Jiang Liu <jiang.liu@linux.intel.com>
      bd0b9ac4
  21. 17 7月, 2015 2 次提交
  22. 25 6月, 2015 1 次提交
    • T
      PCI/keystone: Fix race in installing chained IRQ handler · 2cf5a03c
      Thomas Gleixner 提交于
      Fix a race where a pending interrupt could be received and the handler
      called before the handler's data has been setup, by converting to
      irq_set_chained_handler_and_data().
      
      Search and conversion was done with coccinelle:
      
      @@
      expression E1, E2, E3;
      @@
      (
      -if (irq_set_chained_handler(E1, E3) != 0)
      -   BUG();
      |
      -irq_set_chained_handler(E1, E3);
      )
      -irq_set_handler_data(E1, E2);
      +irq_set_chained_handler_and_data(E1, E3, E2);
      
      @@
      expression E1, E2, E3;
      @@
      (
      -if (irq_set_chained_handler(E1, E3) != 0)
      -   BUG();
      ...
      |
      -irq_set_chained_handler(E1, E3);
      ...
      )
      -irq_set_handler_data(E1, E2);
      +irq_set_chained_handler_and_data(E1, E3, E2);
      Reported-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Cc: Julia Lawall <Julia.Lawall@lip6.fr>
      Cc: Murali Karicheri <m-karicheri2@ti.com>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: linux-pci@vger.kernel.org
      Cc: linux-arm-kernel@lists.infradead.org
      2cf5a03c
  23. 11 6月, 2015 1 次提交
  24. 10 1月, 2015 1 次提交
  25. 27 12月, 2014 1 次提交
  26. 14 11月, 2014 1 次提交
  27. 20 10月, 2014 1 次提交