提交 · b4f199c7b00c87183f10c0a8f635f26ba2ede3eb · openeuler / Kernel

22 6月, 2019 40 次提交

drm/amdgpu: Enable DC support for Navi10 · b4f199c7

由 Harry Wentland 提交于 2月 26, 2019

Enable the IP for navi10.
Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

b4f199c7

drm/amd/display: Hook DCN2 into amdgpu_dm and expose as config (v2) · 476e955d

由 Harry Wentland 提交于 2月 22, 2019

Enable DCN2 support in DM (Display Manager).

v2: fix spurious raven change (Alex)
Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

476e955d

A
drm/amd/display: update dcn2 dc_plane_cap · 5b1b2f20
由 Alex Deucher 提交于 4月 22, 2019
```
To deal with rebasing the code.
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
```
5b1b2f20

drm/amd/display: updates for dcn20_update_bandwidth · e2494282

由 Alex Deucher 提交于 4月 22, 2019

Pass extra parameter to validate_bandwidth() callback.
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

e2494282

A
drm/amd/display: add fast_validate parameter to dcn20_validate_bandwidth · cb0b554a
由 Alex Deucher 提交于 4月 22, 2019
```
To deal with changes from rebasing.
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
```
cb0b554a

drm/amd/display: hook navi10 pplib functions · 79a7b060

由 hersen wu 提交于 5月 23, 2019

during bring up time, before window dc-ppplib interface
design, linux dc use raven dc-pplib interface.
now nvai10 dc-pplib-smu interface is changed and verified
under window, navi10 need its specific dc-pplib-smu
interface. todo: hook set_hard_min_uclk_by_freq,
get_maximum_sustainable_clocks
Signed-off-by: Nhersen wu <hersenxs.wu@amd.com>
Acked-by: NAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: NRoman Li <Roman.Li@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

79a7b060

drm/amd/powerplay: add interface to get uclk dpm table · be9a7355

由 hersen wu 提交于 5月 21, 2019

dc needs get uclk dpm table for bandwidth calculation
Signed-off-by: Nhersen wu <hersenxs.wu@amd.com>
Acked-by: NAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: NHuang Rui <ray.huang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

be9a7355

drm/amd/powrplay: add interface for dc to get max clock values · a18bf0ca

由 hersen wu 提交于 5月 21, 2019

dc (display component) needs maximum clock values of uclock,
socclk, dcefclk, to calculate display bandwidth.
Signed-off-by: Nhersen wu <hersenxs.wu@amd.com>
Acked-by: NAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: NHuang Rui <ray.huang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

a18bf0ca

drm/amd/display: Add DC core changes for DCN2 · 6fbefb84

由 Harry Wentland 提交于 2月 22, 2019

Core DC changes for DCN2.
Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

6fbefb84

drm/amd/display: Add DCN2 HW Sequencer and Resource · 7ed4e635

由 Harry Wentland 提交于 2月 22, 2019

Add DCN2 resource definition and HW Sequencer changes.
Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

7ed4e635

drm/amd/display: Add DCN2 VMID · 18eaea4b

由 Harry Wentland 提交于 2月 22, 2019

Add support to program DCN2 VMID (Virtual Memory Support)
Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

18eaea4b

drm/amd/display: Add DCN2 IPP · 83421f32

由 Harry Wentland 提交于 2月 22, 2019

Add support to program DCN2 cursor (IPP)
Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

83421f32

drm/amd/display: Add DCN2 DWB · 345429a6

由 Harry Wentland 提交于 2月 22, 2019

Add support to program the DCN2 DWB (Display Writeback)

HW Blocks:

 +--------++------+       +----------+
 | HUBBUB || HUBP |  <--  | MMHUBBUB |
 +--------++------+       +----------+
        |                     ^
        v                     |
    +--------+            +--------+
    |  DPP   |            |  DWB   |
    +--------+            +--------+
        |
        v                      ^
    +--------+                 |
    |  MPC   |                 |
    +--------+                 |
        |                      |
        v                      |
    +-------+                  |
    |  OPP  |                  |
    +-------+                  |
        |                      |
        v                      |
    +--------+                /
    |  OPTC  |  --------------
    +--------+
        |
        v
    +--------+       +--------+
    |  DIO   |       |  DCCG  |
    +--------+       +--------+
Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

345429a6

drm/amd/display: Add DCN2 MMHUBBUB · fa0d2c98

由 Harry Wentland 提交于 2月 22, 2019

Add support to program the DCN2 MMHUBBUB (Multimedia HUB interface)

HW Blocks:

 +--------++------+       +----------+
 | HUBBUB || HUBP |  <--  | MMHUBBUB |
 +--------++------+       +----------+
        |
        v
    +--------+
    |  DPP   |
    +--------+
        |
        v
    +--------+
    |  MPC   |
    +--------+
        |
        v
    +-------+
    |  OPP  |
    +-------+
        |
        v
    +--------+
    |  OPTC  |
    +--------+
        |
        v
    +--------+       +--------+
    |  DIO   |       |  DCCG  |
    +--------+       +--------+
Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

fa0d2c98

drm/amd/display: Add DCN2 HUBP and HUBBUB · bbeb64d0

由 Harry Wentland 提交于 5月 07, 2019

Add support to program the DCN2 HUBP (Display to data fabric interface
pipe) and HUBBUB (DCN memory HUB interface)

HW Blocks:

 +--------++------+
 | HUBBUB || HUBP |
 +--------++------+
        |
        v
    +--------+
    |  DPP   |
    +--------+
        |
        v
    +--------+
    |  MPC   |
    +--------+
        |
        v
    +-------+
    |  OPP  |
    +-------+
        |
        v
    +--------+
    |  OPTC  |
    +--------+
        |
        v
    +--------+       +--------+
    |  DIO   |       |  DCCG  |
    +--------+       +--------+
Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

bbeb64d0

drm/amd/display: Add DCN2 DPP · f7de96ee

由 Harry Wentland 提交于 2月 22, 2019

Add support to program the DCN2 DPP (Multiple pipe and plane combine)

HW Blocks:

    +--------+
    |  DPP   |
    +--------+
        |
        v
    +--------+
    |  MPC   |
    +--------+
        |
        v
    +-------+
    |  OPP  |
    +-------+
        |
        v
    +--------+
    |  OPTC  |
    +--------+
        |
        v
    +--------+       +--------+
    |  DIO   |       |  DCCG  |
    +--------+       +--------+
Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

f7de96ee

drm/amd/display: Add DCN2 MPC · f789b0b8

由 Harry Wentland 提交于 2月 22, 2019

Add support to program the DCN2 MPC (Multiple pipe and plane combine)

HW Blocks:

    +--------+
    |  MPC   |
    +--------+
        |
        v
    +-------+
    |  OPP  |
    +-------+
        |
        v
    +--------+
    |  OPTC  |
    +--------+
        |
        v
    +--------+       +--------+
    |  DIO   |       |  DCCG  |
    +--------+       +--------+
Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

f789b0b8

drm/amd/display: Add DCN2 OPP · eb7a74a3

由 Harry Wentland 提交于 2月 22, 2019

Add support to program the DCN2 OPP (Output Plane Processing)

HW Blocks:

    +-------+
    |  OPP  |
    +-------+
        |
        v
    +--------+
    |  OPTC  |
    +--------+
        |
        v
    +--------+       +--------+
    |  DIO   |       |  DCCG  |
    +--------+       +--------+
Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

eb7a74a3

drm/amd/display: Add DCN2 OPTC · 2d78b3a1

由 Harry Wentland 提交于 2月 22, 2019

Add support for programming the DCN2 OPTC (Output Timing Controller)

HW Blocks:

    +--------+
    |  OPTC  |
    +--------+
        |
        v
    +--------+       +--------+
    |  DIO   |       |  DCCG  |
    +--------+       +--------+
Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

2d78b3a1

drm/amd/display: Add DCN2 clk mgr · fcee01b9

由 Harry Wentland 提交于 5月 07, 2019

Adds support for handling of clocking relevant to the DCN2 block,
including programming of the DCCG (Display Controller Clock Generator)
block:

HW Blocks:

    +--------+       +--------+
    |  DIO   |       |  DCCG  |
    +--------+       +--------+
Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

fcee01b9

drm/amd/display: Add DCN2 DIO · ca4d9b3a

由 Harry Wentland 提交于 5月 07, 2019

Add support for the DIO (Display IO)  block of DCN2, which entails our
stream and link encoders.

HW Blocks:

    +--------+
    |  DIO   |
    +--------+
Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

ca4d9b3a

drm/amd/display: Add DCN2 changes to DML · 728c0698

由 Harry Wentland 提交于 2月 22, 2019

Update DML (Display Mode Lib) to support DCN2
Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

728c0698

drm/amd/display: Add DCN2 IRQ handling · bff65b77

由 Harry Wentland 提交于 2月 22, 2019

Add support to program DCN2 IRQ handling
Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

bff65b77

drm/amd/display: Add DCN2 BIOS parsing · 96475094

由 Harry Wentland 提交于 2月 22, 2019

Handle BIOS parsing for DCN2
Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

96475094

drm/amd/display: Add GPIO support for DCN2 · 2e35facf

由 Harry Wentland 提交于 2月 22, 2019

Adding support to program GPIO HW block of DCN2
Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

2e35facf

drm/amd/display: add AUX and I2C for DCN2 · 38e71289

由 Harry Wentland 提交于 5月 07, 2019

Adding support to program DCN2 AUX and I2C HW.
Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

38e71289

drm/amd/display: Add DCN2 and NV ASIC ID · 97930145

由 Harry Wentland 提交于 2月 22, 2019

DCN2.0 (Display Core Next) is the display block in Navi10.
Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

97930145

drm/amd/display: use fixed-width data type for soc bounding box struct · 76b743f4

由 Xiaojie Yuan 提交于 3月 19, 2019

since it's firmware.
Signed-off-by: NXiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

76b743f4

drm/amdgpu: Split gpu_info_soc_bounding_box out from amdgpu_ucode.h · 57b3ec35

由 Leo Li 提交于 4月 03, 2019

DC needs to include the soc bounding box when initializing HW resources.

Including amdgpu_ucode.h directly will cause warnings, since amdgpu.h is
required to define amdgpu_device. The solution here is to split the
bounding box structs into a different header, then include it in both
amdgpu_ucode.h, and relevant DC HW resource files.
Signed-off-by: NLeo Li <sunpeng.li@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

57b3ec35

drm/amd/display: Read soc_bounding_box from gpu_info (v2) · 48321c3d

由 Harry Wentland 提交于 5月 07, 2019

[WHY]
We don't want to expose sensitive ASIC information before ASIC release.

[HOW]
Encode the soc_bounding_box in the gpu_info FW (for Linux) and read it
at driver load.

v2: fix warning when CONFIG_DRM_AMD_DC_DCN2_0 is not set (Alex)
Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

48321c3d

drm/amd/powerplay: notify smu with active display count · edee92c3

由 hersen wu 提交于 5月 21, 2019

when dc update clocks via smu, smu needs to know how many
displays active. this interface is for dc notify number
of active displays to smu.
Signed-off-by: Nhersen wu <hersenxs.wu@amd.com>
Reviewed-by: NHuang Rui <ray.huang@amd.com>
Acked-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

edee92c3

drm/amd/powerplay: allow dc request uclk change · 5c170a59

由 hersen wu 提交于 5月 22, 2019

when dc set mode or color format in frame buffer
change, it may request clock changes, like dispclk,
dcfclk, uclk. after smu get clock requests, smu
will make decision.
Signed-off-by: Nhersen wu <hersenxs.wu@amd.com>
Reviewed-by: NHuang Rui <ray.huang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

5c170a59

drm/amdgpu: initialize THM & CLK IP registers base address · ccbf007b

由 Hawking Zhang 提交于 6月 15, 2019

was missed before.
Signed-off-by: NHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

ccbf007b

drm/amdgpu: fix PA_SC_FIFO_SIZE for Navi10 (v2) · 61af800f

由 Marek Olšák 提交于 5月 28, 2019

Proper size is 0.

v2: squash in whitespace fixes (Ernst Sjöstrand)
Signed-off-by: NMarek Olšák <marek.olsak@amd.com>
Reviewed-by: NXiaojie Yuan <xiaojie.yuan@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

61af800f

drm/amd/powerplay: remove unsupport function set_thermal_fan_table for navi10 · 93dfbcef

由 Kevin Wang 提交于 5月 30, 2019

the PPSMC_MSG_SetFanTemperatureTarget is not support on navi10
Signed-off-by: NKevin Wang <kevin1.wang@amd.com>
Reviewed-by: NHuang Rui <ray.huang@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

93dfbcef

drm/amd/powerplay: enable BACO feature as WAR · 7c6fe84c

由 Jack Xiao 提交于 6月 01, 2019

It would hit SMU fw bug without BACO enablement when audio
driver put audio device to D3 state. Before the bug in SMU fw
get fixed, enable BACO feature as WAR.
Signed-off-by: NJack Xiao <Jack.Xiao@amd.com>
Acked-by: NHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

7c6fe84c

drm/amd/powerplay: use pp_feature_mask to control uclk(mclk) dpm enabled · a39bf398

由 Kevin Wang 提交于 5月 30, 2019

the uclk dpm feature is not work well on all navi10 asic,
use pp feature mask module parameter to control it.
Signed-off-by: NKevin Wang <kevin1.wang@amd.com>
Reviewed-by: NJack Xiao <Jack.Xiao@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

a39bf398

drm/amdgpu: add new navi10 DIDs · 4f56d9d4

由 tiancyin 提交于 5月 30, 2019

Reviewed-by: NJack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Ntiancyin <tianci.yin@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

4f56d9d4

drm/amd/powerplay: add ppt interface version log · 408e27cb

由 tiancyin 提交于 5月 20, 2019

Include the interface version as well.
Signed-off-by: Ntiancyin <tianci.yin@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

408e27cb

A
drm/amdgpu/gfx10: update to latest golden setting · 6ad68a7e
由 Alex Deucher 提交于 6月 04, 2019
```
Fix UTCL1_CGTT_CLK_CTRL
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
```
6ad68a7e

openeuler / Kernel 1 年多 前同步成功

openeuler / Kernel
1 年多前同步成功