1. 06 4月, 2019 1 次提交
    • T
      bus: ti-sysc: Handle swsup idle mode quirks · b4a9a7a3
      Tony Lindgren 提交于
      In preparation of dropping interconnect target module platform data in
      favor of devicetree based data, we must pass swsup idle quirks to the
      platform data functions.
      
      For now, let's only tag the UART modules with the SWSUP_SIDLE_ACT quirk.
      The other modules will get tagged with swsup quirks as we drop the
      platform data and test the changes.
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      b4a9a7a3
  2. 04 4月, 2019 6 次提交
    • T
      bus: ti-sysc: Add quirk handling for external optional functional clock · a54275f4
      Tony Lindgren 提交于
      We cannot access mcpdm registers at all unless there is an optional pdmclk
      configured. As this is currently only needed for mcpdm, let's check for
      mcpdm in sysc_get_clocks(). If it turns out to be needed for other modules
      too, we can add more flags to the quirks table for this.
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      a54275f4
    • T
      bus: ti-sysc: Add support for early quirks based on register address · 42b9c5c9
      Tony Lindgren 提交于
      At least mcpdm needs an optional external clock enabled to function and
      this clock typically comes from the PMIC. We can detect mcpdm based on
      the interconnect target module address and set a quirk flag early.
      
      To do this, let's initialize the clocks a bit later and add a new
      function for sysc_init_early_quirks(). Note that we cannot yet enable
      the early quirks for mcpdm until the optional external clocks are
      handled in the in the following patch.
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      42b9c5c9
    • T
      bus: ti-sysc: Move rstctrl reset to happen later · b11c1ea1
      Tony Lindgren 提交于
      We can do the rsstctrl a bit later, but need to deassert rstctrl reset
      before the clocks are enabled if asserted. Let's only init restctrl
      in sysc_init_resets() and do the reset later on just before we enable
      the device clocks.
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      b11c1ea1
    • T
      bus: ti-sysc: Manage clocks for the interconnect target module in all cases · 93de83a2
      Tony Lindgren 提交于
      We are currently not managing interconnect target module clocks in the
      for legacy platform data based case. This causes a problem for using the
      platform data based functions when dropping the platform data for the
      interconnect target module configuration.
      
      To avoid a situation where we need to populate the main and optional
      clocks also for the platform data based functions, let's just manage the
      clocks directly in ti-sysc driver. This means that until the interconnect
      target module confugration platform data is dropped our use count for
      clk_enable() will be 2 instead of 1.
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      93de83a2
    • T
      bus: ti-sysc: Allocate mdata as needed and do platform data based init later · a3e92e7b
      Tony Lindgren 提交于
      The platform data based init functions typically reset the interconnect
      target module configure the registers. As we may need the interconnect
      target module specific quirks configured based on the revision register,
      we want to move the platform data based init to happen later.
      
      Let's allocate mdata as needed so it's available for sysc_legacy_init()
      that we call with module clocks enabled from sysc_init_module().
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      a3e92e7b
    • T
      bus: ti-sysc: Enable all clocks directly during init to read revision · 1a5cd7c2
      Tony Lindgren 提交于
      The first thing we want to do is just read the module revision register to
      be able to configure the module specific quirks and configure the module
      registers.
      
      As the interconnect target module may not yet be properly configured and
      may need a reset first, we don't want to use pm_runtime_get() at this
      point.
      
      To read the revision register, let's just enable the all the clocks for
      the interconnect target module during init even if the optional clocks
      are not needed. That way we can read the revision register to configure
      the quirks needed for PM runtime.
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      1a5cd7c2
  3. 01 4月, 2019 5 次提交
  4. 08 2月, 2019 1 次提交
  5. 29 1月, 2019 1 次提交
    • T
      bus: ti-sysc: Fix timer handling with drop pm_runtime_irq_safe() · 9bd34c63
      Tony Lindgren 提交于
      Commit 84badc5e ("ARM: dts: omap4: Move l4 child devices to probe
      them with ti-sysc") started producing a warning for pwm-omap-dmtimer:
      
      WARNING: CPU: 0 PID: 77 at drivers/bus/omap_l3_noc.c:147
      l3_interrupt_handler+0x2f8/0x388
      44000000.ocp:L3 Custom Error: MASTER MPU TARGET L4PER2 (Idle):
      Data Access in Supervisor mode during Functional access
      ...
      __pm_runtime_idle
      omap_dm_timer_disable
      pwm_omap_dmtimer_start
      pwm_omap_dmtimer_enable
      pwm_apply_state
      pwm_vibrator_start
      pwm_vibrator_play_work
      
      This is because the timer that pwm-omap-dmtimer is using is now being
      probed with ti-sysc interconnect target module instead of omap_device
      and the ti-sysc quirk for SYSC_QUIRK_LEGACY_IDLE is not fully
      compatible with what omap_device has been doing.
      
      We could fix this by reverting the timer changes and have the timer
      probe again with omap_device. Or we could add more quirk handling to
      ti-sysc driver. But as these options don't work nicely as longer term
      solutions, let's just make timers probe with ti-sysc without any
      quirks.
      
      To do this, all we need to do is remove quirks for timers for ti-sysc,
      and drop the bogus pm_runtime_irq_safe() flag for timer-ti-dm.
      
      We should not use pm_runtime_irq_safe() anyways for drivers as it will
      take a permanent use count on the parent device blocking the parent
      devices from idling and has been forcing ti-sysc driver to use a
      quirk flag.
      
      Note that we will move the timer data to DEBUG section later on in
      clean-up patches.
      
      Fixes: 84badc5e ("ARM: dts: omap4: Move l4 child devices to probe them with ti-sysc")
      Cc: Andy Shevchenko <andy.shevchenko@gmail.com>
      Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
      Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
      Cc: H. Nikolaus Schaller <hns@goldelico.com>
      Cc: Keerthy <j-keerthy@ti.com>
      Cc: Ladislav Michl <ladis@linux-mips.org>
      Cc: Pavel Machek <pavel@ucw.cz>
      Cc: Sebastian Reichel <sre@kernel.org>
      Cc: Tero Kristo <t-kristo@ti.com>
      Cc: Thierry Reding <thierry.reding@gmail.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Reported-by: NH. Nikolaus Schaller <hns@goldelico.com>
      Tested-By: NAndreas Kemnade <andreas@kemnade.info>
      Tested-By: NH. Nikolaus Schaller <hns@goldelico.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      9bd34c63
  6. 12 1月, 2019 1 次提交
  7. 11 1月, 2019 2 次提交
    • S
      bus: imx-weim: guard against timing configuration conflicts · c7995bcb
      Sven Van Asbroeck 提交于
      When specifying weim child devices, there is a risk that more than
      one timing setting is specified for the same chip select.
      
      The driver cannot support such a configuration.
      
      In case of conflict, this patch will print a warning to the log,
      and will ignore the child node in question.
      
      In this example, node acme@1 will be ignored, as it tries to modify
      timing settings for CS0:
      
      &weim {
      	acme@0 {
      		compatible = "acme,whatever";
      		reg = <0 0 0x100>;
      		fsl,weim-cs-timing = <something>;
      	};
      	acme@1 {
      		compatible = "acme,whatnot";
      		reg = <0 0x500 0x100>;
      		fsl,weim-cs-timing = <something else>;
      	};
      };
      
      However in this example, the driver will be happy:
      
      &weim {
              acme@0 {
                      compatible = "acme,whatever";
                      reg = <0 0 0x100>;
                      fsl,weim-cs-timing = <something>;
              };
              acme@1 {
                      compatible = "acme,whatnot";
                      reg = <0 0x500 0x100>;
                      fsl,weim-cs-timing = <something>;
              };
      };
      Signed-off-by: NSven Van Asbroeck <TheSven73@googlemail.com>
      Signed-off-by: NShawn Guo <shawnguo@kernel.org>
      c7995bcb
    • S
      bus: imx-weim: support multiple address ranges per child node · 8b8cb52a
      Sven Van Asbroeck 提交于
      Ensure that timing values for the child node are applied to
      all chip selects in the child's address ranges.
      
      Note that this does not support multiple timing settings per
      child; this can be added in the future if required.
      
      Example:
      &weim {
      	acme@0 {
      		compatible = "acme,whatever";
      		reg = <0 0 0x100>, <0 0x400000 0x800>,
      				<1 0x400000 0x800>;
      		fsl,weim-cs-timing = <0x024400b1 0x00001010 0x20081100
      				0x00000000 0xa0000240 0x00000000>;
      	};
      };
      Signed-off-by: NSven Van Asbroeck <TheSven73@googlemail.com>
      Signed-off-by: NShawn Guo <shawnguo@kernel.org>
      8b8cb52a
  8. 19 12月, 2018 1 次提交
  9. 11 12月, 2018 1 次提交
    • T
      bus: ti-sysc: Check for no-reset and no-idle flags at the child level · 4014c08b
      Tony Lindgren 提交于
      With ti-sysc, we need to now have the device tree properties for
      ti,no-reset-on-init and ti,no-idle-on-init at the module level instead
      of the child device level.
      
      Let's check for these properties at the child device level to enable
      quirks, and warn about moving the properties to the module level.
      
      Otherwise am335x-evm based boards tagging gpio1 with ti,no-reset-on-init
      will have their DDR power disabled if wired up in such a tricky way.
      
      Note that this should not be an issue for earlier kernels as we don't
      rely on this until the dts files have been updated to probe with ti-sysc
      interconnect target driver.
      
      Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
      Reported-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      4014c08b
  10. 06 12月, 2018 1 次提交
  11. 16 11月, 2018 3 次提交
  12. 06 11月, 2018 1 次提交
  13. 02 10月, 2018 1 次提交
  14. 01 10月, 2018 1 次提交
  15. 29 9月, 2018 5 次提交
  16. 25 9月, 2018 6 次提交
  17. 21 9月, 2018 1 次提交
  18. 13 9月, 2018 2 次提交
    • J
      gpiolib: Pass array info to get/set array functions · 77588c14
      Janusz Krzysztofik 提交于
      In order to make use of array info obtained from gpiod_get_array() and
      speed up processing of arrays matching single GPIO chip layout, that
      information must be passed to get/set array functions.  Extend the
      functions' API with that additional parameter and update all users.
      Pass NULL if a user builds an array itself from single GPIOs.
      
      Cc: Jonathan Corbet <corbet@lwn.net>
      Cc: Miguel Ojeda Sandonis <miguel.ojeda.sandonis@gmail.com>
      Cc: Geert Uytterhoeven <geert@linux-m68k.org>
      Cc: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
      Cc: Lukas Wunner <lukas@wunner.de>
      Cc: Peter Korsgaard <peter.korsgaard@barco.com>
      Cc: Peter Rosin <peda@axentia.se>
      Cc: Andrew Lunn <andrew@lunn.ch>
      Cc: Florian Fainelli <f.fainelli@gmail.com>
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: Rojhalat Ibrahim <imr@rtschenk.de>
      Cc: Dominik Brodowski <linux@dominikbrodowski.net>
      Cc: Russell King <rmk+kernel@armlinux.org.uk>
      Cc: Kishon Vijay Abraham I <kishon@ti.com>
      Cc: Tony Lindgren <tony@atomide.com>
      Cc: Lars-Peter Clausen <lars@metafoo.de>
      Cc: Michael Hennerich <Michael.Hennerich@analog.com>
      Cc: Jonathan Cameron <jic23@kernel.org>
      Cc: Hartmut Knaack <knaack.h@gmx.de>
      Cc: Peter Meerwald-Stadler <pmeerw@pmeerw.net>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Jiri Slaby <jslaby@suse.com>
      Cc: Yegor Yefremov <yegorslists@googlemail.com>
      Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
      Signed-off-by: NJanusz Krzysztofik <jmkrzyszt@gmail.com>
      Acked-by: NUlf Hansson <ulf.hansson@linaro.org>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      77588c14
    • J
      gpiolib: Pass bitmaps, not integer arrays, to get/set array · b9762beb
      Janusz Krzysztofik 提交于
      Most users of get/set array functions iterate consecutive bits of data,
      usually a single integer, while processing array of results obtained
      from, or building an array of values to be passed to those functions.
      Save time wasted on those iterations by changing the functions' API to
      accept bitmaps.
      
      All current users are updated as well.
      
      More benefits from the change are expected as soon as planned support
      for accepting/passing those bitmaps directly from/to respective GPIO
      chip callbacks if applicable is implemented.
      
      Cc: Jonathan Corbet <corbet@lwn.net>
      Cc: Miguel Ojeda Sandonis <miguel.ojeda.sandonis@gmail.com>
      Cc: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
      Cc: Lukas Wunner <lukas@wunner.de>
      Cc: Peter Korsgaard <peter.korsgaard@barco.com>
      Cc: Peter Rosin <peda@axentia.se>
      Cc: Andrew Lunn <andrew@lunn.ch>
      Cc: Florian Fainelli <f.fainelli@gmail.com>
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: Rojhalat Ibrahim <imr@rtschenk.de>
      Cc: Dominik Brodowski <linux@dominikbrodowski.net>
      Cc: Russell King <rmk+kernel@armlinux.org.uk>
      Cc: Kishon Vijay Abraham I <kishon@ti.com>
      Cc: Tony Lindgren <tony@atomide.com>
      Cc: Lars-Peter Clausen <lars@metafoo.de>
      Cc: Michael Hennerich <Michael.Hennerich@analog.com>
      Cc: Jonathan Cameron <jic23@kernel.org>
      Cc: Hartmut Knaack <knaack.h@gmx.de>
      Cc: Peter Meerwald-Stadler <pmeerw@pmeerw.net>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Jiri Slaby <jslaby@suse.com>
      Cc: Yegor Yefremov <yegorslists@googlemail.com>
      Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
      Signed-off-by: NJanusz Krzysztofik <jmkrzyszt@gmail.com>
      Acked-by: NUlf Hansson <ulf.hansson@linaro.org>
      Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
      Tested-by: NGeert Uytterhoeven <geert+renesas@glider.be>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      b9762beb