On some Cherry Trail systems the GPU ACPI fwnode has power-resources which
point to the PMIC, which is connected over a LPSS I2C controller. The GPU
is a PCI device and PCI devices are powered-on at the resume_noirq resume
phase.

Since the GPU power-resources need the I2C controller, recent acpi_lpss.c
changes now also power-up the LPSS I2C controllers on BYT and CHT devices
in the resume_noirq resume phase. But during this phase the IRQ of the
controller is disabled leading to these errors:

 i2c_designware 808622C1:06: controller timed out
 ACPI Error: AE_ERROR, Returned by Handler for [UserDefinedRegion]
 ACPI Error: Method parse/execution failed \_SB.P18W._ON, AE_ERROR
 video LNXVIDEO:00: Failed to change power state to D0

This commit makes the i2c-designware controller set the IRQF_NO_SUSPEND
flag when requesting the interrupt on BYT and CHT devices, so that the IRQ
is left enabled during the noirq phase, fixing this.
Tested-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Commit a3d411fb ("i2c: designware: Disable pm for PMIC i2c-bus even if
there is no _SEM method"), always set the pm_disabled flag on the I2C7
controller, even if its bus was not shared with the PUNIT.

This was a workaround for various suspend/resume issues, after the
following 2 commits this workaround is no longer necessary:

Commit 54152772 ("PM: i2c-designware-platdrv: Suspend/resume at the
                     late/early stages")
Commit e6ce0ce3 ("ACPI / LPSS: Add device link for CHT SD card
                     dependency on I2C")

Therefor this commit removes this workaround.

After this commit the pm_disabled flag is only used to indicate that the
bus is shared with the PUNIT and after other recent changes we no longer
call dev_pm_syscore_device(dev, true), so we are no longer actually
disabling (non-runtime) pm, so this commit also renames the flag to
shared_with_punit to better reflect what it is for.
Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

On Bay Trail and Cherry Trail devices we set the pm_disabled flag for I2C
busses which the OS shares with the PUNIT as these need special handling.
Until now we called dev_pm_syscore_device(dev, true) for I2C controllers
with this flag set to keep these I2C controllers always on.

After commit 12864ff8 ("ACPI / LPSS: Avoid PM quirks on suspend and
resume from hibernation"), this no longer works. This commit modifies
lpss_iosf_exit_d3_state() to only run if lpss_iosf_enter_d3_state() has ran
before it, so that it does not run on a resume from hibernate (or from S3).

On these systems the conditions for lpss_iosf_enter_d3_state() to run
never become true, so lpss_iosf_exit_d3_state() never gets called and
the 2 LPSS DMA controllers never get forced into D0 mode, instead they
are left in their default automatic power-on when needed mode.

The not forcing of D0 mode for the DMA controllers enables these systems
to properly enter S0ix modes, which is a good thing.

But after entering S0ix modes the I2C controller connected to the PMIC
no longer works, leading to e.g. broken battery monitoring.

The _PS3 method for this I2C controller looks like this:

            Method (_PS3, 0, NotSerialized)  // _PS3: Power State 3
            {
                If ((((PMID == 0x04) || (PMID == 0x05)) || (PMID == 0x06)))
                {
                    Return (Zero)
                }

                PSAT |= 0x03
                Local0 = PSAT /* \_SB_.I2C5.PSAT */
            }

Where PMID = 0x05, so we enter the Return (Zero) path on these systems.

So even if we were to not call dev_pm_syscore_device(dev, true) the
I2C controller will be left in D0 rather then be switched to D3.

Yet on other Bay and Cherry Trail devices S0ix is not entered unless *all*
I2C controllers are in D3 mode. This combined with the I2C controller no
longer working now that we reach S0ix states on these systems leads to me
believing that the PUNIT itself puts the I2C controller in D3 when all
other conditions for entering S0ix states are true.

Since now the I2C controller is put in D3 over a suspend/resume we must
re-initialize it afterwards and that does indeed fix it no longer working.

This commit implements this fix by:

1) Making the suspend_late callback a no-op if pm_disabled is set and
making the resume_early callback skip the clock re-enable (since it now was
not disabled) while still doing the necessary I2C controller re-init.

2) Removing the dev_pm_syscore_device(dev, true) call, so that the suspend
and resume callbacks are actually called. Normally this would cause the
ACPI pm code to call _PS3 putting the I2C controller in D3, wreaking havoc
since it is shared with the PUNIT, but in this special case the _PS3 method
is a no-op so we can safely allow a "fake" suspend / resume.

Fixes: 12864ff8 ("ACPI / LPSS: Avoid PM quirks on suspend and resume ...")
Link: https://bugzilla.kernel.org/show_bug.cgi?id=200861
Cc: 4.15+ <stable@vger.kernel.org> # 4.15+
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Replace short statement in comment with proper SPDX license tag.

Note, for i2c-desingware-slave.c the identifier is chosen
in accordance with MODULE_LICENSE() macro since it is visible to user.
Another point to this choice is that the header seems to be copy'n'paste
from the other file of this very driver.
Acked-by: NLuis Oliveira <Luis.Oliveira@synopsys.com>
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Instead of using custom variables and parser, convert the driver to use
the ones provided by I2C core.

No functional change intended.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: NAlexandre Belloni <alexandre.belloni@bootlin.com>
Tested-by: NAlexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

And don't reimplement in the driver.
Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com>
Tested-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Trivial added debug print for dev->clk_freq doesn't necessarily tell the
actual bus speed or mode the controller is operating. For instance it
may indicate 1 MHz Fast Mode Plus or 3.4 MHz High Speed but driver ends up
using 400 kHz Fast Mode due missing timing parameters or missing support
from HW.

Add a debug print that prints the bus speed based on the validated speed
that gets programmed into a HW.
Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Mixed timing parameter validation, calculation and their debug prints
with HW initialization in i2c_dw_init_master() and i2c_dw_init_slave()
as been bothering me some time.

It makes function a little bit unclear to follow, doesn't show what steps
are needed to do only once during probe and what are needed whenever HW
needs to be reinitialized. Also those debug prints show information that
doesn't change runtime and thus are also needlessly printed multiple times
whenever HW is reinitialized.

Thus let the i2c_dw_init_master() and i2c_dw_init_slave() to do only HW
initialization and move out one time parameter setting and debug prints
to separate functions which are called only during probe.
Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

SDA hold time configuration is common to both master and slave code. It
is also something that can be done once during probe and do only
register write when HW needs to be reinitialized.

Remove duplication and move SDA hold time configuration to common code.
It will be called from slave probe and for master code from a new
i2c_dw_set_timings_master() to where we will populate more probe time
timing parameter setting.
Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

This is rather readability update than micro-optimization, or if not
optimization at all. We take the input clock rate to a variable and pass
that to SCL timing parameter calculation functions.
Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Move register access detection out from master and slave HW
initialization code to common code. Motivation for this is to have
register access configured before HW initialization and remove
duplicated code.

This allows to do further separation between probe time initialization
and runtime reinitialization code.
Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Low-level controller enable function __i2c_dw_enable is overloaded to
also handle disabling. What's worse, even though the documentation
requires polling the IC_ENABLE_STATUS register when disabling, this
is not done: polling needs to be requested specifically by calling
__i2c_dw_enable_and_wait, which can also poll on enabling, but that
doesn't work if the IC_ENABLE_STATUS register is not implemented.
This is quite confusing if not in fact backwards.

Especially since the documentation says that disabling should be
followed by polling, the driver should be using a separate function
where it does one-shot disables to make the optimization stand out.

This refactors the two functions so that requested status is given
in the name rather than in a boolean argument. Specifically:

 - __i2c_dw_enable: enable without polling (in accordance with docs)
 - __i2c_dw_disable: disable and do poll (also as suggested by docs)
 - __i2c_dw_disable_nowait: disable without polling (Linux-specific)

No functional change.
Signed-off-by: NAlexander Monakov <amonakov@ispras.ru>
Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
[wsa: fixed blank lines in header file]
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Not all revisions of DW I2C controller implement the enable status register.
On platforms where that's the case (e.g. BG2CD and SPEAr ARM SoCs), waiting
for enable will time out as reading the unimplemented register yields zero.

It was observed that reading the IC_ENABLE_STATUS register once suffices to
avoid getting it stuck on Bay Trail hardware, so replace polling with one
dummy read of the register.

Fixes: fba4adbb ("i2c: designware: must wait for enable")
Signed-off-by: NAlexander Monakov <amonakov@ispras.ru>
Tested-by: NBen Gardner <gardner.ben@gmail.com>
Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
Cc: stable@kernel.org

The hardware may not support SDA hold time configuration, but if it is
not set in the Device Tree either, there is no need to print a warning.
Reported-by: NThomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: NAlexander Monakov <amonakov@ispras.ru>
Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

GPIO library can return -ENOSYS for the failed request.
Instead of failing ->probe() in this case override error code to 0.

Fixes: ca382f5b ("i2c: designware: add i2c gpio recovery option")
Reported-by: NDominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Tested-by: NDominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

One I2C bus on my Atom E3845 board has been broken since 4.9.
It has two devices, both declared by ACPI and with built-in drivers.

There are two back-to-back transactions originating from the kernel, one
targeting each device. The first transaction works, the second one locks
up the I2C controller. The controller never recovers.

These kernel logs show up whenever an I2C transaction is attempted after
this failure.
i2c-designware-pci 0000:00:18.3: timeout in disabling adapter
i2c-designware-pci 0000:00:18.3: timeout waiting for bus ready

Waiting for the I2C controller status to indicate that it is enabled
before programming it fixes the issue.

I have tested this patch on 4.14 and 4.15.

Fixes: commit 2702ea7d ("i2c: designware: wait for disable/enable only if necessary")
Cc: linux-stable <stable@vger.kernel.org> #4.13+
Signed-off-by: NBen Gardner <gardner.ben@gmail.com>
Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Reviewed-by: NJosé Roberto de Souza <jose.souza@intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

This patch contains much input from Phil Reid and has been tested
on Intel/Altera Cyclone V SOC Hardware with Altera GPIO's for the
SCL and SDA GPIO's.
Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NTim Sander <tim@krieglstein.org>
Signed-off-by: NPhil Reid <preid@electromag.com.au>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Recent i2c-designware slave support patches use master or slave HW init
functions through the function pointer so we can declare them static.

While at it, rename i2c_dw_init() as i2c_dw_init_master().
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Tested-by: NLuis Oliveira <lolivei@synopsys.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

- The functions related to I2C master mode of operation were transformed
  in a single driver.
- Common definitions were moved to i2c-designware-core.h
- The i2c-designware-core is now only a library file, the functions
  associated are in a source file called i2c-designware-common and
  are used by both i2c-designware-master and i2c-designware-slave.
- To decrease noise in namespace common i2c_dw_*() functions are
  now using ops to keep them private.
- Designware PCI driver had to be changed to match the previous ops
  functions implementation.

Almost all of the "core" source is now part of the "master" source. The
difference is the functions used by both modes and they are in the
"common" source file.
Signed-off-by: NLuis Oliveira <lolivei@synopsys.com>
Acked-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

- Factor out all _master() part of code from i2c-designware-core
  and i2c-designware-platdrv to separate functions.
- Standardize all code related with MASTER mode.
- I have to take off DW_IC_INTR_TX_EMPTY from DW_IC_INTR_DEFAULT_MASK
  because it is master specific.

The purpose of this is to prepare the controller to have is I2C MASTER
flow in a separate driver. To do this first all the
functions/definitions related to the MASTER flow were identified.
Signed-off-by: NLuis Oliveira <lolivei@synopsys.com>
Acked-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The purpose of this commit is to fix some comments and styling in the
existing code due to the need of reuse this code. What is being made
here is:

- Sorted the headers files
- Corrected some comments style (capital letters, lowcase i2c)
- Reverse tree in the variables declaration
- Add/remove empty lines and tabs where needed
- Fix of misspelled word "endianness" and "transferred"
- Replaced the return variable "r" with the more standard "ret"

The value of this, besides the rules of coding style, is because I
will use this code after and it will make my future patch a lot bigger and
complicated to review. The work here won't bring any additional work to
backported fixes because is just style and reordering.
Signed-off-by: NLuis Oliveira <lolivei@synopsys.com>
Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The I2C core became quite huge and its monolithic structure makes
maintenance hard. So, prepare to break out some functionality into
separate files by renaming the source file. Note that we keep the
resulting object name constant to avoid regressions.
Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Currently we are already setting a pm_runtime_disabled flag and disabling
runtime-pm for i2c-busses used for accessing the system PMIC on x86.
But this is not enough, there are ACPI opregions which may want to access
the PMIC during late-suspend and early-resume, so we need to completely
disable pm to be safe.

This commit renames the flag from pm_runtime_disabled to pm_disabled and
adds the following new behavior if the flag is set:

1) Call dev_pm_syscore_device(dev, true) which disables normal suspend /
   resume and remove the pm_runtime_disabled check from dw_i2c_plat_resume
   since that will now never get called. This fixes suspend_late handlers
   which use ACPI PMIC opregions causing errors like these:

  PM: Suspending system (freeze)
  PM: suspend of devices complete after 1127.751 msecs
  i2c_designware 808622C1:06: timeout waiting for bus ready
  ACPI Exception: AE_ERROR, Returned by Handler for [UserDefinedRegion]
  acpi 80860F14:02: Failed to change power state to D3hot
  PM: late suspend of devices failed

2) Set IRQF_NO_SUSPEND irq flag. This fixes resume_early handlers which
   handlers which use ACPI PMIC opregions causing errors like these:

  PM: resume from suspend-to-idle
  i2c_designware 808622C1:06: controller timed out
  ACPI Exception: AE_ERROR, Returned by Handler for [UserDefinedRegion]
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Rename accessor_flags to flags, so that we can use the field for
other flags too. This is a preparation patch for adding cherrytrail
support to the punit semaphore code.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Tested-by: NTakashi Iwai <tiwai@suse.de>
Acked-by: NWolfram Sang <wsa@the-dreams.de>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/20170210102802.20898-4-hdegoede@redhat.com

This reverts commit 63d0f0a6.

It caused a regression on platforms where I2C controller is synthesized
with dynamic TAR update disabled. Detection code is testing is bit
DW_IC_CON_10BITADDR_MASTER in register DW_IC_CON read-only but fails to
restore original value in case bit is read-write.

Instead of fixing this we revert the commit since it was preparation for
the commit 0317e6c0 ("i2c: designware: do not disable adapter after
transfer") which was also reverted.
Reported-by: NShah Nehal-Bakulchandra <Nehal-bakulchandra.Shah@amd.com>
Reported-by: NSuravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Acked-By: NLucas De Marchi <lucas.demarchi@intel.com>
Cc: <stable@vger.kernel.org> # v4.9+
Fixes: 63d0f0a6 ("i2c: designware: detect when dynamic tar update is possible")
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Declare i2c_algorithm structures as const as they are only stored in the
algo field of an i2c_adapter structure. This field is of type const, so
i2c_algorithm structures having this property can be made const too.
Signed-off-by: NBhumika Goyal <bhumirks@gmail.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> for
Acked-by: NPatrice Chotard <patrice.chotard@st.com>
Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Reviewed-by: NJean Delvare <jdelvare@suse.de>
Acked-by: NLudovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

This reverts commit 0317e6c0.

Srinivas reported recently touchscreen and touchpad stopped working in
Haswell based machine in Linux 4.9-rc series with timeout errors from
i2c_designware:

[   16.508013] i2c_designware INT33C3:00: controller timed out
[   16.508302] i2c_hid i2c-MSFT0001:02: failed to change power setting.
[   17.532016] i2c_designware INT33C3:00: controller timed out
[   18.556022] i2c_designware INT33C3:00: controller timed out
[   18.556315] i2c_hid i2c-ATML1000:00: failed to retrieve report from device.

I managed to reproduce similar errors on another Haswell based machine
where touchscreen initialization fails maybe in every 1/5 - 1/2 boots.
Since root cause for these errors is not clear yet and debugging is
ongoing it's better to revert this commit as we are near to release.
Reported-by: NSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

When loading the TX fifo to receive bytes on the I2C bus, we incorrectly
count the number of bytes:

	rx_limit = dev->rx_fifo_depth - dw_readl(dev, DW_IC_RXFLR);

	while (buf_len > 0 && tx_limit > 0 && rx_limit > 0) {
		if (rx_limit - dev->rx_outstanding <= 0)
			break;
		rx_limit--;
		dev->rx_outstanding++;
	}

DW_IC_RXFLR indicates how many bytes are available to be read in the
FIFO, dev->rx_fifo_depth is the FIFO size, and dev->rx_outstanding is
the number of bytes that we've requested to be read so far, but which
have not been read.

Firstly, increasing dev->rx_outstanding and decreasing rx_limit and then
comparing them results in each byte consuming "two" bytes in this
tracking, so this is obviously wrong.

Secondly, the number of bytes that _could_ be received into the FIFO at
any time is the number of bytes we have so far requested but not yet
read from the FIFO - in other words dev->rx_outstanding.

So, in order to request enough bytes to fill the RX FIFO, we need to
request dev->rx_fifo_depth - dev->rx_outstanding bytes.

Modifying the code thusly results in us reaching the maximum number of
bytes outstanding each time we queue more "receive" operations, provided
the transfer allows that to happen.
Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Rather than reporting success for a short transfer due to interrupt
latency, report an error both to the caller, as well as to the kernel
log.
Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Free and Open IPMI use SMBUS BLOCK Read/Write to support SSIF protocol.
However, I2C Designware Core Driver doesn't handle the case at the moment.
The below patch supports this feature.
Signed-off-by: NTin Huynh <tnhuynh@apm.com>
Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

I2C DesignWare may abort transfer with arbitration lost if I2C slave pulls
SDA down quickly after falling edge of SCL. Reason for this is unknown but
after trial and error it was found this can be avoided by enabling non-zero
SDA RX hold time for the receiver.

By the specification SDA RX hold time extends incoming SDA low to high
transition by n * ic_clk cycles but only when SCL is high. However it
seems to help avoid above faulty arbitration lost error.

Bits 23:16 in IC_SDA_HOLD register define the SDA RX hold time for the
receiver. Be conservative and enable 1 ic_clk cycle long hold time in
case boot firmware hasn't set it up.
Reported-by: NJukka Laitinen <jukka.laitinen@intel.com>
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Tested-by: NJukka Laitinen <jukka.laitinen@intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

There are several ways to set the SDA hold time for i2c controller,
including: Device Tree, built-in device properties and ACPI. However,
if the SDA hold time is not specified by above method, we should
read the value, where it is preset by firmware, and save it to
sda_hold_time. This is needed because when i2c controller enters
runtime suspend, the DW_IC_SDA_HOLD value will be reset to chipset
default value. And during runtime resume, i2c_dw_init will be called
to reconfigure i2c controller. If sda_hold_time is zero, the chipset
default hold time will be used, that will be too short for some
platforms. Therefore, to have a better tolerance, the DW_IC_SDA_HOLD
value should be kept by sda_hold_time.
Signed-off-by: NZhuo-hao Lee <zhuo-hao.lee@intel.com>
Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Disabling the adapter after each transfer adds additional delays
for each I2C transfer. Even if we don't wait for it to be disabled
anymore, on next transfer we will need to if we have several transfers
in a row.

Now during the transfer init we check if IC_TAR can be changed
dynamically, the status register for no activity and TX buffer being
empty. In this case we don't need to disable it

When a transfer fails the adapter will still be disabled - this is a
conservative approach. When transfers succeed, the adapter is left
enabled and it's configured so to disable interrupts.

Alternating register reads on 2 slaves:
perf stat -r4 chrt -f 10 ./i2c-test /dev/i2c-1 25000 0x40 0x6 0x1e 0x00

Before:
	8.638705161 seconds time elapsed                  ( +-  5.90% )
After:
	7.516821591 seconds time elapsed                  ( +-  0.11% )
Signed-off-by: NLucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: NJosé Roberto de Souza <jose.souza@intel.com>
Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Tested-by: NChristian Ruppert <christian.ruppert@alitech.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

This adapter can be synthesized with dynamic tar update enabled or disabled.
When enabled it is not necessary to disable the adapter to change the slave
address in some situations, which saves some time per transaction.

There is no direct register to know if this feature is enabled but we can do it
indirectly by writing to the 10BIT_ADDR field in IC_CON: this field is
read only when dynamic tar update is enabled.
Signed-off-by: NLucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: NJosé Roberto de Souza <jose.souza@intel.com>
Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Tested-by: NChristian Ruppert <christian.ruppert@alitech.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

These are used in 2 places and will be needed in more.
Signed-off-by: NLucas De Marchi <lucas.demarchi@intel.com>
Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Tested-by: NChristian Ruppert <christian.ruppert@alitech.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

If we aren't going to continue using the controller we can just disable
it instead of waiting for it to complete. The biggest improvement here
is when a I2C transaction is completed and it doesn't block until
the adapter is disabled. When a new transfer is needed we will disable
and wait for its completion.

This way the adapter will continue changing its state in parallel to the
execution of the thread that requested the I2C transaction saving most
of the time 25~250 usec per I2C transaction.

A simple program doing a register read (1 byte write, 1 byte read)
alternating on 2 different slaves repeated 25k times for each and
measurements taken 4 times we get:

perf stat -r4 chrt -f 10 ./i2c-test /dev/i2c-1 25000 0x40 0x6 0x1e 0x00

Before:
	30.879317977 seconds time elapsed                 ( +- 14.83% )
After:
	8.638705161 seconds time elapsed                  ( +-  5.90% )
Signed-off-by: NJosé Roberto de Souza <jose.souza@intel.com>
Signed-off-by: NLucas De Marchi <lucas.demarchi@intel.com>
Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Tested-by: NChristian Ruppert <christian.ruppert@alitech.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

This patch enabled high speed mode. High speed mode can be turn on by
setting the clk_freq to 3400000. High speed HCNT and LCNT are needed
as there is no default value provided.
Signed-off-by: NWeifeng Voon <weifeng.voon@intel.com>
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

This patch enabled fast mode plus. The fast mode plus and fast speed
share the same HCNT and LCNT register. So, the fast mode plus will only
run when the HCNT and LCNT value is provided. Else, it will run at fast
speed as default.
Signed-off-by: NWeifeng Voon <weifeng.voon@intel.com>
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

This allows applications to set the transfer timeout in 10ms increments via
ioctl I2C_TIMEOUT.
Signed-off-by: NWeifeng Voon <weifeng.voon@intel.com>
Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

There can be unnecessary runtime suspend-resume cycle during
i2c-designware-platdrv probe when it registers the I2C adapter device. This
happens because i2c-designware-platdrv is set to initially active platform
device in its probe function and is a parent of I2C adapter.

In that case power.usage_count of i2c-designware device is zero and
pm_runtime_get()/pm_runtime_put() cycle during probe could put it into
runtime suspend. This happens when the i2c_register_adapter() calls the
device_register():

i2c_register_adapter
  device_register
    device_add
      bus_probe_device
        device_initial_probe
          __device_attach
            if (dev->parent) pm_runtime_get_sync(dev->parent)
            ...
            if (dev->parent) pm_runtime_put(dev->parent)

After that the i2c_register_adapter() continues registering I2C slave
devices. In case slave device probe does I2C transfers the parent will
resume again and thus get a needless runtime suspend/resume cycle during
adapter registration.

Prevent this while retaining the runtime PM status of i2c-designware by
only incrementing/decrementing device power usage count during I2C
adapter registration. That makes sure there won't be spurious runtime PM
status changes and lets the driver core to idle the device after probe
finishes.
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>