1. 02 6月, 2020 3 次提交
  2. 17 5月, 2020 1 次提交
  3. 16 5月, 2020 1 次提交
  4. 15 5月, 2020 1 次提交
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      dpaa2-eth: Add XDP frame size · 4a9b052a
      Jesper Dangaard Brouer 提交于
      The dpaa2-eth driver reserve some headroom used for hardware and
      software annotation area in RX/TX buffers. Thus, xdp.data_hard_start
      doesn't start at page boundary.
      
      When XDP is configured the area reserved via dpaa2_fd_get_offset(fd) is
      448 bytes of which XDP have reserved 256 bytes. As frame_sz is
      calculated as an offset from xdp_buff.data_hard_start, an adjust from
      the full PAGE_SIZE == DPAA2_ETH_RX_BUF_RAW_SIZE.
      
      When doing XDP_REDIRECT, the driver doesn't need this reserved headroom
      any-longer and allows xdp_do_redirect() to use it. This is an advantage
      for the drivers own ndo-xdp_xmit, as it uses part of this headroom for
      itself.  Patch also adjust frame_sz in this case.
      
      The driver cannot support XDP data_meta, because it uses the headroom
      just before xdp.data for struct dpaa2_eth_swa (DPAA2_ETH_SWA_SIZE=64),
      when transmitting the packet. When transmitting a xdp_frame in
      dpaa2_eth_xdp_xmit_frame (call via ndo_xdp_xmit) is uses this area to
      store a pointer to xdp_frame and dma_size, which is used in TX
      completion (free_tx_fd) to return frame via xdp_return_frame().
      Signed-off-by: NJesper Dangaard Brouer <brouer@redhat.com>
      Signed-off-by: NAlexei Starovoitov <ast@kernel.org>
      Cc: Ioana Radulescu <ruxandra.radulescu@nxp.com>
      Link: https://lore.kernel.org/bpf/158945339348.97035.8562488847066908856.stgit@firesoul
      4a9b052a
  5. 08 5月, 2020 1 次提交
  6. 01 5月, 2020 1 次提交
  7. 26 4月, 2020 1 次提交
  8. 25 4月, 2020 1 次提交
  9. 23 4月, 2020 4 次提交
  10. 28 2月, 2020 1 次提交
  11. 18 11月, 2019 1 次提交
  12. 13 11月, 2019 1 次提交
  13. 01 11月, 2019 2 次提交
    • I
      dpaa2-eth: add MAC/PHY support through phylink · 71947923
      Ioana Ciornei 提交于
      The dpaa2-eth driver now has support for connecting to its associated
      PHY device found through standard OF bindings.
      
      This happens when the DPNI object (that the driver probes on) gets
      connected to a DPMAC. When that happens, the device tree is looked up by
      the DPMAC ID, and the associated PHY bindings are found.
      
      The old logic of handling the net device's link state by hand still
      needs to be kept, as the DPNI can be connected to other devices on the
      bus than a DPMAC: other DPNI, DPSW ports, etc. This logic is only
      engaged when there is no DPMAC (and therefore no phylink instance)
      attached.
      
      The MC firmware support multiple type of DPMAC links: TYPE_FIXED,
      TYPE_PHY. The TYPE_FIXED mode does not require any DPMAC management from
      Linux side, and as such, the driver will not handle such a DPMAC.
      
      Although PHYLINK typically handles SFP cages and in-band AN modes, for
      the moment the driver only supports the RGMII interfaces found on the
      LX2160A. Support for other modes will come later.
      Signed-off-by: NIoana Ciornei <ioana.ciornei@nxp.com>
      Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      71947923
    • I
      dpaa2-eth: update the TX frame queues on DPNI_IRQ_EVENT_ENDPOINT_CHANGED · f5c3fffa
      Ioana Ciornei 提交于
      Currently the function is called at every link up event, although the
      FQID values will only change when the DPNI is disconnected from the
      current object and reconnected to a different one.
      
      The patch also avoids the forward declaration of update_tx_fqids.
      Signed-off-by: NIoana Ciornei <ioana.ciornei@nxp.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      f5c3fffa
  14. 18 10月, 2019 2 次提交
  15. 07 10月, 2019 2 次提交
  16. 05 9月, 2019 1 次提交
  17. 30 8月, 2019 2 次提交
    • I
      dpaa2-eth: Add pause frame support · 8eb3cef8
      Ioana Radulescu 提交于
      Starting with firmware version MC10.18.0, we have support for
      L2 flow control. Asymmetrical configuration (Rx or Tx only) is
      supported, but not pause frame autonegotioation.
      
      Pause frame configuration is done via ethtool. By default, we start
      with flow control enabled on both Rx and Tx. Changes are propagated
      to hardware through firmware commands, using two flags (PAUSE,
      ASYM_PAUSE) to specify Rx and Tx pause configuration, as follows:
      
      PAUSE | ASYM_PAUSE | Rx pause | Tx pause
      ----------------------------------------
        0   |     0      | disabled | disabled
        0   |     1      | disabled | enabled
        1   |     0      | enabled  | enabled
        1   |     1      | enabled  | disabled
      
      The hardware can automatically send pause frames when the number
      of buffers in the pool goes below a predefined threshold. Due to
      this, flow control is incompatible with Rx frame queue taildrop
      (both mechanisms target the case when processing of ingress
      frames can't keep up with the Rx rate; for large frames, the number
      of buffers in the pool may never get low enough to trigger pause
      frames as long as taildrop is enabled). So we set pause frame
      generation and Rx FQ taildrop as mutually exclusive.
      Signed-off-by: NIoana Radulescu <ruxandra.radulescu@nxp.com>
      Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      8eb3cef8
    • I
      dpaa2-eth: Use stored link settings · cce62943
      Ioana Radulescu 提交于
      Whenever a link state change occurs, we get notified and save
      the new link settings in the device's private data. In ethtool
      get_link_ksettings, use the stored state instead of interrogating
      the firmware each time.
      Signed-off-by: NIoana Radulescu <ruxandra.radulescu@nxp.com>
      Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      cce62943
  18. 13 6月, 2019 3 次提交
  19. 10 6月, 2019 2 次提交
  20. 27 5月, 2019 1 次提交
  21. 24 5月, 2019 1 次提交
    • I
      Revert "dpaa2-eth: configure the cache stashing amount on a queue" · 16fa1cf1
      Ioana Radulescu 提交于
      This reverts commit f8b99585.
      
      The reverted change instructed the QMan hardware block to fetch
      RX frame annotation and beginning of frame data to cache before
      the core would read them.
      
      It turns out that in rare cases, it's possible that a QMan
      stashing transaction is delayed long enough such that, by the time
      it gets executed, the frame in question had already been dequeued
      by the core and software processing began on it. If the core
      manages to unmap the frame buffer _before_ the stashing transaction
      is executed, an SMMU exception will be raised.
      
      Unfortunately there is no easy way to work around this while keeping
      the performance advantages brought by QMan stashing, so disable
      it altogether.
      Signed-off-by: NIoana Radulescu <ruxandra.radulescu@nxp.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      16fa1cf1
  22. 17 4月, 2019 4 次提交
  23. 27 3月, 2019 2 次提交
  24. 21 3月, 2019 1 次提交