1. 08 3月, 2010 17 次提交
  2. 07 3月, 2010 2 次提交
  3. 03 3月, 2010 1 次提交
    • A
      regulator: mc13783: consider Power Gates as digital regulators. · f4b97b36
      Alberto Panizzo 提交于
      GPO regulators are digital outputs that can be enabled or disabled by a
      dedicated bit in mc13783 POWERMISC register.
      In this family can be count in also Power Gates (PWGT1 and 2): enabled by
      a dedicated pin a Power Gate is an hardware driven supply where the output
      (PWGTnDRV) follow this law:
      
       Bit PWGTxSPIEN | Pin PWGTxEN | PWGTxDRV |  Read Back
         0 = default  |             |          | PWGTxSPIEN
       ---------------+-------------+----------+------------
             1        |      x      |   Low    |     0
             0        |      0      |   High   |     1
             0        |      1      |   Low    |     0
      
      As read back value of control bit reflects the PWGTxDRV state (not the
      control value previously written) and mc13783 POWERMISC register contain
      only regulator related bits, a dedicated function to manage these bits is
      created here with the aim of tracing the real value of PWGTxSPIEN bits
      and reproduce it on next writes.
      
      All POWERMISC users _must_ use the new function to not accidentally
      disable Power Gates supplies.
      
      v2 changes:
      -Better utilization of abstraction layers.
      -Voltage query support. GPO's and PWGTxDRV are fixed voltage regulator
       with voltage value of 3.1V and 5.5V respectively.
      Signed-off-by: NAlberto Panizzo <maramaopercheseimorto@gmail.com>
      Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
      Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
      f4b97b36
  4. 18 1月, 2010 2 次提交
  5. 17 12月, 2009 1 次提交
    • M
      regulator: Implement WM831x BuckWise DC-DC convertor DVS support · e24a04c4
      Mark Brown 提交于
      The BuckWise DC-DC convertors in WM831x devices support switching to
      a second output voltage using the logic level on one of the device
      pins. This is intended to allow rapid voltage switching for uses like
      cpufreq, replacing the I2C or SPI write used to configure the voltage
      of the regulator with a much faster GPIO status change.
      
      This is implemented by keeping the DVS voltage configured as the
      maximum voltage permitted for the regulator. If a request is made
      for the maximum voltage then the GPIO is used to switch to the DVS
      voltage, otherwise the normal ON voltage is updated and used. This
      follows the idiom used by most cpufreq drivers, which drop the
      minimum voltage as the core frequency is dropped but use a constant
      maximum - raising the voltage should normally be fast, but lowering
      it may be slower.
      
      Configuration of the DVS MFP on the device should be done externally,
      for example via OTP.
      
      Support is present in the hardware for monitoring the status of the
      transition using a second GPIO. This is not currently implemented
      but platform data is provided for it - the driver currently assumes
      that the device will be configured to transition immediately - but
      platform data is provided to reduce merge issues once it is.
      Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
      Acked-by: NSamuel Ortiz <sameo@linux.intel.com>
      Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
      e24a04c4
  6. 14 12月, 2009 13 次提交
  7. 04 12月, 2009 1 次提交
  8. 01 12月, 2009 2 次提交
  9. 30 11月, 2009 1 次提交