- 28 1月, 2019 1 次提交
-
-
由 Yogesh Narayan Gaur 提交于
- Add driver for NXP FlexSPI host controller (0) What is the FlexSPI controller? FlexSPI is a flexsible SPI host controller which supports two SPI channels and up to 4 external devices. Each channel supports Single/Dual/Quad/Octal mode data transfer (1/2/4/8 bidirectional data lines) i.e. FlexSPI acts as an interface to external devices, maximum 4, each with up to 8 bidirectional data lines. It uses new SPI memory interface of the SPI framework to issue flash memory operations to up to four connected flash devices (2 buses with 2 CS each). (1) Tested this driver with the mtd_debug and JFFS2 filesystem utility on NXP LX2160ARDB and LX2160AQDS targets. LX2160ARDB is having two NOR slave device connected on single bus A i.e. A0 and A1 (CS0 and CS1). LX2160AQDS is having two NOR slave device connected on separate buses one flash on A0 and second on B1 i.e. (CS0 and CS3). Verified this driver on following SPI NOR flashes: Micron, mt35xu512ab, [Read - 1 bit mode] Cypress, s25fl512s, [Read - 1/2/4 bit mode] Signed-off-by: NYogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com> Reviewed-by: NFrieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: NBoris Brezillon <bbrezillon@kernel.org> Tested-by: NAshish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 17 1月, 2019 2 次提交
-
-
由 Alban Bedel 提交于
To allow building this driver in compile test we need to remove all dependency on headers from arch/mips/include. To allow this we explicitly define all the registers locally instead of using ar71xx_regs.h and we move the platform data struct definition to include/linux/platform_data/spi-ath79.h. Signed-off-by: NAlban Bedel <albeu@free.fr> Signed-off-by: NMark Brown <broonie@kernel.org>
-
由 Alban Bedel 提交于
First of all this callback was slightly misused to setup the clock polarity at the beginning of a transfer. Beside being at the wrong place, it is also useless as only SPI mode 1 is supported. Instead just make sure the base value used for IOC is suitable to start a transfer by clearing the clock and data bits during the controller setup. This also remove the last direct usage of the GPIO API, so we can remove the direct dependency on GPIOLIB. Signed-off-by: NAlban Bedel <albeu@free.fr> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 08 1月, 2019 3 次提交
-
-
由 Cezary Gapinski 提交于
Fix typo from STMicroelectonics to STMicroelectronics. Signed-off-by: NCezary Gapinski <cezary.gapinski@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
由 Angelo Dureghello 提交于
Add some cpu families that are actually using the fsl-dspi module in the related Kconfig description. Signed-off-by: NAngelo Dureghello <angelo@sysam.it> Signed-off-by: NMark Brown <broonie@kernel.org>
-
由 Frieder Schrempf 提交于
This driver is derived from the SPI NOR driver at mtd/spi-nor/fsl-quadspi.c. It uses the new SPI memory interface of the SPI framework to issue flash memory operations to up to four connected flash chips (2 buses with 2 CS each). The controller does not support generic SPI messages. This patch also disables the build of the "old" driver and reuses its Kconfig option CONFIG_SPI_FSL_QUADSPI to replace it. Signed-off-by: NFrieder Schrempf <frieder.schrempf@kontron.de> Acked-by: NHan Xu <han.xu@nxp.com> Reviewed-by: NYogesh Gaur <yogeshnarayan.gaur@nxp.com> Tested-by: NYogesh Gaur <yogeshnarayan.gaur@nxp.com> Tested-by: NHan Xu <han.xu@nxp.com> Reviewed-by: NBoris Brezillon <bbrezillon@kernel.org> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 11 12月, 2018 1 次提交
-
-
由 Arnd Bergmann 提交于
I ran into a link-time error with the atmel-quadspi driver on the EBSA110 platform: drivers/mtd/built-in.o: In function `atmel_qspi_run_command': :(.text+0x1ee3c): undefined reference to `_memcpy_toio' :(.text+0x1ee48): undefined reference to `_memcpy_fromio' The problem is that _memcpy_toio/_memcpy_fromio are not available on that platform, and we have to prevent building the driver there. In case we want to backport this to older kernels: between linux-4.8 and linux-4.20, the Kconfig entry was in drivers/mtd/spi-nor/Kconfig but had the same problem. Link: https://lore.kernel.org/patchwork/patch/812860/ Fixes: 161aaab8 ("mtd: atmel-quadspi: add driver for Atmel QSPI controller") Signed-off-by: NArnd Bergmann <arnd@arndb.de> Reviewed-by: NBoris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: NMark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
-
- 14 11月, 2018 1 次提交
-
-
由 Tomer Maimon 提交于
Add Nuvoton NPCM BMC Peripheral SPI controller driver. Signed-off-by: NTomer Maimon <tmaimon77@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 07 11月, 2018 2 次提交
-
-
由 Vignesh R 提交于
Enable McSPI driver to be built for K3 platforms, to support McSPI on AM654 SoC of K3 family. Signed-off-by: NVignesh R <vigneshr@ti.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
由 Piotr Bugalski 提交于
Kernel contains QSPI driver strongly tied to MTD and nor-flash memory. New spi-mem interface allows usage also other memory types, especially much larger NAND with SPI interface. This driver works as SPI controller and is not related to MTD, however can work with NAND-flash or other peripherals using spi-mem interface. Suggested-by: NBoris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: NPiotr Bugalski <bugalski.piotr@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 05 11月, 2018 1 次提交
-
-
由 Mason Yang 提交于
Add a driver for Macronix SPI controller IP. Signed-off-by: NMason Yang <masonccyang@mxic.com.tw> Reviewed-by: NBoris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 21 10月, 2018 1 次提交
-
-
由 Florian Fainelli 提交于
ARM-based 63xx DSL platforms have the spi-bcm63xx-hsspi controller present, allow using this driver there as well. Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 19 10月, 2018 1 次提交
-
-
由 Ludovic Barre 提交于
The qspi controller is a specialized communication interface targeting single, dual or quad SPI Flash memories (NOR/NAND). It can operate in any of the following modes: -indirect mode: all the operations are performed using the quadspi registers -read memory-mapped mode: the external Flash memory is mapped to the microcontroller address space and is seen by the system as if it was an internal memory tested on: -NOR: mx66l51235l -NAND: MT29F2G01ABAGD Signed-off-by: NLudovic Barre <ludovic.barre@st.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 11 10月, 2018 2 次提交
-
-
由 Girish Mahadevan 提交于
This driver supports GENI based SPI Controller in the Qualcomm SOCs. The Qualcomm Generic Interface (GENI) is a programmable module supporting a wide range of serial interfaces including SPI. This driver supports SPI operations using FIFO mode of transfer. Signed-off-by: NGirish Mahadevan <girishm@codeaurora.org> Signed-off-by: NDilip Kota <dkota@codeaurora.org> Signed-off-by: NAlok Chauhan <alokc@codeaurora.org> Reviewed-by: NDouglas Anderson <dianders@chromium.org> Tested-by: NDouglas Anderson <dianders@chromium.org> Reviewed-by: NStephen Boyd <swboyd@chromium.org> Signed-off-by: NMark Brown <broonie@kernel.org>
-
由 Girish Mahadevan 提交于
New driver for Qualcomm QuadSPI(QSPI) controller that is used to communicate with slaves such as flash memory devices. The QSPI controller can operate in 2 or 4 wire mode but only supports SPI Mode 0. The controller can also operate in Single or Dual data rate modes. Signed-off-by: NGirish Mahadevan <girishm@codeaurora.org> Signed-off-by: NRyan Case <ryandcase@chromium.org> Reviewed-by: NDouglas Anderson <dianders@chromium.org> Reviewed-by: NStephen Boyd <swboyd@chromium.org> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 28 9月, 2018 1 次提交
-
-
由 Leilk Liu 提交于
This patch adds basic spi slave for MT2712. Signed-off-by: NLeilk Liu <leilk.liu@mediatek.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 10 9月, 2018 1 次提交
-
-
由 Radu Pirea 提交于
This is the driver for at91-usart in spi mode. The USART IP can be configured to work in many modes and one of them is SPI. The driver was tested on sama5d3-xplained and sama5d4-xplained boards with enc28j60 ethernet controller as slave. Signed-off-by: NRadu Pirea <radu.pirea@microchip.com> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Reviwed-by: NMark Brown <broonie@kernel.org> Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: NLee Jones <lee.jones@linaro.org>
-
- 29 8月, 2018 1 次提交
-
-
由 Lanqing Liu 提交于
This patch adds the SPI controller driver for Spreadtrum SC9860 platform. Signed-off-by: NLanqing Liu <lanqing.liu@spreadtrum.com> Signed-off-by: NBaolin Wang <baolin.wang@linaro.org> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 01 8月, 2018 1 次提交
-
-
由 Keiji Hayashibara 提交于
Add SPI controller driver implemented in Socionext UniPhier SoCs. UniPhier SoCs have two types SPI controllers; SCSSI supports a single channel, and MCSSI supports multiple channels. This driver supports SCSSI only. This controller has 32bit TX/RX FIFO with depth of eight entry, and supports the SPI master mode only. This commit is implemented in PIO transfer mode, not DMA transfer. Signed-off-by: NKunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: NKeiji Hayashibara <hayashibara.keiji@socionext.com> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 31 5月, 2018 1 次提交
-
-
由 Fabio Estevam 提交于
The correct form is "a high-level", so fix it accordingly. Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com> Reviewed-by: NBoris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 11 5月, 2018 1 次提交
-
-
由 Boris Brezillon 提交于
Some controllers are exposing high-level interfaces to access various kind of SPI memories. Unfortunately they do not fit in the current spi_controller model and usually have drivers placed in drivers/mtd/spi-nor which are only supporting SPI NORs and not SPI memories in general. This is an attempt at defining a SPI memory interface which works for all kinds of SPI memories (NORs, NANDs, SRAMs). Signed-off-by: NBoris Brezillon <boris.brezillon@bootlin.com> Reviewed-by: NFrieder Schrempf <frieder.schrempf@exceet.de> Tested-by: NFrieder Schrempf <frieder.schrempf@exceet.de> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 10 5月, 2018 1 次提交
-
-
由 Rafał Miłecki 提交于
I accidentally sent an early version of patch removing spi-bcm53xx driver which got rid of .c and .h files *only*. I amended local commit but forgot to re-format the patch. This commit removes leftovers of dropped driver. Signed-off-by: NRafał Miłecki <rafal@milecki.pl> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 18 4月, 2018 1 次提交
-
-
由 Geert Uytterhoeven 提交于
Remove dependencies on HAS_DMA where a Kconfig symbol depends on another symbol that implies HAS_DMA, and, optionally, on "|| COMPILE_TEST". In most cases this other symbol is an architecture or platform specific symbol, or PCI. Generic symbols and drivers without platform dependencies keep their dependencies on HAS_DMA, to prevent compiling subsystems or drivers that cannot work anyway. This simplifies the dependencies, and allows to improve compile-testing. Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org> Reviewed-by: NMark Brown <broonie@kernel.org> Acked-by: NRobin Murphy <robin.murphy@arm.com> Acked-by: NMark Brown <broonie@kernel.org> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 26 3月, 2018 2 次提交
-
-
由 Arnd Bergmann 提交于
The blackfin architecture is getting removed, so these won't be needed any more. Acked-by: NMark Brown <broonie@kernel.org> Acked-by: NAaron Wu <aaron.wu@analog.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
-
由 Arnd Bergmann 提交于
A lot of Kconfig symbols have architecture specific dependencies. In those cases that depend on architectures we have already removed, they can be omitted. Acked-by: NKalle Valo <kvalo@codeaurora.org> Acked-by: NAlexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
-
- 12 2月, 2018 1 次提交
-
-
由 Ulf Magnusson 提交于
The AVR32 symbol was removed in commit 26202873 ("avr32: remove support for AVR32 architecture"). Signed-off-by: NUlf Magnusson <ulfalizer@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 03 11月, 2017 1 次提交
-
-
由 Angelo Dureghello 提交于
Signed-off-by: NAngelo Dureghello <angelo@sysam.it> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 06 10月, 2017 1 次提交
-
-
由 Arnd Bergmann 提交于
With CONFIG_HWSPINLOCK=m, the new driver fails to link as a built-in driver: drivers/spi/spi-sprd-adi.o: In function `sprd_adi_remove': spi-sprd-adi.c:(.text+0x18): undefined reference to `hwspin_lock_free' drivers/spi/spi-sprd-adi.o: In function `sprd_adi_probe': spi-sprd-adi.c:(.text+0xfc): undefined reference to `of_hwspin_lock_get_id' spi-sprd-adi.c:(.text+0x108): undefined reference to `hwspin_lock_request_specific' spi-sprd-adi.c:(.text+0x268): undefined reference to `hwspin_lock_free' This adds a hard Kconfig dependency on HWSPINLOCK for the !COMPILE_TEST case, and allows compile-testing with HWSPINLOCK completely disabled, which will then rely on the existing stub API. Fixes: 7e2903cb ("spi: Add ADI driver for Spreadtrum platform") Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 20 9月, 2017 1 次提交
-
-
由 Fabio Estevam 提交于
Since commit 6c364062 ("spi: core: Add support for registering SPI slave controllers") SPI slave is also supported, so remove the old comments that say SPI slave is unsupported. Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 19 9月, 2017 1 次提交
-
-
由 Baolin Wang 提交于
This patch adds ADI driver based on SPI framework for Spreadtrum SC9860 platform. Signed-off-by: NBaolin Wang <baolin.wang@spreadtrum.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 16 8月, 2017 1 次提交
-
-
由 Lars-Peter Clausen 提交于
The Altera SPI driver currently uses the spi-bitbang infrastructure for transfer queue management, but non of the bitbang functionality itself. This is because when the driver was written this was the only way to not have to do queue management in the driver itself. Nowadays transfer queue management is available from the SPI driver core itself and using the bitbang infrastructure just adds an additional level of indirection. Switch the driver over to using the core queue management directly. Signed-off-by: NLars-Peter Clausen <lars@metafoo.de> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 07 8月, 2017 1 次提交
-
-
由 Arnd Bergmann 提交于
When the audio driver selects CONFIG_PXA_SSP on ARCH_MMP as a loadable module, and the PXA SPI driver is built-in, we get a link error in the SPI driver: drivers/spi/spi-pxa2xx.o: In function `pxa2xx_spi_remove': spi-pxa2xx.c:(.text+0x5f0): undefined reference to `pxa_ssp_free' drivers/spi/spi-pxa2xx.o: In function `pxa2xx_spi_probe': spi-pxa2xx.c:(.text+0xeac): undefined reference to `pxa_ssp_request' spi-pxa2xx.c:(.text+0x1468): undefined reference to `pxa_ssp_free' spi-pxa2xx.c:(.text+0x15bc): undefined reference to `pxa_ssp_free' The problem is that the PXA SPI driver only uses 'select SSP' specifically when building it for PXA, but we can also build it for PCI, which is meant for Intel x86 SoCs that use the same SPI block. When the sound driver forces the SSP to be a loadable module, the IS_ENABLED() check in include/linux/pxa2xx_ssp.h triggers but the spi driver can't reference the exported symbols. I had a different approach before, making the PCI case depend on X86, which fixed the problem by avoiding the MMP case. This goes a different route, making the driver select PXA_SSP also on MMP, which has an SSP that none of the boards in mainline Linux use for SPI. There is no harm in always enabling the build on MMP (PCI or not PCI), so I do that too, to document that this hardware is actually available on MMP. Link: https://patchwork.kernel.org/patch/8879921/Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 21 6月, 2017 1 次提交
-
-
由 Amelie Delaunay 提交于
The STM32 Serial Peripheral Interface (SPI) can be used to communicate with external devices while using the specific synchronous protocol. It supports a half-duplex, full-duplex and simplex synchronous, serial communication with external devices with 4-bit to 16/32-bit per word. It has two 8x/16x 8-bit embedded Rx and TxFIFOs with DMA capability. It can operate in master or slave mode. Signed-off-by: NAmelie Delaunay <amelie.delaunay@st.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 26 5月, 2017 3 次提交
-
-
由 Geert Uytterhoeven 提交于
Add an example SPI slave handler to allow remote control of system reboot, power off, halt, and suspend. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
由 Geert Uytterhoeven 提交于
Add an example SPI slave handler responding with the uptime at the time of reception of the last SPI message. This can be used by an external microcontroller as a dead man's switch. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
由 Geert Uytterhoeven 提交于
Add support for registering SPI slave controllers using the existing SPI master framework: - SPI slave controllers must use spi_alloc_slave() instead of spi_alloc_master(), and should provide an additional callback "slave_abort" to abort an ongoing SPI transfer request, - SPI slave controllers are added to a new "spi_slave" device class, - SPI slave handlers can be bound to the SPI slave device represented by an SPI slave controller using a DT child node named "slave", - Alternatively, (un)binding an SPI slave handler to the SPI slave device represented by an SPI slave controller can be done by (un)registering the slave device through a sysfs virtual file named "slave". From the point of view of an SPI slave protocol handler, an SPI slave controller looks almost like an ordinary SPI master controller. The only exception is that a transfer request will block on the remote SPI master, and may be cancelled using spi_slave_abort(). Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 25 5月, 2017 1 次提交
-
-
由 Neil Armstrong 提交于
The SPICC hardware block on the Amlogic SoCs is Communication oriented and can do Full-Duplex 8- to 32-bit width SPI transfers up to 30MHz. The current driver only supportd the PIO transfer mode since the DMA seems broken on available hardware. Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 14 5月, 2017 1 次提交
-
-
由 Geert Uytterhoeven 提交于
If NO_DMA=y: ERROR: "bad_dma_ops" [drivers/spi/spi-ti-qspi.ko] undefined! Add a dependency on HAS_DMA to fix this. Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 14 3月, 2017 1 次提交
-
-
由 Jayachandran C 提交于
ARCH_VULCAN arm64 platform (for Broadcom Vulcan ARM64 processors) has been discontinued. Cavium's ThunderX2 CN99XX (ARCH_THUNDER2) will be the next revision of the platform. Update compile dependencies and ACPI ID to reflect this change. There is not need to retain ARCH_VULCAN since the Vulcan processor was never in production and ARCH_VULCAN will be deleted soon. Signed-off-by: NJayachandran C <jnair@caviumnetworks.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 20 2月, 2017 1 次提交
-
-
由 Hauke Mehrtens 提交于
This driver should compile on all platforms, activate it under compile test. The Lantiq specific parts are under ifdef and should be removed when Lantiq platform supports common clock framework. Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de> Signed-off-by: NMark Brown <broonie@kernel.org>
-