- 10 6月, 2016 4 次提交
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由 Robert P. J. Day 提交于
Correct misspelling, "emda3" -> "edma3". Reported-by: NAdam J Allison <adamj.allison@gmail.com> Signed-off-by: NRobert P. J. Day <rpjday@crashcourse.ca> Acked-by: NRob Herring <robh@kernel.org> Acked-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Dave Gerlach 提交于
Drop the operating-points table present in am33xx.dtsi and add an operating-points-v2 table with all OPPs available for all silicon revisions along with necessary data for use by ti-cpufreq to selectively enable the appropriate OPPs at runtime. Also, drop the voltage-tolerance value and provide voltages for each OPP using the <target min max> format instead. Information from AM335x Data Manual, SPRS717i, Revised December 2015, Table 5-7. Signed-off-by: NDave Gerlach <d-gerlach@ti.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Franklin S Cooper Jr 提交于
Previous patches switched the ECAP and EPWM to use the new bindings. These bindings explicitly adds the various required clocks via DT rather than depending on hwmod. Therefore, it is safe to remove the hwmod entries since they are no longer needed. Signed-off-by: NFranklin S Cooper Jr <fcooper@ti.com> Acked-by: NRob Herring <robh@kernel.org> Acked-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Franklin S Cooper Jr 提交于
Switch to a new ECAP and EPWM bindings that doesn't depend on hwmod to provide the various required clocks. For AM437 and AM335x, add the required clocks explicitly to DT. The hwmod entries for ECAP and EPWM will be removed and this will prevent anything from breaking. Signed-off-by: NFranklin S Cooper Jr <fcooper@ti.com> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 14 4月, 2016 1 次提交
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由 Franklin S Cooper Jr 提交于
This patch updates the GPMC's DT DMA property to reflect the updated eDMA bindings. Fixes: b5e50906 ("ARM: DTS: am33xx: Use the new DT bindings for the eDMA3") Signed-off-by: NFranklin S Cooper Jr <fcooper@ti.com> Acked-by: NRoger Quadros <rogerq@ti.com> Acked-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 13 4月, 2016 2 次提交
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由 Roger Quadros 提交于
GPMC driver provides GPI support for the GPMC_WAIT pins. Mark it gpio controller capable. Signed-off-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Franklin S Cooper Jr 提交于
When possible generic node names should be used. So change the node name from ehrpwm to pwm. Signed-off-by: NFranklin S Cooper Jr <fcooper@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 27 2月, 2016 1 次提交
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由 Roger Quadros 提交于
Add compatible id, GPMC register resource and interrupt resource to NAND controller nodes. The GPMC node will provide an interrupt controller for the NAND IRQs. Cc: Teresa Remmet <t.remmet@phytec.de> Cc: Ilya Ledvich <ilya@compulab.co.il> Cc: Yegor Yefremov <yegorslists@googlemail.com> Cc: Rostislav Lisovy <lisovy@gmail.com> Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com> Signed-off-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 22 1月, 2016 1 次提交
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由 Dave Gerlach 提交于
Add ti,mbox-send-noirq to wkup_m3 mailbox so that messages using wkup_m3 mailbox are sent without triggering any further interrupts. This is needed to achieve lower power numbers during CPU idle on AM33xx. Signed-off-by: NDave Gerlach <d-gerlach@ti.com> [s-anna@ti.com: revise commit description] Signed-off-by: NSuman Anna <s-anna@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 18 12月, 2015 1 次提交
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由 Peter Ujfalusi 提交于
Switch to use the ti,edma3-tpcc and ti,edma3-tptc binding for the eDMA3 and enable the DMA even crossbar with ti,am335x-edma-crossbar. With the new bindings boards can customize and tweak the DMA channel priority to match their needs. With the new binding the memcpy is safe to be used since with the old binding it was not possible for a driver to know which channel is allowed to be used as non HW triggered channel. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 01 12月, 2015 1 次提交
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由 Franklin S Cooper Jr 提交于
Add dma channel information to the gpmc. Although not enabled by default this will allow prefetch-dma to be used. Signed-off-by: NFranklin S Cooper Jr <fcooper@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 02 11月, 2015 1 次提交
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由 Vinod Koul 提交于
This reverts commit d871cd2e as it causes regression in BBB Reported-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 27 10月, 2015 1 次提交
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由 Peter Ujfalusi 提交于
Switch to use the ti,edma3-tpcc and ti,edma3-tptc binding for the eDMA3 and enable the DMA even crossbar with ti,am335x-edma-crossbar. With the new bindings boards can customize and tweak the DMA channel priority to match their needs. With the new binding the memcpy is safe to be used since with the old binding it was not possible for a driver to know which channel is allowed to be used as non HW triggered channel. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 14 8月, 2015 1 次提交
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由 Mugunthan V N 提交于
CPSW driver has been updated with compatibles for enabling errata workarounds. So updating cpsw compatibles. Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 05 8月, 2015 1 次提交
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由 Suman Anna 提交于
Add the Wakeup M3 IPC node for the wkup_m3_ipc driver on AM33xx SoCs. This node uses the IPC registers, part of the Control Module, and is therefore added as a child of the scm node. Signed-off-by: NSuman Anna <s-anna@ti.com> Signed-off-by: NDave Gerlach <d-gerlach@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 24 7月, 2015 1 次提交
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由 Sekhar Nori 提交于
Use of of_machine_is_compatible() for handling AM335x specific "DMA kick" quirk in 8250_omap driver makes it ugly to extend the quirk for other platforms. Instead use a new compatible. The new compatible will also make it easier to take care of other quirks on AM335x and like SoCs. In order to not break backward DTB compatibility for users of 8250_omap driver on AM335x based boards, existing use of of_machine_is_compatible() has not been removed. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Reviewed-by: NPeter Hurley <peter@hurleysoftware.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 14 7月, 2015 1 次提交
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由 Suman Anna 提交于
The WakeupM3 remote processor device node has been moved to be a child node of the newly created l4_wkup node, to reflect its presence properly within the SoC. The node was added previously before any driver support, it is now updated as per the wkup_m3_rproc bindings added alongside the driver support. Signed-off-by: NSuman Anna <s-anna@ti.com> Signed-off-by: NDave Gerlach <d-gerlach@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 01 4月, 2015 1 次提交
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由 Tero Kristo 提交于
This patch creates an l4_wkup interconnect for AM33xx, and moves some of the generic peripherals under it. System control module nodes are moved under this new interconnect also, and the SCM clock layout is changed to use the renamed SCM node as the clock provider. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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- 11 12月, 2014 1 次提交
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由 Johan Hovold 提交于
Enable am33xx specific RTC features (e.g. PMIC control) by adding "ti,am3352-rtc" to the compatible property of the rtc node. Signed-off-by: NJohan Hovold <johan@kernel.org> Reviewed-by: NFelipe Balbi <balbi@ti.com> Tested-by: NFelipe Balbi <balbi@ti.com> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Tony Lindgren <tony@atomide.com> Cc: Benot Cousson <bcousson@baylibre.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Guenter Roeck <linux@roeck-us.net> Cc: Sekhar Nori <nsekhar@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: Keerthy J <j-keerthy@ti.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 24 11月, 2014 2 次提交
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由 Roger Quadros 提交于
Add "raminit-syscon" property to specify the RAMINIT register. Add clock information. Rename can nodes from "d_can" to "can" to be compliant with the ePAPR specs. Signed-off-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Roger Quadros 提交于
Use syscon regmap to expose the Control module register space. This register space is shared between many users e.g. DCAN, USB, display, etc. Signed-off-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 11 11月, 2014 2 次提交
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Cc: devicetree@vger.kernel.org Reviewed-by: NTony Lindgren <tony@atomide.com> Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Suman Anna 提交于
The '#mbox-cells' property is added to all the OMAP mailbox nodes. This property is mandatory with the new mailbox framework. Cc: "Benoît Cousson" <bcousson@baylibre.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Signed-off-by: NSuman Anna <s-anna@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 30 9月, 2014 2 次提交
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由 Markus Pargmann 提交于
There are 2 MACIDs stored in the control module of the am33xx. These are read by the cpsw driver if no valid MACID was found in the devicetree. Signed-off-by: NMarkus Pargmann <mpa@pengutronix.de> Reviewed-by: NWolfram Sang <wsa@the-dreams.de> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Markus Pargmann 提交于
Signed-off-by: NMarkus Pargmann <mpa@pengutronix.de> Reviewed-by: NWolfram Sang <wsa@the-dreams.de> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 19 9月, 2014 1 次提交
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由 Rajendra Nayak 提交于
Use drivers/misc/sram.c driver to manage SRAM on all DT only OMAP platforms (am33xx, am43xx, omap4 and omap5) instead of the existing private plat-omap/sram.c Address and size related data is removed from mach-omap2/sram.c and now passed to drivers/misc/sram.c from DT. Users can hence use general purpose allocator apis instead of OMAP private ones to manage and use SRAM. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NDave Gerlach <d-gerlach@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 12 9月, 2014 3 次提交
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由 Felipe Balbi 提交于
we are now infering number of IRQ lines based on correct compatible flag, which renders this binding completely useless. Signed-off-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Felipe Balbi 提交于
that way, our intc driver can figure out how many IRQ lines INTC has. Signed-off-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Suman Anna 提交于
The sub-mailbox devices are added to the Mailbox DT nodes on OMAP2420, OMAP2430, OMAP3, AM33xx, AM43xx, OMAP4 and OMAP5 family of SoCs. This data represents the same mailboxes that used to be represented in hwmod attribute data previously. The node name is chosen based on the .name field of omap_mbox_dev_info structure used in the hwmod data. Cc: "Benoît Cousson" <bcousson@baylibre.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Signed-off-by: NSuman Anna <s-anna@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 15 7月, 2014 1 次提交
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由 Suman Anna 提交于
The mailbox DT node data has been added for AM33xx device. The mailbox IP in AM33xx is similar to the version found in OMAP4+ devices. Signed-off-by: NSuman Anna <s-anna@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 22 5月, 2014 1 次提交
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由 Peter Ujfalusi 提交于
dma-channels, ti,edma-regions and ti,edma-slots no longer needed in DT since the the same information is available in the IP's CCCFG register. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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- 15 5月, 2014 1 次提交
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由 Johan Hovold 提交于
Make sure ethernet and mdio nodes are disabled by default and enable them explicitly only on boards that actually use them. Signed-off-by: NJohan Hovold <jhovold@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 06 5月, 2014 1 次提交
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由 George Cherian 提交于
Add CPSW fck and CPTS clock and clock names Signed-off-by: NGeorge Cherian <george.cherian@ti.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 29 4月, 2014 1 次提交
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由 Thomas Gleixner 提交于
This is another great example of trainwreck engineering: commit 2646a0e529 (ARM: edma: Add EDMA crossbar event mux support) added support for using EDMA on peripherals which have no direct EDMA event mapping. The code compiles and does not explode in your face, but that's it. 1) Reading an u16 array from an u32 device tree array simply does not work. Even if the function is named "edma_of_read_u32_to_s16_array". It merily calls of_property_read_u16_array. So the resulting 16bit array will have every other entry = 0. 2) The DT entry for the xbar registers related to xbar has length 0x10 instead of the real length: 0xfd0 - 0xf90 = 0x40. Not a real problem as it does not cross a page boundary, but wrong nevertheless. 3) But none of this matters as the mapping never happens: After reading nonsense edma_of_read_u32_to_s16_array() invalidates the first array entry pair, so nobody can ever notice the braindamage by immediate explosion. Seems the QA criteria for this code was solely not to explode when someone adds edma-xbar-event-map entries to the DT. Goal achieved, congratulations! Not really helpful if someone wants to use edma on a device which requires a xbar mapping. Fix the issues by: - annotating the device tree entry with "/bits/ 16" as documented in the of_property_read_u16_array kernel doc - make the size of the xbar register mapping correct - invalidating the end of the array and not the start This convoluted mess wants to be completely rewritten as there is no point to keep the xbar_chan array memory and the iomapping of the xbar regs around forever. Marking the xbar mapped channels as used should be done right there. But that's a different issue and this patch is small enough to make it work and allows a simple backport for stable. Cc: stable@vger.kernel.org # v3.12+ Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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- 23 4月, 2014 1 次提交
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由 Geert Uytterhoeven 提交于
s/interrupts-names/interrupt-names/g s/clocks-names/clock-names/g Some of the binding files and device tree files get this wrong and the kernel won't be able to pick it up. Fix them up now so that they don't get widely used. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by : Patrice Chotard <patrice.chotard@st.com> Signed-off-by: NGrant Likely <grant.likely@linaro.org>
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- 19 4月, 2014 2 次提交
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由 Geert Uytterhoeven 提交于
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Cc: linux-omap@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Geert Uytterhoeven 提交于
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Cc: linux-omap@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 14 3月, 2014 1 次提交
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由 Mugunthan V N 提交于
DT node's unit address should be its own register offset address to make it a unique across the system. This patch corrects the incorrect USB entries with correct register offset for unit address. Cc: stable@vger.kernel.org # v3.12+ Acked-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de> Acked-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 01 3月, 2014 2 次提交
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由 Stefan Roese 提交于
Making it possible to reference and therefor change (disable) this device node from other dts file which import this dtsi file. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Lukas Stockmann <lukas.stockmann@siemens.com> Cc: Benoit Cousson <bcousson@baylibre.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Matt Porter 提交于
Add missing interrupt properties to the ecap0, ecap1, and ecap2 nodes. Signed-off-by: NMatt Porter <mporter@linaro.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
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