- 18 10月, 2012 2 次提交
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由 Pritesh Raithatha 提交于
Cc: stable@kernel.org Signed-off-by: NPritesh Raithatha <praithatha@nvidia.com> Acked-by: NStephen Warren <swarren@nvidia.com> Tested-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Pritesh Raithatha 提交于
Cc: stable@kernel.org Signed-off-by: NPritesh Raithatha <praithatha@nvidia.com> Acked-by: NStephen Warren <swarren@nvidia.com> Tested-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 15 10月, 2012 8 次提交
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由 Linus Walleij 提交于
Since the simple irqdomain will fall back to a linear domain if the first_irq provided is <= 0, just use this, just make sure the first_irq is negative in the device tree case. Cc: Rob Herring <rob.herring@calxeda.com> Acked-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
The compilation of the pinctrl driver failed on the legacy Nomadik NHK8815 platform because it was not providing the PRCMU interfaces needed to support the extended alternate functions used by the ux500 series. Solve this by providing some stubs for the legacy platform, to avoid too much #ifdefs in the code per se. Theoretically this actually allows the Nomadik and Ux500 to have a single kernel image with support for the PRCM registers on the Ux500 (though they have incompatible archs, but the spirit is there). Reported-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Wei Yongjun 提交于
Remove duplicated include. dpatch engine is used to auto generate this patch. (https://github.com/weiyj/dpatch) Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Arnd Bergmann 提交于
The prima2 platform advertises needing no mach/gpio.h header file, but its pinctrl driver now has a sirfsoc_gpio_set_pull function that uses constants defined in arch/arm/mach-prima2/include/mach/gpio.h, which fails to build. Fortunately, the sirfsoc_gpio_set_pull is not used anywhere in the kernel, so we can safely remove it. Any out of tree drivers using it will have to be converted to use proper pinctrl functions to do the same. Without this patch, building prima2_defconfig results in: drivers/pinctrl/pinctrl-sirf.c: In function 'sirfsoc_gpio_set_pull': drivers/pinctrl/pinctrl-sirf.c:1331:7: error: 'SIRFSOC_GPIO_PULL_NONE' undeclared (first use in this function) drivers/pinctrl/pinctrl-sirf.c:1331:7: note: each undeclared identifier is reported only once for each function it appears in drivers/pinctrl/pinctrl-sirf.c:1334:7: error: 'SIRFSOC_GPIO_PULL_UP' undeclared (first use in this function) drivers/pinctrl/pinctrl-sirf.c:1338:7: error: 'SIRFSOC_GPIO_PULL_DOWN' undeclared (first use in this function) Signed-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Wei Yongjun 提交于
In case of error, the function pinctrl_register() returns NULL not ERR_PTR(). The PTR_ERR() in the return value should be replaced with error no. dpatch engine is used to auto generate this patch. (https://github.com/weiyj/dpatch) Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Wei Yongjun 提交于
Remove duplicated include. dpatch engine is used to auto generate this patch. (https://github.com/weiyj/dpatch) Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Tobias Klauser 提交于
The pointer to "pdev->dev" is already stored in "dev", so use it in devm_request_and_ioremap(). Signed-off-by: NTobias Klauser <tklauser@distanz.ch> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Arnd Bergmann 提交于
The samsung pinctrl driver has a probe function that is __devinit and that calls a lot of other functions that are marked __init, which kbuild complains about. Marking everything __devinit means that the code does not discarded when CONFIG_HOTPLUG is set, which is a little more wasteful, but also more consistent Without this patch, building exynos_defconfig results in: WARNING: drivers/pinctrl/built-in.o(.devinit.text+0x124): Section mismatch in reference from the function samsung_pinctrl_probe() to the function .init.text:samsung_gpiolib_register() The function __devinit samsung_pinctrl_probe() references a function __init samsung_gpiolib_register(). If samsung_gpiolib_register is only used by samsung_pinctrl_probe then annotate samsung_gpiolib_register with a matching annotation. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Cc: Thomas Abraham <thomas.abraham@linaro.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Stephen Warren <swarren@nvidia.com> Cc: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 10 10月, 2012 2 次提交
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由 Linus Walleij 提交于
This alters the Nomadik pinctrl driver to: - Call irqdomain_add_linear() for the DT case so we get all independent from IRQ numbers in this case. - Call irqdomain_add_simple() for the legacy case, which allocates the IRQ descriptors for the Nomadik pin controller dynamically. Cc: Lee Jones <lee.jones@linaro.org> Cc: Rob Herring <rob.herring@calxeda.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Jean-Nicolas Graux 提交于
Upgrade nomadik pinctrl driver to enable selection of other alternate-C[1-4] functions on some specific ux500 SoC pins. Handling of those functions is done thanks to PRCM GPIOCR registers. This was previously managed in PRCMU driver and it was not really convenient. Idea is to provide a common way to control all alternate functions. Note that this improvement does not support the old-fashioned way used to control nomadik pins, namely the "nmk_config_pin()" function and its derivatives. Signed-off-by: NJean-Nicolas Graux <jean-nicolas.graux@stericsson.com> Reviewed-by: NPhilippe Langlais <philippe.langlais@stericsson.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 01 10月, 2012 1 次提交
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由 Simon Arlott 提交于
The BCM2835 GPIO module is a combined GPIO controller, (GPIO) interrupt controller, and pinmux/control device. Original driver by Simon Arlott. Rewrite including GPIO chip device by Chris Boot. Upstreaming changes by Stephen Warren: * Wrote DT binding documentation. * Changed brcm,function to an integer to more directly match the datasheet, and to match brcm,pins being an integer. * Implemented pull-up/down pin config. * Removed read-only DT property and related code. The restriction this implemented are driven by the board, not the GPIO HW block, so don't really make sense of a HW block binding, were in general incomplete (since they could only know about the few pins hard-coded into the Raspberry Pi B board design and not the uncommitted GPIOS), and are better represented simply by not writing incorrect data into pin configuration nodes. * Don't set GPIO_IN function select in gpio_request_enable() to avoid glitches; defer this to gpio_set_direction(). Consequently, removed empty bcm2835_pmx_gpio_request_enable(). * Simplified enabled_irq_map[]; make it explicitly 1 entry per bank. * Lifted use of enabled_irq_map[] outside the per-interrupt loop in IRQ handler, thus fixing an issue where the code was indexing into enabled_irq_map[] by intra-bank GPIO ID, not global GPIO ID. * Removed locking in IRQ handler, since all other code uses spin_lock_irqsave() and so guarantees it doesn't run concurrently with the handler. * Moved duplicated BUILD_BUG_ON()s into probe(). Also check size of bcm2835_gpio_pins[]. * Remove range-checking from bcm2835_pctl_get_groups_count() since we've decided to trust the pinctrl core. * Made bcm2835_pmx_gpio_disable_free() call bcm2835_pinctrl_fsel_set() directly for simplicity. * Fixed body of dt_free_map() to match latest dt_node_to_map(). * Removed GPIO ownership check from bcm2835_pmx_enable() since the pinctrl core owns doing this. * Made irq_chip and pinctrl_gpio_range .name == MODULE_NAME so it's more descriptive. * Simplified remove(); removed call to non-existent pinctrl_remove_gpio_range(), remove early return on error. * Don't force gpiochip's base to 0. Set gpio_range.base to gpiochip's base GPIO number. * Error-handling cleanups in probe(). * Switched to module_platform_driver() rather than open-coding. * Made pin, group, and function names lower-case. * s/broadcom/brcm/ in DT property names. * s/2708/2835/. * Fixed a couple minor checkpatch warnings, and other minor cleanup. Signed-off-by: NSimon Arlott <simon@fire.lp0.eu> Signed-off-by: NChris Boot <bootc@bootc.net> Signed-off-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 28 9月, 2012 7 次提交
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由 Linus Walleij 提交于
The code was using a homegrown method of looking up the offset from the irq domain, not to be encouraged. Use the proper irq_find_mapping() call instead. Cc: Lee Jones <lee.jones@linaro.org> Cc: Rob Herring <rob.herring@calxeda.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Barry Song 提交于
This patch fixes the chained irq hang issue, tested by DM9000 driver using GPIO0-3(irqnr=131) as the external IRQ on SiRFmarco: $ cat /proc/interrupts CPU0 CPU1 32: 1608 0 GIC sirfsoc_timer0 33: 0 3197 GIC sirfsoc_timer1 50: 10207 0 GIC sirfsoc-uart 56: 2 0 GIC cc0e0000.i2c 70: 44 0 GIC mmc0 131: 333 0 sirf-gpio-irq eth0 ... Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Barry Song 提交于
This patch initializes the optional irq_chip pointer gc in sirfsoc pinctrl_gpio_range. Signed-off-by: NBaohua Song <Baohua.Song@csr.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Barry Song 提交于
sirfsoc_gpio_set_input() is called in those functions which have held the spinlock, so delete the duplicated locking. Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Barry Song 提交于
We always use pinctrl_request_gpio() to get GPIO, If we don't have these missing pins in the pin list, gpio_request and related operations will fail for them. Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Barry Song 提交于
Return 0 while probing success. Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Matt Porter 提交于
Adds support for displaying the individual pin h/w config state. Signed-off-by: NMatt Porter <mporter@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 27 9月, 2012 1 次提交
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由 Sachin Kamat 提交于
'pindesc' was not freed when returning from an error induced exit path. Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 22 9月, 2012 5 次提交
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由 Thomas Petazzoni 提交于
This pinctrl driver is not a full-blown pinctrl driver from scratch: it relies on the common pinctrl-mvebu driver, which is used for all Marvell EBU SoCs. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Thomas Petazzoni 提交于
This pinctrl driver is not a full-blown pinctrl driver from scratch: it relies on the common pinctrl-mvebu driver, which is used for all Marvell EBU SoCs. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Sebastian Hesselbarth 提交于
This patch adds a SoC specific pinctrl driver for Marvell Kirkwood SoCs plus DT binding documentation. This driver will use the mvebu pinctrl driver core. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: NStephen Warren <swarren@wwwdotorg.org> Tested-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Sebastian Hesselbarth 提交于
This patch adds a SoC specific pinctrl driver for Marvell Dove SoCs plus DT binding documentation. This driver will use the mvebu pinctrl driver core. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Sebastian Hesselbarth 提交于
This patch adds a pinctrl driver core for Marvell SoCs plus DT binding documentation. This core driver will be used by SoC family specific drivers, i.e. Armada XP, Armada 370, Dove, Kirkwood, aso. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NJason Cooper <jason@lakedaemon.net> Conflicts: arch/arm/Kconfig
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- 21 9月, 2012 7 次提交
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由 Tomasz Figa 提交于
Because of a typo, incorrect field of a structure was being checked. This patch fixes the check to use correct field. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Tomasz Figa 提交于
Although the function is used only a single time, it is not performance critical and it is pretty heavy, so let the compiler decide whether to inline it instead. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Tomasz Figa 提交于
Current way of finding the wakeup-eint node scans the whole device tree not only children of the pinctrl node, so it might detect a wakeup-eint node of another pinctrl device. This patch limits the scope of looking for nodes only to subnodes of the pinctrl node. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Tomasz Figa 提交于
The exynos_irq_demux_eint utility function is used in chained IRQ handler for EINT16-31 to handle multiplexed interrupts. Inlining it should improve the performance a bit. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Tomasz Figa 提交于
A bit in EINTxx_PEND register is set regardless of interrupt mask, which causes spurious interrupts. To avoid them, the read value of pending register must be masked with current interrupt mask manually. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Tomasz Figa 提交于
To mask GPIO/wakeup IRQ, the corresponding bit in mask register has to be set. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Tomasz Figa 提交于
Pins used as GPIO interrupts need to be configured as EINTs. This patch adds the required configuration code to exynos_gpio_irq_set_type, to set the pin as EINT when its interrupt trigger is configured. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 18 9月, 2012 1 次提交
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由 Richard Zhao 提交于
fix smatch warning: drivers/pinctrl/pinctrl-imx.c:435:21: warning: duplicate const Signed-off-by: NRichard Zhao <richard.zhao@freescale.com> Acked-by: NDong Aisheng <dong.aisheng@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 15 9月, 2012 1 次提交
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由 Stephen Warren 提交于
Now that Tegra's pinmux is configured solely from device tree, there's no need for the pinconf types to be defined in arch/arm/mach-tegra/. Move it into the pinctrl directory to clean up mach-tegra, as a pre- requisite for single-zImage. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org>
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- 14 9月, 2012 1 次提交
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由 Thomas Petazzoni 提交于
Instead of using a temporary buffer, snprintf() and kstrdup(), just use kasprintf() that does the same thing in just oneline. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Acked-by: NColin Cross <ccross@google.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 13 9月, 2012 3 次提交
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由 John Crispin 提交于
Implement support for pinctrl on lantiq/falcon socs. The FALCON has 5 banks of up to 32 pins. Signed-off-by: NJohn Crispin <blogic@openwrt.org> Signed-off-by: NThomas Langer <thomas.langer@lantiq.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Cc: devicetree-discuss@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org
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由 John Crispin 提交于
Implement support for pinctrl on lantiq/xway socs. The IO core found on these socs has the registers for pinctrl, pinconf and gpio mixed up in the same register range. As the gpio_chip handling is only a few lines, the driver also implements the gpio functionality. This obseletes the old gpio driver that was located in the arch/ folder. Signed-off-by: NJohn Crispin <blogic@openwrt.org> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Cc: devicetree-discuss@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org
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由 Peter Ujfalusi 提交于
With pinctrl-single,bits it is possible to update just part of the register within the pinctrl-single,function-mask area. This is useful when one register configures mmore than one pin's mux. pinctrl-single,bits takes three parameters: <reg offset, value, sub-mask> Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> [Removed a misplaced comment] Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 10 9月, 2012 1 次提交
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由 Patrice Chotard 提交于
Another possible pin configuration for the MC1 pin group. Signed-off-by: NPatrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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