1. 09 2月, 2021 1 次提交
  2. 28 1月, 2021 2 次提交
  3. 23 1月, 2021 1 次提交
  4. 12 12月, 2020 3 次提交
  5. 08 12月, 2020 1 次提交
  6. 24 11月, 2020 1 次提交
  7. 18 9月, 2020 1 次提交
  8. 11 9月, 2020 1 次提交
  9. 10 9月, 2020 1 次提交
  10. 16 7月, 2020 1 次提交
  11. 08 7月, 2020 1 次提交
  12. 07 7月, 2020 1 次提交
  13. 18 6月, 2020 1 次提交
    • Y
      RDMA/hns: Fix a calltrace when registering MR from userspace · 98a61519
      Yangyang Li 提交于
      ibmr.device is assigned after MR is successfully registered, but both
      write_mtpt() and frmr_write_mtpt() accesses it during the mr registration
      process, which may cause the following error when trying to register MR in
      userspace and pbl_hop_num is set to 0.
      
        pc : hns_roce_mtr_find+0xa0/0x200 [hns_roce]
        lr : set_mtpt_pbl+0x54/0x118 [hns_roce_hw_v2]
        sp : ffff00023e73ba20
        x29: ffff00023e73ba20 x28: ffff00023e73bad8
        x27: 0000000000000000 x26: 0000000000000000
        x25: 0000000000000002 x24: 0000000000000000
        x23: ffff00023e73bad0 x22: 0000000000000000
        x21: ffff0000094d9000 x20: 0000000000000000
        x19: ffff8020a6bdb2c0 x18: 0000000000000000
        x17: 0000000000000000 x16: 0000000000000000
        x15: 0000000000000000 x14: 0000000000000000
        x13: 0140000000000000 x12: 0040000000000041
        x11: ffff000240000000 x10: 0000000000001000
        x9 : 0000000000000000 x8 : ffff802fb7558480
        x7 : ffff802fb7558480 x6 : 000000000003483d
        x5 : ffff00023e73bad0 x4 : 0000000000000002
        x3 : ffff00023e73bad8 x2 : 0000000000000000
        x1 : 0000000000000000 x0 : ffff0000094d9708
        Call trace:
         hns_roce_mtr_find+0xa0/0x200 [hns_roce]
         set_mtpt_pbl+0x54/0x118 [hns_roce_hw_v2]
         hns_roce_v2_write_mtpt+0x14c/0x168 [hns_roce_hw_v2]
         hns_roce_mr_enable+0x6c/0x148 [hns_roce]
         hns_roce_reg_user_mr+0xd8/0x130 [hns_roce]
         ib_uverbs_reg_mr+0x14c/0x2e0 [ib_uverbs]
         ib_uverbs_write+0x27c/0x3e8 [ib_uverbs]
         __vfs_write+0x60/0x190
         vfs_write+0xac/0x1c0
         ksys_write+0x6c/0xd8
         __arm64_sys_write+0x24/0x30
         el0_svc_common+0x78/0x130
         el0_svc_handler+0x38/0x78
         el0_svc+0x8/0xc
      
      Solve above issue by adding a pointer of structure hns_roce_dev as a
      parameter of write_mtpt() and frmr_write_mtpt(), so that both of these
      functions can access it before finishing MR's registration.
      
      Fixes: 9b2cf76c ("RDMA/hns: Optimize PBL buffer allocation process")
      Link: https://lore.kernel.org/r/1592314629-51715-1-git-send-email-liweihang@huawei.comSigned-off-by: NYangyang Li <liyangyang20@huawei.com>
      Signed-off-by: NWeihang Li <liweihang@huawei.com>
      Signed-off-by: NJason Gunthorpe <jgg@mellanox.com>
      98a61519
  14. 26 5月, 2020 2 次提交
  15. 20 5月, 2020 2 次提交
  16. 07 5月, 2020 2 次提交
  17. 23 4月, 2020 2 次提交
  18. 27 3月, 2020 1 次提交
  19. 16 1月, 2020 1 次提交
  20. 08 1月, 2020 1 次提交
  21. 17 11月, 2019 1 次提交
  22. 09 11月, 2019 2 次提交
  23. 28 8月, 2019 1 次提交
  24. 12 8月, 2019 1 次提交
  25. 25 7月, 2019 2 次提交
  26. 26 6月, 2019 1 次提交
  27. 21 6月, 2019 2 次提交
  28. 28 5月, 2019 1 次提交
  29. 09 4月, 2019 1 次提交
    • L
      RDMA/hns: Fix bug that caused srq creation to fail · 4772e03d
      Lijun Ou 提交于
      Due to the incorrect use of the seg and obj information, the position of
      the mtt is calculated incorrectly, and the free space of the page is not
      enough to store the entire mtt, resulting in access to the next page. This
      patch fixes this problem.
      
       Unable to handle kernel paging request at virtual address ffff00006e3cd000
       ...
       Call trace:
        hns_roce_write_mtt+0x154/0x2f0 [hns_roce]
        hns_roce_buf_write_mtt+0xa8/0xd8 [hns_roce]
        hns_roce_create_srq+0x74c/0x808 [hns_roce]
        ib_create_srq+0x28/0xc8
      
      Fixes: 0203b14c ("RDMA/hns: Unify the calculation for hem index in hip08")
      Signed-off-by: Nchenglang <chenglang@huawei.com>
      Signed-off-by: NLijun Ou <oulijun@huawei.com>
      Signed-off-by: NJason Gunthorpe <jgg@mellanox.com>
      4772e03d
  30. 02 4月, 2019 1 次提交