1. 04 10月, 2017 1 次提交
    • R
      drm/i915/skl: Fix has_ipc on skl and document WaDisableIPC. · 4d6ef0da
      Rodrigo Vivi 提交于
      According to Spec for SKL+: "Isochronous Priority Control.
      If enabled, Display sends demoted requests once the transition
      watermark is reached. If transition watermark is not enabled,
      Display sends demoted requests when the display buffer is full."
      
      The commit 'e57f1c02 ("drm/i915/gen9+: Add has_ipc flag in
      device info structure")' introduced that as gen9+ but missing many
      SKL Skus.
      
      I believe the reason for that is Spec also mentions workarounds for
      SKL-ALL: "IPC (Isoch Priority Control) may cause underflows
      WA: Do not enable IPC in register ARB_CTL2"
      
      It seems lame to add the feature and forever disable it,
      but it will avoid a mistake of enabling it when we are reorganizing
      the feature definitions on i915_pci.c later.
      
      It will also allow us to probably extend that workaround for
      other platforms.
      
      Cc: Mahesh Kumar <mahesh1.kumar@intel.com>
      Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: NRodrigo Vivi <rodrigo.vivi@intel.com>
      Reviewed-by: NMahesh Kumar <mahesh1.kumar@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20171003063652.17248-1-rodrigo.vivi@intel.com
      4d6ef0da
  2. 22 9月, 2017 1 次提交
  3. 19 9月, 2017 1 次提交
  4. 14 9月, 2017 1 次提交
  5. 07 9月, 2017 6 次提交
  6. 06 9月, 2017 1 次提交
  7. 01 9月, 2017 1 次提交
  8. 31 8月, 2017 1 次提交
  9. 23 8月, 2017 1 次提交
    • C
      drm/i915: Boost GPU clocks if we miss the pageflip's vblank · 74d290f8
      Chris Wilson 提交于
      If we miss the current vblank because the gpu was busy, that may cause a
      jitter as the frame rate temporarily drops. We try to limit the impact
      of this by then boosting the GPU clock to deliver the frame as quickly
      as possible. Originally done in commit 6ad790c0 ("drm/i915: Boost GPU
      frequency if we detect outstanding pageflips") but was never forward
      ported to atomic and finally dropped in commit fd3a4024 ("drm/i915:
      Rip out legacy page_flip completion/irq handling").
      
      One of the most typical use-cases for this is a mostly idle desktop.
      Rendering one frame of the desktop's frontbuffer can easily be
      accomplished by the GPU running at low frequency, but often exceeds
      the time budget of the desktop compositor. The result is that animations
      such as opening the menu, doing a fullscreen switch, or even just trying
      to move a window around are slow and jerky. We need to respond within a
      frame to give the best impression of a smooth UX, as a compromise we
      instead respond if that first frame misses its goal. The result should
      be a near-imperceivable initial delay and a smooth animation even
      starting from idle. The cost, as ever, is that we spend more power than
      is strictly necessary as we overestimate the required GPU frequency and
      then try to ramp down.
      
      This of course is reactionary, too little, too late; nevertheless it is
      surprisingly effective.
      
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102199Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
      Cc: Daniel Vetter <daniel.vetter@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20170817123706.6777-1-chris@chris-wilson.co.ukTested-by: NLyude Paul <lyude@redhat.com>
      Reviewed-by: NRadoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
      74d290f8
  10. 19 8月, 2017 2 次提交
  11. 16 8月, 2017 1 次提交
  12. 11 8月, 2017 5 次提交
  13. 04 8月, 2017 1 次提交
  14. 28 7月, 2017 2 次提交
  15. 19 7月, 2017 1 次提交
  16. 13 7月, 2017 4 次提交
  17. 08 7月, 2017 1 次提交
  18. 28 6月, 2017 1 次提交
    • C
      drm/i915: Avoid keeping waitboost active for signaling threads · 7b92c1bd
      Chris Wilson 提交于
      Once a client has requested a waitboost, we keep that waitboost active
      until all clients are no longer waiting. This is because we don't
      distinguish which waiter deserves the boost. However, with the advent of
      fence signaling, the signaler threads appear as waiters to the RPS
      interrupt handler. So instead of using a single boolean to track when to
      keep the waitboost active, use a counter of all outstanding waitboosted
      requests.
      
      At this point, I have removed all vestiges of the rate limiting on
      clients. Whilst this means that compositors should remain more fluid,
      it also means that boosts are more prevalent. See commit b29c19b6
      ("drm/i915: Boost RPS frequency for CPU stalls") for a longer discussion
      on the pros and cons of both approaches.
      
      A drawback of this implementation is that it requires constant request
      submission to keep the waitboost trimmed (as it is now cancelled when the
      request is completed). This will be fine for a busy system, but near
      idle the boosts may be kept for longer than desired (effectively tens of
      vblanks worstcase) and there is a reliance on rc6 instead.
      
      v2: Remove defunct rps.client_lock
      Reported-by: NMichał Winiarski <michal.winiarski@intel.com>
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Michał Winiarski <michal.winiarski@intel.com>
      Reviewed-by: NMichał Winiarski <michal.winiarski@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/20170628123548.9236-1-chris@chris-wilson.co.uk
      7b92c1bd
  19. 16 6月, 2017 1 次提交
  20. 13 6月, 2017 1 次提交
  21. 09 6月, 2017 1 次提交
  22. 07 6月, 2017 2 次提交
  23. 01 6月, 2017 3 次提交
    • M
      drm/i915/glk: Fix dotclock calculation in skl_check_pipe_max_pixel_rate · 789f35d7
      Maarten Lankhorst 提交于
      Seems that GLK has a dotclock that's twice the display clock.
      skl_max_scale checks for IS_GEMINILAKE, so perform the same check here.
      
      While at it, change the DRM_ERROR to DEBUG_KMS.
      
      Fixes: 73b0ca8e ("drm/i915/skl+: consider max supported plane pixel
      rate while scaling")
      Cc: Mahesh Kumar <mahesh1.kumar@intel.com>
      Signed-off-by: NMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/20170601103413.7037-1-maarten.lankhorst@linux.intel.comReviewed-by: NMahesh Kumar <mahesh1.kumar@intel.com>
      789f35d7
    • M
      drm/i915/skl+: consider max supported plane pixel rate while scaling · 73b0ca8e
      Mahesh Kumar 提交于
      A display resolution is only supported if it meets all the restrictions
      below for Maximum Pipe Pixel Rate.
      
      The display resolution must fit within the maximum pixel rate output
      from the pipe. Make sure that the display pipe is able to feed pixels at
      a rate required to support the desired resolution.
      For each enabled plane on the pipe {
          If plane scaling enabled {
      	Horizontal down scale amount = Maximum[1, plane horizontal size /
      		    scaler horizontal window size]
      	Vertical down scale amount = Maximum[1, plane vertical size /
      		    scaler vertical window size]
      	Plane down scale amount = Horizontal down scale amount *
      		    Vertical down scale amount
      	Plane Ratio = 1 / Plane down scale amount
          }
          Else {
      	Plane Ratio = 1
          }
          If plane source pixel format is 64 bits per pixel {
      	Plane Ratio = Plane Ratio * 8/9
          }
      }
      
      Pipe Ratio = Minimum Plane Ratio of all enabled planes on the pipe
      
      If pipe scaling is enabled {
          Horizontal down scale amount = Maximum[1, pipe horizontal source size /
      		scaler horizontal window size]
          Vertical down scale amount = Maximum[1, pipe vertical source size /
      		scaler vertical window size]
          Note: The progressive fetch - interlace display mode is equivalent to a
      		2.0 vertical down scale
          Pipe down scale amount = Horizontal down scale amount *
      		Vertical down scale amount
          Pipe Ratio = Pipe Ratio / Pipe down scale amount
      }
      
      Pipe maximum pixel rate = CDCLK frequency * Pipe Ratio
      
      In this patch our calculation is based on pipe downscale amount
      (plane max downscale amount * pipe downscale amount) instead of Pipe
      Ratio. So,
      max supported crtc clock with given scaling = CDCLK / pipe downscale.
      Flip will fail if,
      current crtc clock > max supported crct clock with given scaling.
      
      Changes since V1:
       - separate out fixed_16_16 wrapper API definition
      Changes since V2:
       - Fix buggy crtc !active condition (Maarten)
       - use intel_wm_plane_visible wrapper as per Maarten's suggestion
      Changes since V3:
       - Change failure return from ERANGE to EINVAL
      Changes since V4:
       - Rebase based on previous patch changes
      Changes since V5:
       - return EINVAL instead of continue (Maarten)
      Changes since V6:
       - Improve commit message
       - Address review comment
      Changes since V7:
       - use !enable instead of !active
       - rename config variable for consistency (Maarten)
      Signed-off-by: NMahesh Kumar <mahesh1.kumar@intel.com>
      Reviewed-by: NMatt Roper <matthew.d.roper@intel.com>
      Reviewed-by: NMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Signed-off-by: NMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/20170526151546.25025-4-mahesh1.kumar@intel.com
      73b0ca8e
    • K
      drm/i915/skl: New ddb allocation algorithm · bb9d85f6
      Kumar, Mahesh 提交于
      This patch implements new DDB allocation algorithm as per HW team
      recommendation. This algo takecare of scenario where we allocate less DDB
      for the planes with lower relative pixel rate, but they require more DDB
      to work.
      It also takes care of enabling same watermark level for each
      plane in crtc, for efficient power saving.
      
      Changes since v1:
       - Rebase on top of Paulo's patch series
      
      Changes since v2:
       - Fix the for loop condition to enable WM
      
      Changes since v3:
       - Fix crash in cursor i-g-t reported by Maarten
       - Rebase after addressing Paulo's comments
       - Few other ULT fixes
      Changes since v4:
       - Rebase on drm-tip
       - Added separate function to enable WM levels
      Changes since v5:
       - Fix a crash identified in skl-6770HQ system
      Changes since v6:
       - Address review comments from Matt
      Changes since v7:
       - Fix failure return in skl_compute_plane_wm (Matt)
       - fix typo
      Changes since v8:
       - Always check cursor wm enable irrespective of total_data_rate
      Changes since v9:
       - fix typo
      Signed-off-by: NMahesh Kumar <mahesh1.kumar@intel.com>
      Reviewed-by: NMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Reviewed-by: NMatt Roper <matthew.d.roper@intel.com>
      Signed-off-by: NMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/20170601055918.4601-1-mahesh1.kumar@intel.com
      bb9d85f6