- 04 11月, 2011 1 次提交
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由 Shengzhou Liu 提交于
The P3060QDS is a Freescale reference board that hosts the six-core P3060 SOC. The P3060 Processor combines six e500mc Power Architecture processor cores with high-performance datapath acceleration architecture(DPAA), CoreNet fabric infrastructure, as well as network and peripheral interfaces. P3060QDS Board Overview: Memory subsystem: - 2G Bytes unbuffered DDR3 SDRAM SO-DIMM(64bit bus) - 128M Bytes NOR flash single-chip memory - 16M Bytes SPI flash - 8K Bytes AT24C64 I2C EEPROM Ethernet: - 4x1G + 4x1G/2.5G Ethernet controllers - 2xRGMII + 1xMII, three VSC8641 PHYs on board - Suport multiple Vitesse VSC8234 SGMII Cards in Slot1/2/3 PCIe: Two PCI Express 2.0 controllers/ports USB: Two USB2.0, USB1(TYPE-A) and USB2(TYPE-AB) on board I2C: Four I2C controllers UART: Supports up to four UARTs RapidIO: Supports two serial RapidIO ports Signed-off-by: NShengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 12 10月, 2011 1 次提交
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由 Anatolij Gustschin 提交于
Remove wrong CONFIG_ prefix in Kconfig file. Signed-off-by: NAnatolij Gustschin <agust@denx.de> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 07 10月, 2011 1 次提交
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由 Mingkai Hu 提交于
There's only p2041rdb board for official release, but the p2041 silicon on the board can be converted to p2040 silicon without XAUI and L2 cache function, then the board becomes p2040rdb board. so we use the file name p2041_rdb.c to handle P2040RDB board and P2041RDB board which is also consistent with the board name under U-Boot. During the rename we make few other minor changes to the device tree: * Move USB phy setting into p2041si.dtsi as its SoC not board defined * Convert PCI clock-frequency to decimal to be more readable Signed-off-by: NMingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 23 9月, 2011 1 次提交
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由 Wolfram Sang 提交于
Move the driver to the place where it is expected to be nowadays. Also rename its CONFIG-name to match the rest and adapt the defconfigs. Finally, move selection of REQUIRE_GPIOLIB or WANTS_OPTIONAL_GPIOLIB to the platforms, because this option is per-platform and not per-driver. Signed-off-by: NWolfram Sang <w.sang@pengutronix.de> Cc: Anatolij Gustschin <agust@denx.de> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Signed-off-by: NAnatolij Gustschin <agust@denx.de>
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- 08 7月, 2011 1 次提交
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由 Mingkai Hu 提交于
P2040RDB Specification: ----------------------- 2Gbyte unbuffered DDR3 SDRAM SO-DIMM(64bit bus) 128 Mbyte NOR flash single-chip memory 256 Kbit M24256 I2C EEPROM 16 Mbyte SPI memory SD connector to interface with the SD memory card dTSEC1: connected to the Vitesse SGMII PHY (VSC8221) dTSEC2: connected to the Vitesse SGMII PHY (VSC8221) dTSEC3: connected to the Vitesse SGMII PHY (VSC8221) dTSEC4: connected to the Vitesse RGMII PHY (VSC8641) dTSEC5: connected to the Vitesse RGMII PHY (VSC8641) I2C1: Real time clock, Temperature sensor I2C2: Vcore Regulator, 256Kbit I2C Bus EEPROM SATA: Lanes C and Land D of Bank2 are connected to two SATA connectors UART: supports two UARTs up to 115200 bps for console USB 2.0: connected via a internal UTMI PHY to two TYPE-A interfaces PCIe: - Lanes E, F, G and H of Bank1 are connected to one x4 PCIe SLOT1 - Lanes C and Land D of Bank2 are connected to one x4 PCIe SLOT2 Signed-off-by: NMingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 27 6月, 2011 2 次提交
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由 Prabhakar Kushwaha 提交于
P1010RDB Overview ----------------- 1Gbyte DDR3 (on board DDR) 32Mbyte 16bit NOR flash 32Mbyte SLC NAND Flash 256 Kbit M24256 I2C EEPROM 128 Mbit SPI Flash memory I2C Board 128x8 bit memory SD/MMC connector to interface with the SD memory card 2 SATA interface 1 internal SATA connect to 2.5. 160G SATA2 HDD 1 eSATA connector to rear panel USB 2.0 x1 USB 2.0 port: connected via a UTMI PHY to Mini-AB interface. x1 USB 2.0 port: directly connected to Mini-AB interface Ethernet eTSEC1: Connected to RGMII PHY VSC8641XKO eTSEC2: Connected to SGMII PHY VSC8221 eTSEC3: Connected to SGMII PHY VSC8221 eCAN Two DB-9 female connectors for Field bus interface UART DUART interface: supports two UARTs up to 115200 bps for console display Signed-off-by: NPoonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Timur Tabi 提交于
Add support for the ePAPR-compliant Freescale hypervisor (aka "Topaz") on the Freescale P3041DS, P4080DS, and P5020DS reference boards. Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 23 6月, 2011 1 次提交
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由 Roy Zang 提交于
The P1023 processor is an e500v2 based SoC that utilizes the DPAA networking architecture. This adds basic board support for non-DPAA functionality (device tree, board file, etc). Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com> Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 14 10月, 2010 3 次提交
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由 Kumar Gala 提交于
The P5020DS is in the same family of boards as the P4080 DS and thus shares the corenet_ds code. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
The new e5500 core is similar to the e500mc core but adds 64-bit support. We support running it in 32-bit mode as it is identical to the e500mc. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
The P3041DS is in the same family of boards as the P4080DS and thus shares the corenet_ds code. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 05 8月, 2010 1 次提交
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由 Timur Tabi 提交于
Introduce basic support for the Freescale P1022DS reference board, based on the Freescale BSP for this board. This patch excludes the DIU, SSI, and MMC/SD drivers. Only a 36-bit DTS is provided. Update mpc86xx_smp_defconfig and mpc85xx_defconfig to support the P1022DS. This means enabling 64-bit physical address support, increasing the maximum zone order to 12 (to allow the DIU driver to allocate large chunks), and clean up the audio options to disable the deprecated OSS support. Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 20 4月, 2010 1 次提交
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由 Anton Vorontsov 提交于
Currently some MPC85xx and MPC86xx boards fail to build without CONFIG_PCI: arch/powerpc/platforms/fsl_uli1575.c: In function 'quirk_final_uli5249': arch/powerpc/platforms/fsl_uli1575.c:234: error: implicit declaration of function 'pci_bus_for_each_resource' arch/powerpc/platforms/fsl_uli1575.c:234: error: expected ';' before '{' token cc1: warnings being treated as errors arch/powerpc/platforms/fsl_uli1575.c:223: warning: unused variable 'dummy' make[1]: *** [arch/powerpc/platforms/fsl_uli1575.o] Error 1 This patch fixes the issue by appending 'if PCI' condition when selecting FSL_ULI1575 Kconfig symbol. Signed-off-by: NAnton Vorontsov <avorontsov@mvista.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 21 11月, 2009 2 次提交
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由 Kumar Gala 提交于
Add basic support for the P4080 DS reference board. None of the data path devices (ethernet, crypto, pme) are support at this time. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
Introduce new FSL_SOC_BOOKE Kconfig to handle both 85xx and QorIQ based chips. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 25 8月, 2009 1 次提交
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由 Poonam Aggrwal 提交于
Add support for the P2020RDB reference board from Freescale. Overview of P2020RDB platform - DDR DDR2 1G - NOR Flash 16MByte - NAND Flash 32MByte - 3 Ethernet interfaces 1) etSEC1 - RGMII - connected to a 5 port Vitesse Switch(VSC7385) - Switch is memory mapped through eLBC interface(CS#2) - IRQ1 2) etSEC2 - SGMII - connected to VSC8221 - IRQ2 3) etSEC3 - RGMII - connected to VSC8641 - IRQ3 - 2 1X PCIe interfaces - SD/MMC ,USB - SPI EEPROM - Serial I2C EEPROM Signed-off-by: NPoonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 16 6月, 2009 2 次提交
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由 Nate Case 提交于
Add support for X-ES single-board computers based on the Freescale MPC85xx processors. Signed-off-by: NNate Case <ncase@xes-inc.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
Add the platform-specific code for enabling SWIOTLB if needed on P2020DS, MPC85xx DS, and MPC85xx MDS boards as they are capable of having >4G of memory. We determine if we need to enable swiotlb based on how much memory is in the board and if it exceeds 4G or what we can map via PCI inbound windows. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 19 5月, 2009 1 次提交
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由 Anton Vorontsov 提交于
Select HAS_RAPIDIO symbol and add rio nodes for MPC8568E-MDS and MPC8569E-MDS boards. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 27 3月, 2009 1 次提交
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由 Wolfgang Grandegger 提交于
Supported are Ethernet, serial console, I2C, I2C-based RTC and temperature sensors, NOR and NAND flash, PCI, USB, CAN and Lime display controller. The multiplexing of FPGA interrupts onto PowerPC interrupt lines is supported through our own fpga_pic interrupt controller driver. For example the SJA1000 controller is level low sensitive connected to fpga_pic line 2 and is routed to the second (of three) irq lines to the CPU: can@3,100 { compatible = "philips,sja1000"; reg = <3 0x100 0x80>; interrupts = <2 2>; interrupts = <2 8 1>; // number, type, routing interrupt-parent = <&fpga_pic>; }; Signed-off-by: NSergei Poselenov <sposelenov@emcraft.com> Signed-off-by: NYuri Tikhonov <yur@emcraft.com> Signed-off-by: NIlya Yanok <yanok@emcraft.com> Signed-off-by: NWolfgang Grandegger <wg@grandegger.com> Signed-off-by: NAnatolij Gustschin <agust@denx.de> Signed-off-by: NDmitry Rakhchev <rda@emcraft.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 14 10月, 2008 1 次提交
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由 Timur Tabi 提交于
Modify the Kconfig so that Freescale QUICC Engine (QE) support is a selectable option, thereby allowing users to compile kernels without any QE support. The drawback is that QE support is now disabled by default on platforms that have a QE, and so a defconfig is needed to enable QE and QE devices (like UCC GETH). Fortunately, all the current relevant defconfigs do that already. Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 17 7月, 2008 2 次提交
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由 Kumar Gala 提交于
With arch/ppc gone and all in kernel users of CONFIG_PPC_CPM_NEW_BINDING fixed up we dont have need for the Kconfig option anymore. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 John Rigby 提交于
Choosing PCI or not at config time is allowed on some platforms via an if expression in arch/powerpc/Kconfig. To add a new platform with PCI support selectable at config time, you must change the if expression. This patch makes this easier by changing: bool "PCI support" if <long expression> to bool "PCI support" if PPC_PCI_CHOICE and adding select PPC_PCI_CHOICE to all the config nodes that were previously in the PCI if expression. Platforms with unconditional PCI support continue to just select PCI in their config nodes. Signed-off-by: NJohn Rigby <jrigby@freescale.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 14 7月, 2008 1 次提交
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由 Kumar Gala 提交于
Add support for the MPC8536 process and MPC8536DS reference board. The MPC8536 is an e500v2 based SoC which eTSEC, USB, SATA, PCI, and PCIe. The USB and SATA IP blocks are similiar to those on the PQ2 Pro SoCs and thus use the same drivers. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 10 6月, 2008 1 次提交
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由 Wolfgang Grandegger 提交于
This patch adds support for the TQM8548 modules from TQ-Components GmbH (http://www.tqc.de). Signed-off-by: NWolfgang Grandegger <wg@grandegger.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 09 6月, 2008 1 次提交
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由 Kumar Gala 提交于
The MPC85xx MDS board requires some board level tweaks of the PHYs that either the eTSEC (gianfar) or UCC ethernet controllers are connected to. Its possible to build the phylib as a module, however this breaks the board level fix ups because phy_read and phy_write are not available if we build as a module. So we unconditionally select PHYLIB to ensure its built into the kernel if we are building in MPC85xx MDS support. This was determined to be the easiest soultion even though it prevents the user from removing PHYLIB support if they decide they don't want it. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 17 4月, 2008 1 次提交
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由 Scott Wood 提交于
The kconfig entry can go away once arch/ppc and references to the config in drivers are removed. Signed-off-by: NScott Wood <scottwood@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 27 3月, 2008 1 次提交
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由 Alexandr Smirnov 提交于
The KSI8560 is a single compact, mid-, or full-size Advanced Mezzanine Card (AdvancedMC™) based on the Freescale™ Semiconductor MPC8560 PowerQUICC III™ microprocessor. This product will serve in data and signaling applications such as signaling gateways (SGW) and softswitch signaling interface cards. The board has altera maxii CPLD, that is used to obtain and manage board configuration. Also there are two SCC UART serial consoles and FCC ethernet, that is routed to the front panel, while other ethernet controlers (TSEC's) are routed to the backplane. Signed-off-by: NAlexandr Smirnov <asmirnov@ru.mvista.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 29 1月, 2008 1 次提交
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由 Kumar Gala 提交于
* Allow multiple boards to be selected in a single build * Removed Kconfig option '85xx' which existed only for compat with arch/ppc * Added a multiplatform 85xx defconfig (mpc85xx_defconfig). This builds all 85xx boards except sbc8560 and stx_gp3 since these to boards have board specific ifdef in driver code that may break all other boards Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 28 1月, 2008 5 次提交
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由 Paul Gortmaker 提交于
This adds the basic support for the Wind River SBC8548 board, implemented as powerpc. It closely follows the implementation of the MPC8548CDS. Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Paul Gortmaker 提交于
Currently there is no way to disable the CPM2 support. Some boards, like the SBC8560 have their own external UART and don't have any direct dependencies on the CPM for a serial console or anything else. Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Paul Gortmaker 提交于
This adds support for the Wind River SBC8560 board, implemented as powerpc. It closely follows the implementation of the MPC8560ADS. Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 11 10月, 2007 1 次提交
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由 Scott Wood 提交于
Signed-off-by: NScott Wood <scottwood@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 08 10月, 2007 1 次提交
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由 Anton Vorontsov 提交于
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 14 9月, 2007 1 次提交
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由 Kumar Gala 提交于
Renamed the mpc8544_ds.c board code to mpc85xx_ds.c to make it more generic in prep for other boards based on the same platform. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 18 8月, 2007 1 次提交
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由 Kumar Gala 提交于
The interrupt routing in the device trees for the ULI M1575 was inproperly using the interrupt line field as pci function. Fixed up the device tree's to actual conform for to specification and changed the interrupt mapping code so it just uses a static mapping setup as follows: PIRQA - IRQ9 PIRQB - IRQ10 PIRQC - IRQ11 PIRQD - IRQ12 USB 1.1 OCHI (1c.0) - IRQ12 USB 1.1 OCHI (1c.1) - IRQ9 USB 1.1 OCHI (1c.2) - IRQ10 USB 1.1 ECHI (1c.3) - IRQ11 LAN (1b.0) - IRQ6 AC97 (1d.0) - IRQ6 Modem (1d.1) - IRQ6 HD Audio (1d.2) - IRQ6 SATA (1f.1) - IRQ5 SMB (1e.1) - IRQ7 PMU (1e.2) - IRQ7 PATA (1f.0) - IRQ14/15 Took the oppurtunity to refactor the code into a single file so we don't have to duplicate these fixes on the two current boards in the tree and several forth coming boards that will also need the code. Fixed RTC support that requires a dummy memory read on the P2P bridge to unlock the RTC and setup the default of the RTC alarm registers to match with a basic x86 style CMOS RTC. Moved code that poked ISA registers to a FIXUP_FINAL quirk to ensure the PCI IO space has been setup properly before we start poking ISA registers at random locations. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 24 7月, 2007 2 次提交
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由 Randy Vinson 提交于
The Freescale MPC8555CDS and MPC8548CDS reference hardware has a legacy 8259 interrupt controller pair contained within a VIA VT82C686B Southbridge on the main carrier board. The processor complex plugs into the carrier card using a PCI slot which limits the available interrupts to the INTA-INTD PCI interrupts. The output of the 8259 cascade pair is routed through a gate array and connected to the PCI INTA interrupt line. The normal interrupt chaining hook (set_irq_chained_handler) does not allow sharing of the chained interrupt which prevents the use of PCI INTA by PCI devices. This patch allows the 8259 cascade pair to share their interrupt line with PCI devices. NOTE: The addition of the .end routine for the MPIC is not strictly necessary for this patch. It's there so this code will run from within the threaded interrupt context used by the Real Time patch. Signed-off-by: NRandy Vinson <rvinson@mvista.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Roy Zang 提交于
Add basic support for the PCIe PHB and enable the ULI bridge. Signed-off-by: NYork Sun <yorksun@freescale.com> Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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