1. 25 7月, 2023 2 次提交
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    • D
      spi: dw: Add support for 32-bits max xfer size · b80ba107
      Damien Le Moal 提交于
      mainline inclusion
      from mainline-v5.11-rc1
      commit a51acc24
      category: bugfix
      bugzilla: https://gitee.com/openeuler/kernel/issues/I7BZ1B
      CVE: NA
      
      Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=a51acc2400d47df0f
      
      ----------------------------------------------------------------------
      
      The Synopsis DesignWare DW_apb_ssi specifications version 3.23 onward
      define a 32-bits maximum transfer size synthesis parameter
      (SSI_MAX_XFER_SIZE=32) in addition to the legacy 16-bits configuration
      (SSI_MAX_XFER_SIZE=16) for SPI controllers. When SSI_MAX_XFER_SIZE=32,
      the layout of the ctrlr0 register changes, moving the data frame format
      field from bits [3..0] to bits [16..20], and the RX/TX FIFO word size
      can be up to 32-bits.
      
      To support this new format, introduce the DW SPI capability flag
      DW_SPI_CAP_DFS32 to indicate that a controller is configured with
      SSI_MAX_XFER_SIZE=32. Since SSI_MAX_XFER_SIZE is a controller synthesis
      parameter not accessible through a register, the detection of this
      parameter value is done in spi_hw_init() by writing and reading the
      ctrlr0 register and testing the value of bits [3..0]. These bits are
      ignored (unchanged) for SSI_MAX_XFER_SIZE=16, allowing the detection.
      If a DFS32 capable SPI controller is detected, the new field dfs_offset
      in struct dw_spi is set to SPI_DFS32_OFFSET (16).
      
      dw_spi_update_config() is modified to set the data frame size field at
      the correct position is the CTRLR0 register, as indicated by the
      dfs_offset field of the dw_spi structure.
      
      The DW_SPI_CAP_DFS32 flag is also unconditionally set for SPI slave
      controllers, e.g. controllers that have the DW_SPI_CAP_DWC_SSI
      capability flag set. However, for these ssi controllers, the dfs_offset
      field is set to 0 as before (as per specifications).
      
      Finally, for any controller with the DW_SPI_CAP_DFS32 capability flag
      set, dw_spi_add_host() extends the value of bits_per_word_mask from
      16-bits to 32-bits. dw_reader() and dw_writer() are also modified to
      handle 32-bits iTX/RX FIFO words.
      Suggested-by: NSean Anderson <seanga2@gmail.com>
      Signed-off-by: NDamien Le Moal <damien.lemoal@wdc.com>
      Acked-by: NSerge Semin <fancer.lancer@gmail.com>
      Link: https://lore.kernel.org/r/20201206011817.11700-3-damien.lemoal@wdc.comSigned-off-by: NMark Brown <broonie@kernel.org>
      Signed-off-by: Nhuangfangrun <huangfangrun1@h-partners.com>
      b80ba107
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