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  1. 24 7月, 2019 3 次提交
  3. 10 6月, 2019 1 次提交
    • T
      bus: ti-sysc: Add support for module specific reset quirks · 4e23be47
      由 Tony Lindgren 提交于 
      Some older interconnect target modules need module internal clock
toggling quirks to reset properly. We've been doing this in the
platform code earlier, but need to be able to it directly in the
ti-sysc driver when we no longer rely on on the platform code.

Let's add reset handling for 1-wire, i2c and watchdog. Later on
we can add more modules like msdi and dss as they get tested.
For dra7 pcie, we should be able to just use the rstctrl reset
driver when available.
Signed-off-by: NTony Lindgren <tony@atomide.com>
      4e23be47
  5. 28 5月, 2019 11 次提交
  7. 02 5月, 2019 1 次提交
    • T
      bus: ti-sysc: Handle devices with no control registers · e4f50c8d
      由 Tony Lindgren 提交于 
      Some interconnect target modules have no module control registers at
all, such as d_can on am335x and am437x.

The d_can register offset at 0 is CTL register with 0x401 as the default
value. I guess I mistook the 0x401 value for a revision register as the
value happens to look similar to what the revision registers typically
have for other modules.

To handle modules with no control registers, we need to improve the
ti-sysc driver a bit to bail out with errors on no control registers,
and then we can remove the bogus revision registers for d_can.

Cc: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Tested-by: NKeerthy <j-keerthy@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
      e4f50c8d
  9. 09 4月, 2019 1 次提交
  11. 06 4月, 2019 2 次提交
  13. 04 4月, 2019 6 次提交
    • T
      bus: ti-sysc: Add quirk handling for external optional functional clock · a54275f4
      由 Tony Lindgren 提交于 
      We cannot access mcpdm registers at all unless there is an optional pdmclk
configured. As this is currently only needed for mcpdm, let's check for
mcpdm in sysc_get_clocks(). If it turns out to be needed for other modules
too, we can add more flags to the quirks table for this.
Signed-off-by: NTony Lindgren <tony@atomide.com>
      a54275f4
    • T
      bus: ti-sysc: Add support for early quirks based on register address · 42b9c5c9
      由 Tony Lindgren 提交于 
      At least mcpdm needs an optional external clock enabled to function and
this clock typically comes from the PMIC. We can detect mcpdm based on
the interconnect target module address and set a quirk flag early.

To do this, let's initialize the clocks a bit later and add a new
function for sysc_init_early_quirks(). Note that we cannot yet enable
the early quirks for mcpdm until the optional external clocks are
handled in the in the following patch.
Signed-off-by: NTony Lindgren <tony@atomide.com>
      42b9c5c9
    • T
      bus: ti-sysc: Move rstctrl reset to happen later · b11c1ea1
      由 Tony Lindgren 提交于 
      We can do the rsstctrl a bit later, but need to deassert rstctrl reset
before the clocks are enabled if asserted. Let's only init restctrl
in sysc_init_resets() and do the reset later on just before we enable
the device clocks.
Signed-off-by: NTony Lindgren <tony@atomide.com>
      b11c1ea1
    • T
      bus: ti-sysc: Manage clocks for the interconnect target module in all cases · 93de83a2
      由 Tony Lindgren 提交于 
      We are currently not managing interconnect target module clocks in the
for legacy platform data based case. This causes a problem for using the
platform data based functions when dropping the platform data for the
interconnect target module configuration.

To avoid a situation where we need to populate the main and optional
clocks also for the platform data based functions, let's just manage the
clocks directly in ti-sysc driver. This means that until the interconnect
target module confugration platform data is dropped our use count for
clk_enable() will be 2 instead of 1.
Signed-off-by: NTony Lindgren <tony@atomide.com>
      93de83a2
    • T
      bus: ti-sysc: Allocate mdata as needed and do platform data based init later · a3e92e7b
      由 Tony Lindgren 提交于 
      The platform data based init functions typically reset the interconnect
target module configure the registers. As we may need the interconnect
target module specific quirks configured based on the revision register,
we want to move the platform data based init to happen later.

Let's allocate mdata as needed so it's available for sysc_legacy_init()
that we call with module clocks enabled from sysc_init_module().
Signed-off-by: NTony Lindgren <tony@atomide.com>
      a3e92e7b
    • T
      bus: ti-sysc: Enable all clocks directly during init to read revision · 1a5cd7c2
      由 Tony Lindgren 提交于 
      The first thing we want to do is just read the module revision register to
be able to configure the module specific quirks and configure the module
registers.

As the interconnect target module may not yet be properly configured and
may need a reset first, we don't want to use pm_runtime_get() at this
point.

To read the revision register, let's just enable the all the clocks for
the interconnect target module during init even if the optional clocks
are not needed. That way we can read the revision register to configure
the quirks needed for PM runtime.
Signed-off-by: NTony Lindgren <tony@atomide.com>
      1a5cd7c2
  15. 01 4月, 2019 5 次提交
  17. 29 1月, 2019 1 次提交
    • T
      bus: ti-sysc: Fix timer handling with drop pm_runtime_irq_safe() · 9bd34c63
      由 Tony Lindgren 提交于 
      Commit 84badc5e ("ARM: dts: omap4: Move l4 child devices to probe
them with ti-sysc") started producing a warning for pwm-omap-dmtimer:

WARNING: CPU: 0 PID: 77 at drivers/bus/omap_l3_noc.c:147
l3_interrupt_handler+0x2f8/0x388
44000000.ocp:L3 Custom Error: MASTER MPU TARGET L4PER2 (Idle):
Data Access in Supervisor mode during Functional access
...
__pm_runtime_idle
omap_dm_timer_disable
pwm_omap_dmtimer_start
pwm_omap_dmtimer_enable
pwm_apply_state
pwm_vibrator_start
pwm_vibrator_play_work

This is because the timer that pwm-omap-dmtimer is using is now being
probed with ti-sysc interconnect target module instead of omap_device
and the ti-sysc quirk for SYSC_QUIRK_LEGACY_IDLE is not fully
compatible with what omap_device has been doing.

We could fix this by reverting the timer changes and have the timer
probe again with omap_device. Or we could add more quirk handling to
ti-sysc driver. But as these options don't work nicely as longer term
solutions, let's just make timers probe with ti-sysc without any
quirks.

To do this, all we need to do is remove quirks for timers for ti-sysc,
and drop the bogus pm_runtime_irq_safe() flag for timer-ti-dm.

We should not use pm_runtime_irq_safe() anyways for drivers as it will
take a permanent use count on the parent device blocking the parent
devices from idling and has been forcing ti-sysc driver to use a
quirk flag.

Note that we will move the timer data to DEBUG section later on in
clean-up patches.

Fixes: 84badc5e ("ARM: dts: omap4: Move l4 child devices to probe them with ti-sysc")
Cc: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: H. Nikolaus Schaller <hns@goldelico.com>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Ladislav Michl <ladis@linux-mips.org>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Sebastian Reichel <sre@kernel.org>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Reported-by: NH. Nikolaus Schaller <hns@goldelico.com>
Tested-By: NAndreas Kemnade <andreas@kemnade.info>
Tested-By: NH. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
      9bd34c63
  19. 11 12月, 2018 1 次提交
    • T
      bus: ti-sysc: Check for no-reset and no-idle flags at the child level · 4014c08b
      由 Tony Lindgren 提交于 
      With ti-sysc, we need to now have the device tree properties for
ti,no-reset-on-init and ti,no-idle-on-init at the module level instead
of the child device level.

Let's check for these properties at the child device level to enable
quirks, and warn about moving the properties to the module level.

Otherwise am335x-evm based boards tagging gpio1 with ti,no-reset-on-init
will have their DDR power disabled if wired up in such a tricky way.

Note that this should not be an issue for earlier kernels as we don't
rely on this until the dts files have been updated to probe with ti-sysc
interconnect target driver.

Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reported-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
      4014c08b
  21. 16 11月, 2018 3 次提交
  23. 02 10月, 2018 1 次提交
  25. 29 9月, 2018 3 次提交
  27. 25 9月, 2018 1 次提交