1. 13 9月, 2016 1 次提交
    • J
      MIPS: MAAR: Fix address alignment · ac7e385f
      James Hogan 提交于
      The alignment of MIPS MAAR region addresses isn't quite right.
      
      - It rounds an already 64 KiB aligned start address up to the next
        64 KiB boundary, e.g. 0x80000000 is rounded up to 0x80010000.
      
      - It assumes the end address is already on a 64 KiB boundary and doesn't
        round it down. Should that not be the case it will hit the second
        BUG_ON() in write_maar_pair().
      
      Both cases are addressed by rounding up and down to 64 KiB boundaries in
      the more traditional way of adding 0xffff (for rounding up) and masking
      off the low 16 bits.
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Paul Burton <paul.burton@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/13858/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      ac7e385f
  2. 03 8月, 2016 1 次提交
  3. 13 5月, 2016 2 次提交
    • J
      MIPS: mm: Don't do MTHC0 if XPA not present · 4b6f99d3
      James Hogan 提交于
      Performing an MTHC0 instruction without XPA being present will trigger a
      reserved instruction exception, therefore conditionalise the use of this
      instruction when building TLB handlers (build_update_entries()), and in
      __update_tlb().
      
      This allows an XPA kernel to run on non XPA hardware without that
      instruction implemented, just like it can run on XPA capable hardware
      without XPA in use (with the noxpa kernel argument) or with XPA not
      configured in hardware.
      
      [paul.burton@imgtec.com:
        - Rebase atop other TLB work.
        - Add "mm" to subject.
        - Handle the __kmap_pgprot case.]
      
      Fixes: c5b36783 ("MIPS: Add support for XPA.")
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
      Cc: David Hildenbrand <dahi@linux.vnet.ibm.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Jerome Marchand <jmarchan@redhat.com>
      Cc: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
      Cc: linux-mips@linux-mips.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/13124/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      4b6f99d3
    • P
      MIPS: mm: Fix MIPS32 36b physical addressing (alchemy, netlogic) · 7b2cb64f
      Paul Burton 提交于
      There are 2 distinct cases in which a kernel for a MIPS32 CPU
      (CONFIG_CPU_MIPS32=y) may use 64 bit physical addresses
      (CONFIG_PHYS_ADDR_T_64BIT=y):
      
        - 36 bit physical addressing as used by RMI Alchemy & Netlogic XLP/XLR
          CPUs.
      
        - MIPS32r5 eXtended Physical Addressing (XPA).
      
      These 2 cases are distinct in that they require different behaviour from
      the kernel - the EntryLo registers have different formats. Until Linux
      v4.1 we only supported the first case, with code conditional upon the 2
      aforementioned Kconfig variables being set. Commit c5b36783 ("MIPS:
      Add support for XPA.") added support for the second case, but did so by
      modifying the code that existed for the first case rather than treating
      the 2 cases as distinct. Since the EntryLo registers have different
      formats this breaks the 36 bit Alchemy/XLP/XLR case. Fix this by
      splitting the 2 cases, with XPA cases now being conditional upon
      CONFIG_XPA and the non-XPA case matching the code as it existed prior to
      commit c5b36783 ("MIPS: Add support for XPA.").
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      Reported-by: NManuel Lauss <manuel.lauss@gmail.com>
      Tested-by: NManuel Lauss <manuel.lauss@gmail.com>
      Fixes: c5b36783 ("MIPS: Add support for XPA.")
      Cc: James Hogan <james.hogan@imgtec.com>
      Cc: David Daney <david.daney@cavium.com>
      Cc: Huacai Chen <chenhc@lemote.com>
      Cc: Maciej W. Rozycki <macro@linux-mips.org>
      Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
      Cc: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
      Cc: Peter Zijlstra (Intel) <peterz@infradead.org>
      Cc: David Hildenbrand <dahi@linux.vnet.ibm.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Ingo Molnar <mingo@kernel.org>
      Cc: Alex Smith <alex.smith@imgtec.com>
      Cc: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
      Cc: stable@vger.kernel.org # v4.1+
      Cc: linux-mips@linux-mips.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/13119/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      7b2cb64f
  4. 09 5月, 2016 1 次提交
    • J
      MIPS: c-r4k: Sync icache when it fills from dcache · b2a3c5be
      James Hogan 提交于
      It is still necessary to handle icache coherency in flush_cache_range()
      and copy_to_user_page() when the icache fills from the dcache, even
      though the dcache does not need to be written back. However when this
      handling was added in commit 2eaa7ec2 ("[MIPS] Handle I-cache
      coherency in flush_cache_range()"), it did not do any icache flushing
      when it fills from dcache.
      
      Therefore fix r4k_flush_cache_range() to run
      local_r4k_flush_cache_range() without taking into account whether icache
      fills from dcache, so that the icache coherency gets handled. Checks are
      also added in local_r4k_flush_cache_range() so that the dcache blast
      doesn't take place when icache fills from dcache.
      
      A test to mmap a page PROT_READ|PROT_WRITE, modify code in it, and
      mprotect it to VM_READ|VM_EXEC (similar to case described in above
      commit) can hit this case quite easily to verify the fix.
      
      A similar check was added in commit f8829cae ("[MIPS] Fix aliasing
      bug in copy_to_user_page / copy_from_user_page"), so also fix
      copy_to_user_page() similarly, to call flush_cache_page() without taking
      into account whether icache fills from dcache, since flush_cache_page()
      already takes that into account to avoid performing a dcache flush.
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Leonid Yegoshin <leonid.yegoshin@imgtec.com>
      Cc: Manuel Lauss <manuel.lauss@gmail.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/12179/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      b2a3c5be
  5. 16 1月, 2016 1 次提交
  6. 27 9月, 2015 3 次提交
    • P
      MIPS: Initialise MAARs on secondary CPUs · e060f6ed
      Paul Burton 提交于
      MAARs should be initialised on each CPU (or rather, core) in the system
      in order to achieve consistent behaviour & performance. Previously they
      have only been initialised on the boot CPU which leads to performance
      problems if tasks are later scheduled on a secondary CPU, particularly
      if those tasks make use of unaligned vector accesses where some CPUs
      don't handle any cases in hardware for non-speculative memory regions.
      Fix this by recording the MAAR configuration from the boot CPU and
      applying it to secondary CPUs as part of their bringup.
      Reported-by: NDoug Gilmore <doug.gilmore@imgtec.com>
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Cc: Rusty Russell <rusty@rustcorp.com.au>
      Cc: Steven J. Hill <Steven.Hill@imgtec.com>
      Cc: Andrew Bresticker <abrestic@chromium.org>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: David Hildenbrand <dahi@linux.vnet.ibm.com>
      Cc: linux-kernel@vger.kernel.org
      Cc: Aaro Koskinen <aaro.koskinen@iki.fi>
      Cc: James Hogan <james.hogan@imgtec.com>
      Cc: Ingo Molnar <mingo@kernel.org>
      Cc: Markos Chandras <markos.chandras@imgtec.com>
      Cc: Hemmo Nieminen <hemmo.nieminen@iki.fi>
      Cc: Alex Smith <alex.smith@imgtec.com>
      Cc: Peter Zijlstra (Intel) <peterz@infradead.org>
      Patchwork: https://patchwork.linux-mips.org/patch/11239/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      e060f6ed
    • P
      MIPS: print MAAR configuration during boot · 651ca7f4
      Paul Burton 提交于
      Verifying that the MAAR configuration is as expected is useful when
      debugging the performance of a system. Print out the memory regions
      configured via MAAR along with their attributes.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Cc: Steven J. Hill <Steven.Hill@imgtec.com>
      Cc: David Hildenbrand <dahi@linux.vnet.ibm.com>
      Cc: linux-kernel@vger.kernel.org
      Cc: Peter Zijlstra (Intel) <peterz@infradead.org>
      Patchwork: https://patchwork.linux-mips.org/patch/11238/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      651ca7f4
    • P
      MIPS: mm: compile maar_init unconditionally · def3ab5d
      Paul Burton 提交于
      maar_init was previously only compiled when CONFIG_NEED_MULTIPLE_NODES
      was not set, which has been fine since it is only called from the
      standard implementation of mem_init which has the same condition. In
      preparation for calling it from the SMP startup code on secondary CPUs,
      move maar_init outside of the #ifndef such that it is always compiled.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      Cc: Markos Chandras <markos.chandras@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Cc: Steven J. Hill <Steven.Hill@imgtec.com>
      Cc: David Hildenbrand <dahi@linux.vnet.ibm.com>
      Cc: linux-kernel@vger.kernel.org
      Cc: Ingo Molnar <mingo@kernel.org>
      Patchwork: https://patchwork.linux-mips.org/patch/11237/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      def3ab5d
  7. 03 9月, 2015 1 次提交
  8. 19 5月, 2015 1 次提交
  9. 20 3月, 2015 1 次提交
  10. 25 11月, 2014 1 次提交
  11. 14 9月, 2014 1 次提交
  12. 02 8月, 2014 1 次提交
    • P
      MIPS: Initialise MAARs · ab9988a3
      Paul Burton 提交于
      Add initialisation for Memory Accessibility Attribute Registers. Generic
      code cannot know the platform-specific requirements with regards to
      speculative accesses, so it simply calls a platform_maar_init function
      which platforms with MAARs are expected to implement by calling the
      provided write_maar_pair function & returning the number of MAAR pairs
      used. A weak default implementation will simply use no MAAR pairs. Any
      present but unused MAAR pairs are then marked invalid, effectively
      disabling them.
      
      The end result of this patch is that MAARs are all marked invalid, until
      platforms implement the platform_maar_init function.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/7331/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      ab9988a3
  13. 28 5月, 2014 1 次提交
  14. 24 5月, 2014 1 次提交
    • R
      MIPS: MT: Remove SMTC support · b633648c
      Ralf Baechle 提交于
      Nobody is maintaining SMTC anymore and there also seems to be no userbase.
      Which is a pity - the SMTC technology primarily developed by Kevin D.
      Kissell <kevink@paralogos.com> is an ingenious demonstration for the MT
      ASE's power and elegance.
      
      Based on Markos Chandras <Markos.Chandras@imgtec.com> patch
      https://patchwork.linux-mips.org/patch/6719/ which while very similar did
      no longer apply cleanly when I tried to merge it plus some additional
      post-SMTC cleanup - SMTC was a feature as tricky to remove as it was to
      merge once upon a time.
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      b633648c
  15. 27 3月, 2014 1 次提交
  16. 23 1月, 2014 1 次提交
  17. 25 9月, 2013 1 次提交
  18. 06 9月, 2013 1 次提交
  19. 04 7月, 2013 3 次提交
    • J
      mm/MIPS: prepare for removing num_physpages and simplify mem_init() · 1132137e
      Jiang Liu 提交于
      Prepare for removing num_physpages and simplify mem_init().
      Signed-off-by: NJiang Liu <jiang.liu@huawei.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: David Daney <david.daney@cavium.com>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Jiri Kosina <jkosina@suse.cz>
      Cc: John Crispin <blogic@openwrt.org>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Minchan Kim <minchan@kernel.org>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      1132137e
    • J
      mm: concentrate modification of totalram_pages into the mm core · 0c988534
      Jiang Liu 提交于
      Concentrate code to modify totalram_pages into the mm core, so the arch
      memory initialized code doesn't need to take care of it.  With these
      changes applied, only following functions from mm core modify global
      variable totalram_pages: free_bootmem_late(), free_all_bootmem(),
      free_all_bootmem_node(), adjust_managed_page_count().
      
      With this patch applied, it will be much more easier for us to keep
      totalram_pages and zone->managed_pages in consistence.
      Signed-off-by: NJiang Liu <jiang.liu@huawei.com>
      Acked-by: NDavid Howells <dhowells@redhat.com>
      Cc: "H. Peter Anvin" <hpa@zytor.com>
      Cc: "Michael S. Tsirkin" <mst@redhat.com>
      Cc: <sworddragon2@aol.com>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Cc: Chris Metcalf <cmetcalf@tilera.com>
      Cc: Geert Uytterhoeven <geert@linux-m68k.org>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Jeremy Fitzhardinge <jeremy@goop.org>
      Cc: Jianguo Wu <wujianguo@huawei.com>
      Cc: Joonsoo Kim <js1304@gmail.com>
      Cc: Kamezawa Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: Marek Szyprowski <m.szyprowski@samsung.com>
      Cc: Mel Gorman <mel@csn.ul.ie>
      Cc: Michel Lespinasse <walken@google.com>
      Cc: Minchan Kim <minchan@kernel.org>
      Cc: Rik van Riel <riel@redhat.com>
      Cc: Rusty Russell <rusty@rustcorp.com.au>
      Cc: Tang Chen <tangchen@cn.fujitsu.com>
      Cc: Tejun Heo <tj@kernel.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Wen Congyang <wency@cn.fujitsu.com>
      Cc: Will Deacon <will.deacon@arm.com>
      Cc: Yasuaki Ishimatsu <isimatu.yasuaki@jp.fujitsu.com>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Russell King <rmk@arm.linux.org.uk>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      0c988534
    • J
      mm: change signature of free_reserved_area() to fix building warnings · 11199692
      Jiang Liu 提交于
      Change signature of free_reserved_area() according to Russell King's
      suggestion to fix following build warnings:
      
        arch/arm/mm/init.c: In function 'mem_init':
        arch/arm/mm/init.c:603:2: warning: passing argument 1 of 'free_reserved_area' makes integer from pointer without a cast [enabled by default]
          free_reserved_area(__va(PHYS_PFN_OFFSET), swapper_pg_dir, 0, NULL);
          ^
        In file included from include/linux/mman.h:4:0,
                         from arch/arm/mm/init.c:15:
        include/linux/mm.h:1301:22: note: expected 'long unsigned int' but argument is of type 'void *'
         extern unsigned long free_reserved_area(unsigned long start, unsigned long end,
      
         mm/page_alloc.c: In function 'free_reserved_area':
      >> mm/page_alloc.c:5134:3: warning: passing argument 1 of 'virt_to_phys' makes pointer from integer without a cast [enabled by default]
         In file included from arch/mips/include/asm/page.h:49:0,
                          from include/linux/mmzone.h:20,
                          from include/linux/gfp.h:4,
                          from include/linux/mm.h:8,
                          from mm/page_alloc.c:18:
         arch/mips/include/asm/io.h:119:29: note: expected 'const volatile void *' but argument is of type 'long unsigned int'
         mm/page_alloc.c: In function 'free_area_init_nodes':
         mm/page_alloc.c:5030:34: warning: array subscript is below array bounds [-Warray-bounds]
      
      Also address some minor code review comments.
      Signed-off-by: NJiang Liu <jiang.liu@huawei.com>
      Reported-by: NArnd Bergmann <arnd@arndb.de>
      Cc: "H. Peter Anvin" <hpa@zytor.com>
      Cc: "Michael S. Tsirkin" <mst@redhat.com>
      Cc: <sworddragon2@aol.com>
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Cc: Chris Metcalf <cmetcalf@tilera.com>
      Cc: David Howells <dhowells@redhat.com>
      Cc: Geert Uytterhoeven <geert@linux-m68k.org>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Jeremy Fitzhardinge <jeremy@goop.org>
      Cc: Jianguo Wu <wujianguo@huawei.com>
      Cc: Joonsoo Kim <js1304@gmail.com>
      Cc: Kamezawa Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: Marek Szyprowski <m.szyprowski@samsung.com>
      Cc: Mel Gorman <mel@csn.ul.ie>
      Cc: Michel Lespinasse <walken@google.com>
      Cc: Minchan Kim <minchan@kernel.org>
      Cc: Rik van Riel <riel@redhat.com>
      Cc: Rusty Russell <rusty@rustcorp.com.au>
      Cc: Tang Chen <tangchen@cn.fujitsu.com>
      Cc: Tejun Heo <tj@kernel.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Wen Congyang <wency@cn.fujitsu.com>
      Cc: Will Deacon <will.deacon@arm.com>
      Cc: Yasuaki Ishimatsu <isimatu.yasuaki@jp.fujitsu.com>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Russell King <rmk@arm.linux.org.uk>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      11199692
  20. 30 4月, 2013 3 次提交
  21. 01 2月, 2013 1 次提交
  22. 11 10月, 2012 1 次提交
  23. 20 3月, 2012 1 次提交
  24. 08 12月, 2011 1 次提交
    • D
      MIPS: Handle initmem in systems with kernel not in add_memory_region() mem · 43064c0c
      David Daney 提交于
      This patch addresses a couple of related problems:
      
      1) The kernel may reside in physical memory outside of the ranges set
         by plat_mem_setup().  If this is the case, init mem cannot be
         reused as it resides outside of the range of pages that the kernel
         memory allocators control.
      
      2) initrd images might be loaded in physical memory outside of the
         ranges set by plat_mem_setup().  The memory likewise cannot be
         reused.  The patch doesn't handle this specific case, but the
         infrastructure is useful for future patches that do.
      
      The crux of the problem is that there are memory regions that need be
      memory_present(), but that cannot be free_bootmem() at the time of
      arch_mem_init().  We create a new type of memory (BOOT_MEM_INIT_RAM)
      for use with add_memory_region().  Then arch_mem_init() adds the init
      mem with this type if the init mem is not already covered by existing
      ranges.
      
      When memory is being freed into the bootmem allocator, we skip the
      BOOT_MEM_INIT_RAM ranges so they are not clobbered, but we do signal
      them as memory_present().  This way when they are later freed, the
      necessary memory manager structures have initialized and the Sparse
      allocater is prevented from crashing.
      
      The Octeon specific code that handled this case is removed, because
      the new general purpose code handles the case.
      Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
      To: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/1988/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      43064c0c
  25. 26 7月, 2011 2 次提交
    • K
      MIPS: Limit fixrange_init() to the FIXMAP region · 464fd83e
      Kevin Cernekee 提交于
      fixrange_init() allocates page tables for all addresses higher than
      FIXADDR_TOP.  On processors that override the default FIXADDR_TOP
      address of 0xfffe_0000, this can consume up to 4 pages (1 page per 4MB)
      for pgd's that are never used.
      Signed-off-by: NKevin Cernekee <cernekee@gmail.com>
      Cc: linux-mips@linux-mips.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/1980/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      464fd83e
    • K
      MIPS: pfn_valid() is broken on low memory HIGHMEM systems · b6da0ffb
      Kevin Cernekee 提交于
      pfn_valid() compares the PFN to max_mapnr:
      
              __pfn >= min_low_pfn && __pfn < max_mapnr;
      
      On HIGHMEM kernels, highend_pfn is used to set the value of max_mapnr.
      Unfortunately, highend_pfn is left at zero if the system does not
      actually have enough RAM to reach into the HIGHMEM range.  This causes
      pfn_valid() to always return false, and when debug checks are enabled
      the kernel will fail catastrophically:
      
      Memory: 22432k/32768k available (2249k kernel code, 10336k reserved, 653k data, 1352k init, 0k highmem)
      NR_IRQS:128
      kfree_debugcheck: out of range ptr 81c02900h.
      Kernel bug detected[#1]:
      Cpu 0
      $ 0   : 00000000 10008400 00000034 00000000
      $ 4   : 8003e160 802a0000 8003e160 00000000
      $ 8   : 00000000 0000003e 00000747 00000747
      ...
      
      On such a configuration, max_low_pfn should be used to set max_mapnr.
      
      This was seen on 2.6.34.
      Signed-off-by: NKevin Cernekee <cernekee@gmail.com>
      To: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/1992/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      b6da0ffb
  26. 25 5月, 2011 1 次提交
  27. 15 3月, 2011 1 次提交
  28. 30 3月, 2010 1 次提交
    • T
      include cleanup: Update gfp.h and slab.h includes to prepare for breaking... · 5a0e3ad6
      Tejun Heo 提交于
      include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
      
      percpu.h is included by sched.h and module.h and thus ends up being
      included when building most .c files.  percpu.h includes slab.h which
      in turn includes gfp.h making everything defined by the two files
      universally available and complicating inclusion dependencies.
      
      percpu.h -> slab.h dependency is about to be removed.  Prepare for
      this change by updating users of gfp and slab facilities include those
      headers directly instead of assuming availability.  As this conversion
      needs to touch large number of source files, the following script is
      used as the basis of conversion.
      
        http://userweb.kernel.org/~tj/misc/slabh-sweep.py
      
      The script does the followings.
      
      * Scan files for gfp and slab usages and update includes such that
        only the necessary includes are there.  ie. if only gfp is used,
        gfp.h, if slab is used, slab.h.
      
      * When the script inserts a new include, it looks at the include
        blocks and try to put the new include such that its order conforms
        to its surrounding.  It's put in the include block which contains
        core kernel includes, in the same order that the rest are ordered -
        alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
        doesn't seem to be any matching order.
      
      * If the script can't find a place to put a new include (mostly
        because the file doesn't have fitting include block), it prints out
        an error message indicating which .h file needs to be added to the
        file.
      
      The conversion was done in the following steps.
      
      1. The initial automatic conversion of all .c files updated slightly
         over 4000 files, deleting around 700 includes and adding ~480 gfp.h
         and ~3000 slab.h inclusions.  The script emitted errors for ~400
         files.
      
      2. Each error was manually checked.  Some didn't need the inclusion,
         some needed manual addition while adding it to implementation .h or
         embedding .c file was more appropriate for others.  This step added
         inclusions to around 150 files.
      
      3. The script was run again and the output was compared to the edits
         from #2 to make sure no file was left behind.
      
      4. Several build tests were done and a couple of problems were fixed.
         e.g. lib/decompress_*.c used malloc/free() wrappers around slab
         APIs requiring slab.h to be added manually.
      
      5. The script was run on all .h files but without automatically
         editing them as sprinkling gfp.h and slab.h inclusions around .h
         files could easily lead to inclusion dependency hell.  Most gfp.h
         inclusion directives were ignored as stuff from gfp.h was usually
         wildly available and often used in preprocessor macros.  Each
         slab.h inclusion directive was examined and added manually as
         necessary.
      
      6. percpu.h was updated not to include slab.h.
      
      7. Build test were done on the following configurations and failures
         were fixed.  CONFIG_GCOV_KERNEL was turned off for all tests (as my
         distributed build env didn't work with gcov compiles) and a few
         more options had to be turned off depending on archs to make things
         build (like ipr on powerpc/64 which failed due to missing writeq).
      
         * x86 and x86_64 UP and SMP allmodconfig and a custom test config.
         * powerpc and powerpc64 SMP allmodconfig
         * sparc and sparc64 SMP allmodconfig
         * ia64 SMP allmodconfig
         * s390 SMP allmodconfig
         * alpha SMP allmodconfig
         * um on x86_64 SMP allmodconfig
      
      8. percpu.h modifications were reverted so that it could be applied as
         a separate patch and serve as bisection point.
      
      Given the fact that I had only a couple of failures from tests on step
      6, I'm fairly confident about the coverage of this conversion patch.
      If there is a breakage, it's likely to be something in one of the arch
      headers which should be easily discoverable easily on most builds of
      the specific arch.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Guess-its-ok-by: NChristoph Lameter <cl@linux-foundation.org>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
      5a0e3ad6
  29. 27 2月, 2010 2 次提交
  30. 02 2月, 2010 1 次提交
    • W
      resources: introduce generic page_is_ram() · 61ef2489
      Wu Fengguang 提交于
      It's based on walk_system_ram_range(), for archs that don't have
      their own page_is_ram().
      
      The static verions in MIPS and SCORE are also made global.
      
      v4: prefer plain 1 instead of PAGE_IS_RAM (H. Peter Anvin)
      v3: add comment (KAMEZAWA Hiroyuki)
          "AFAIK, this "System RAM" information has been used for kdump to
          grab valid memory area and seems good for the kernel itself."
      v2: add PAGE_IS_RAM macro (Américo Wang)
      
      Cc: Chen Liqin <liqin.chen@sunplusct.com>
      Cc: Lennox Wu <lennox.wu@gmail.com>
      Cc: Américo Wang <xiyou.wangcong@gmail.com>
      Cc: linux-mips@linux-mips.org
      Cc: Yinghai Lu <yinghai@kernel.org>
      Acked-by: NRalf Baechle <ralf@linux-mips.org>
      Reviewed-by: NKAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
      Signed-off-by: NWu Fengguang <fengguang.wu@intel.com>
      LKML-Reference: <20100122081619.GA6431@localhost>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
      61ef2489
  31. 12 1月, 2010 1 次提交