- 22 8月, 2013 8 次提交
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由 Maxime Ripard 提交于
The Cubieboard2 is the successor of the first Cubieboard, and shares the same hardware, except that the Allwinner A10 found initially has been replaced by an Allwinner A20. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Maxime Ripard 提交于
The A20-olinuxino Micro has a LED connected to the PH2 pin. Use the gpio-led driver to enable the control over this LED. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Maxime Ripard 提交于
Instead of relying on the bootloader to mux the UART pins properly, do it on our own and register the rightful pins for the A20-olinuxino in the DT using pinctrl. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Maxime Ripard 提交于
The UARTs on the A20 can be muxed to several pins. Add a few options to the DTSI so that we can start using them in the boards' DT. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Maxime Ripard 提交于
The PIO controller is responsible for the GPIO/muxing/external interrupts handling. Now that we have support for the A20 pin set in the pinctrl driver, we can start using it in the DTSI. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Maxime Ripard 提交于
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Maxime Ripard 提交于
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Maxime Ripard 提交于
The A31 has a different set of pins than the one found on the A10 and A13. Now that we have support for the A31 pin set in the pinctrl driver, we can enable it in the DTSI with its own compatible. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 20 8月, 2013 2 次提交
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由 Maxime Ripard 提交于
The Olimex A20-Olinuxino is an open-hardware board based on the Allwinner A20 SoC, with most of the pins exported on headers, a 10/100M ethernet port, SATA, SD and uSD slots, etc. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Maxime Ripard 提交于
The Allwinner A20 SoC is based on 2 Cortex A7, an ARM Mali GPU, and is built to be pin-compatible with the older Allwinner A10. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 17 8月, 2013 2 次提交
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由 Maxime Ripard 提交于
This platform from WITS is the evaluation board for the Allwinner A31. It features a quad-Cortex A7, 2048MB of RAM, NAND, USB, MMC, several UART, HDMI, a 2048 x 1536 10" screen, powered by a PowerVR, etc. Of course, most of these peripherals aren't supported yet, but support for those will come eventually. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Maxime Ripard 提交于
The Allwinner A31 SoC is a multimedia SoC powered by 4 Cortex-A7 and a PowerVR GPU. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 14 8月, 2013 1 次提交
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由 Emilio López 提交于
This adds a device tree usable on Mele A1000 (and A2000, as it apparently is the same device except for the case). This device features one UART port, Ethernet, an AXP209 PMU on i2c0 and two user configurable LEDs. Signed-off-by: NEmilio López <emilio@elopez.com.ar> [maxime: fixed the soc node address] Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 11 8月, 2013 6 次提交
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由 Maxime Ripard 提交于
There was a typo in the base address used for the soc node in the A13 device tree. Fix it with the proper base address. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Maxime Ripard 提交于
The reg property of the simple-bus driver is completely useless. Remove it from the DTSI. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Maxime Ripard 提交于
There was a typo in the base address used for the soc node in the A10s device tree. Fix it with the proper base address. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Maxime Ripard 提交于
The reg property of the simple-bus driver is completely useless. Remove it from the DTSI. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Maxime Ripard 提交于
There was a typo in the base address used for the soc node in the A10 device tree. Fix it with the proper base address. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Maxime Ripard 提交于
The reg property of the simple-bus driver is completely useless. Remove it from the DTSI. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 24 7月, 2013 1 次提交
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由 Emilio López 提交于
Quoting from Documentation/leds/leds-class.txt: LED Device Naming ================= Is currently of the form: "devicename:colour:function" Signed-off-by: NEmilio López <emilio@elopez.com.ar> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 15 7月, 2013 4 次提交
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由 Emilio López 提交于
This OLIMEX board has a AT24C16BN-SH EEPROM holding the MAC address. This patch adds the corresponding device tree node to reflect this. Signed-off-by: NEmilio López <emilio@elopez.com.ar> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Emilio López 提交于
This board from OLIMEX is using the three I2C controllers present on A10S: * I2C-0 connects to the AXP152 PMU * I2C-1 holds an AT24C16BN-SH EEPROM with the MAC address for ethernet * I2C-2 is used for UEXT modules. Signed-off-by: NEmilio López <emilio@elopez.com.ar> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Emilio López 提交于
Allwinner A10S has 3 I2C controllers embedded on it. Add them to the corresponding dtsi. Signed-off-by: NEmilio López <emilio@elopez.com.ar> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Emilio López 提交于
The information has been extracted from the A10S-OLinuXino-Micro schematics, as we do not have a user manual for A10S yet. Signed-off-by: NEmilio López <emilio@elopez.com.ar> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 04 7月, 2013 1 次提交
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由 Xianglong Du 提交于
On CSR SiRFprimaII/atlasVI, there is a programmable 16-bit divider (RTC_DIV) that divides the input 32.768KHz clock to the frequency that users need (E.g. 1 Hz). The divided real-time clock will be used to drive a 32-bit counter (RTC_COUNTER) that provides users with the actual time. In each cycle of the divided real-time clock, there is a Hertz interrupt generated to the RISC. Users can also configure an alarm (RTC_ALARM). When RTC_COUNTER matches the alarm, there will be an alarm interrupt generated to the RISC. The system RTC can generate an alarm wake-up signal to notify the power controller to wake up from power saving mode. Signed-off-by: NXianglong Du <Xianglong.Du@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Cc: Jingoo Han <jg1.han@samsung.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 03 7月, 2013 1 次提交
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由 Stephen Warren 提交于
Commit 4c94c8b5 "ARM: tegra: update device trees for USB binding rework" added regulator definitions for GPIO-controlled USB VBUS. However, none of these contained the essential DT property enable-active-high. Add this so that the regulator definitions are correct. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 28 6月, 2013 1 次提交
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由 Rahul Sharma 提交于
This patch renames the combatible strings for hdmi, mixer, ddc and hdmiphy. It follows the convention of using compatible string which represent the SoC in which the IP was added for the first time. Signed-off-by: NRahul Sharma <rahul.sharma@samsung.com> Acked-by: NKukjin Kim <kgene.kim@samsung.com> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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- 27 6月, 2013 5 次提交
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由 Fabio Estevam 提交于
Instead of using a GPIO to turn on/off the CAN transceiver, it is better to use a regulator as some systems may use a PMIC to power the CAN transceiver. Acked-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NMarc Kleine-Budde <mkl@pengutronix.de>
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由 Linus Walleij 提交于
This alters the local side address of the iospace to zero, non prefetchable memory local side address to 0x00000000 and prefetchable memory local side address to 0x10000000, so as to match the values actually poked in by the driver. Reported-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Manjunathappa, Prakash 提交于
function-mask DT property is now a mask for a pin at each pin offset inside a given pincontrol register. Fix DA850 DT data to reflect this change. Signed-off-by: NManjunathappa, Prakash <prakash.pm@ti.com> [nsekhar@ti.com: reword commit message for clarity] Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Jingoo Han 提交于
This patch adds pcie controller node for exynos5440-ssdk5440, and also adds a phandle for pin controller node. Signed-off-by: NJingoo Han <jg1.han@samsung.com> Acked-by: NKukjin Kim <kgene.kim@samsung.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Jingoo Han 提交于
Exynos5440 has two PCIe controllers which can be used as root complex for PCIe interface. Signed-off-by: NJingoo Han <jg1.han@samsung.com> Acked-by: NKukjin Kim <kgene.kim@samsung.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 26 6月, 2013 8 次提交
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Nicolas Ferre 提交于
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Nicolas Ferre 提交于
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Tested-by: NWenyou Yang <wenyou.yang@atmel.com>
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由 Nicolas Ferre 提交于
In previous version of SPI driver we where using different compatibility stings for finding SPI features. We are now using the IP revision information. So we stay with the unique compatibility string for this driver: "atmel,at91rm9200-spi". Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Tested-by: NWenyou Yang <wenyou.yang@atmel.com>
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由 Srinivas Kandagatla 提交于
B2020 ADI board is reference board for STIH415/416 SOCs, it has 2 x UART, 4x USB, 1 x Ethernet, 1 x SATA, 1 x PCIe, and 2GB RAM with standard set-top box IPs. This patch adds initial support to B2020 with STiH415/416 with SBC_UART1 as console and a heard beat LED. Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stephen Gallimore <stephen.gallimore@st.com> CC: Stuart Menefy <stuart.menefy@st.com> CC: Arnd Bergmann <arnd@arndb.de> Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Srinivas Kandagatla 提交于
B2000 board is reference board for STIH415/416 SOCs, it has 2 x UART, 4x USB, 2 x Ethernet, 1 x SATA, 1 x PCIe, and 1GB RAM. This patch add initial support to b2000 with STiH415/416 with UART2 as console and a heard beat LED. Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stephen Gallimore <stephen.gallimore@st.com> CC: Arnd Bergmann <arnd@arndb.de> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Srinivas Kandagatla 提交于
The STiH416 is advanced HD AVC processor with 3D graphics acceleration and 1.2-GHz ARM Cortex-A9 SMP CPU. Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stephen Gallimore <stephen.gallimore@st.com> CC: Stuart Menefy <stuart.menefy@st.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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