- 26 11月, 2014 7 次提交
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由 Andreas Fenkart 提交于
omap_hsmmc only supports one slot. So slot id is always zero, and slot id was never used in the callbacks anyway Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NAndreas Fenkart <afenkart@gmail.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Andreas Fenkart 提交于
omap_hsmmc supports only one slot per controller, see OMAP_MMC_MAX_SLOTS. This unnecessary indirection leads to confusion in the omap_hsmmc driver. For example the card_detect callback is not installed by platform code but from the driver probe function. So it should be a field of omap_hsmmc_host. But since it is declared under the platform slot while the drivers struct omap_hsmmc_host has no slot abstraction, this looks like a bug, especially when not familiar that this driver only supports 1 slot anyway. Either we should add a slot abstraction to omap_hsmmc_host or remove it from the platform data struct. Removed since slot multiplexing is an un-implemented feature Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NAndreas Fenkart <afenkart@gmail.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Andreas Fenkart 提交于
trigger of this callback has been removed in 0a82e06eAcked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NAndreas Fenkart <afenkart@gmail.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Andreas Fenkart 提交于
these fields are never read, probably an unimplemented feature or superseded by pm_runtime Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NAndreas Fenkart <afenkart@gmail.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Andreas Fenkart 提交于
platform data is built from omap2_hsmmc_info, remove all fields that are never set in omap_hsmmc_info, hence never copied to platform data. Note that the omap_hsmmc driver is not affected by this patch those fields were completely unused. Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NAndreas Fenkart <afenkart@gmail.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Andreas Fenkart 提交于
- omap mmc driver supports multiplexing, omap_mmc_hs doesn't this leads to one of the major confusions in the omap_hsmmc driver - platform data should be read-only for the driver most callbacks are not set by the omap3 platform init code while still required. So they are set from the driver probe function, which is against the paradigm that platform-data should not be modified by the driver typical examples are card_detect, read_only callbacks un-bundling by searching for driver name \"omap_hsmmc in the arch/arm folder. omap_hsmmc_platform_data is not initialized directly, but from omap2_hsmmc_info, which is defined in a separate header file not touched by this patch hwmod includes platform headers to declare features of the platform. All the declared features are prefixed OMAP_HSMMC. There is no need to include platform header from hwmod other except for feature defines Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NAndreas Fenkart <afenkart@gmail.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Andreas Fenkart 提交于
Only a few files really need that platform header. When later splitting omap_mmc_platform_data into omap_mmc and omap_mmc_hs, those files declaring an hs mmc platform data will have to change the platform include, which is a good sanity check. Also removing omap242x_init_mmc, which is not used anywhere, checked with grep. Signed-off-by: NAndreas Fenkart <afenkart@gmail.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 10 11月, 2014 1 次提交
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由 Alexandre Belloni 提交于
Use the generic platform_data header file instead of mach/atmel-mci.h Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 09 11月, 2014 1 次提交
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由 Andreas Färber 提交于
The Parallella board comes with a U-Boot bootloader that loads one of two predefined FPGA bitstreams before booting the kernel. Both define an AXI interface to the on-board Epiphany processor. Enable clocks FCLK0..FCLK3 for the Programmable Logic by default. Otherwise accessing, e.g., the ESYSRESET register freezes the board, as seen with the Epiphany SDK tools e-reset and e-hw-rev, using /dev/mem. Cc: <stable@vger.kernel.org> # 3.17.x Signed-off-by: NAndreas Färber <afaerber@suse.de> Acked-by: NMichal Simek <michal.simek@xilinx.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 06 11月, 2014 2 次提交
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由 Arnd Bergmann 提交于
The horrible split between the low-level part of the edma support and the dmaengine front-end driver causes problems on multiplatform kernels. This is an attempt to improve the situation slightly by only registering the dmaengine devices that are actually present. Signed-off-by: NArnd Bergmann <arnd@arndb.de> [olof: add missing include of linux/dma-mapping.h] Signed-off-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Olof Johansson 提交于
Driver has been there since a while back, but the dts never seems to have been updated with the node (nor pinctrl). Do so now. Cc: Matt Porter <mporter@linaro.org> Acked-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NStefan Agner <stefan@agner.ch> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 04 11月, 2014 2 次提交
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由 Fabio Estevam 提交于
Since 64546e9f ("ARM: imx_v6_v7_defconfig updates") and commit 0650f855 ("ARM: imx_v4_v5_defconfig: Select CONFIG_IMX_WEIM") CONFIG_SPI selection was dropped by savedefconfig for imx_v4_v5_defconfig and imx_v6_v7_defconfig. In order to keep the same behaviour as previous kernel versions and avoid regressions, let's add CONFIG_SPI option back. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Stefan Agner 提交于
So far, the required PLL's (PLL1/PLL2/PLL5) have been initialized by boot loader and the kernel code defined fixed rates according to those default configurations. Beginning with the USB PLL7 the code started to initialize the PLL's itself (using imx_clk_pllv3). However, since commit dc4805c2 (ARM: imx: remove ENABLE and BYPASS bits from clk-pllv3 driver) imx_clk_pllv3 no longer takes care of the ENABLE and BYPASS bits, hence the USB PLL were not configured correctly anymore. This patch not only fixes those USB PLL's, but also makes use of the imx_clk_pllv3 for all PLL's and alignes the code with the PLL support of the i.MX6 series. Signed-off-by: NStefan Agner <stefan@agner.ch> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 01 11月, 2014 1 次提交
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由 Tony Lindgren 提交于
With legacy booting, the platform init code was taking care of the configuring of GPIOs. With device tree based booting, things may or may not work depending what bootloader has configured or if the legacy platform code gets called. Let's add support for the pwrdn and reset GPIOs to the smc91x driver to fix the issues of smc91x not working properly when booted in device tree mode. And let's change n900 to use these settings as some versions of the bootloader do not configure things properly causing errors. Reported-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 30 10月, 2014 5 次提交
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由 Tony Lindgren 提交于
We're moving omaps to use device tree based booting and already have omap2, omap4, omap5, am335x and am437x booting in device tree only mode. Only omap3 still has legacy booting still around and we really want to make that device tree only. So let's add a warning about deprecated legacy booting so we get people to upgrade their boards to use device tree based booting and find out about any remaining issues. Note that for most boards we already have the .dts file and those can be booted with without changing the bootloader using the appended DTB mode. Acked-By: NSebastian Reichel <sre@kernel.org> Reviewed-by: NAaro Koskinen <aaro.koskinen@iki.fi> Reviewed-by: NJavier Martinez Canillas <javier@dowhile0.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Looks like we need to have BCH enabled to get NAND working and to avoid getting: nand: error: CONFIG_MTD_NAND_ECC_BCH not enabled Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Thomas Petazzoni 提交于
Since CONFIG_HIGHMEM got enabled on ARMv5 Kirkwood, we have noticed a very significant drop in networking performance. The test were conducted on an OpenBlocks A7 board. Without this patch, the outgoing performance measured with iperf are: - highmem OFF, TSO OFF 544 Mbit/s - highmem OFF, TSO ON 942 Mbit/s - highmem ON, TSO OFF 306 Mbit/s - highmem ON, TSO ON 246 Mbit/s On this Kirkwood platform, the L2 cache is a Feroceon cache, and with this cache, all the range operations have to be done on virtual addresses and not physical addresses. Therefore, whenever CONFIG_HIGHMEM is enabled, the cache maintenance operations call kmap_atomic_pfn() and kunmap_atomic(). However, kmap_atomic_pfn() does not implement the same fast path for non-highmem pages as the one implemented in kmap_atomic(), and this is one of the reason for the performance drop. While this patch does not fully restore the performances, it clearly improves them a lot: without patch with patch - highmem ON, TSO OFF 306 Mbit/s 387 Mbit/s - highmem ON, TSO ON 246 Mbit/s 434 Mbit/s We're still far from the !CONFIG_HIGHMEM performances, but it does improve a bit the situation. Thanks a lot to Ezequiel Garcia and Gregory Clement for all the testing work around this topic. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Fabio Estevam 提交于
Russell King suggested [1]: "I'd ask for one change. Please make all these messages start with "L2C-310 OF" not "PL310 OF:". The device is described in ARM documentation as a L2C-310 not PL310. (Also note the : is dropped too - most of the other messages don't have the : either.) The: "PL310 OF: cache setting yield illegal associativity PL310 OF: -1073346556 calculated, only 8 and 16 legal" message could also be changed to something like: "L2C-310 OF cache associativity %d invalid, only 8 or 16 permittedn" [1] http://www.spinics.net/lists/arm-kernel/msg372776.htmlSigned-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Laura Abbott 提交于
Commit 513510dd (common: dma-mapping: introduce common remapping functions) managed to end up with an extra return statement from the original patch. Drop it. Signed-off-by: NLaura Abbott <lauraa@codeaurora.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 29 10月, 2014 4 次提交
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由 Fabio Estevam 提交于
Since commit f3354ab6 ("ARM: 8169/1: l2c: parse cache properties from ePAPR definitions") the following error is seen on imx6q: [ 0.000000] PL310 OF: cache setting yield illegal associativity [ 0.000000] PL310 OF: -2147097556 calculated, only 8 and 16 legal As imx6q does not pass the "cache-size" and "cache-sets" properties in DT, the function l2x0_cache_size_of_parse() returns early and keep the 'associativity' pointer uninitialized. To fix this problem, return error codes inside l2x0_cache_size_of_parse() and only use the 'associativity' pointer result if l2x0_cache_size_of_parse() succeeds. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Srinivas Kandagatla 提交于
This patch enables configs required to boot IFC6540 board with atleast a serial console. Without this patch there is no serial console. Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Stefan Hengelein 提交于
When arch/arm/mach-ixp4xx/common-pci.c is compiled, two warnings occur: arch/arm/mach-ixp4xx/include/mach/io.h:144: warning: passing argument 1 of '__raw_readb' makes pointer from integer without a cast arch/arm/mach-ixp4xx/include/mach/io.h:79: warning: passing argument 2 of '__raw_writeb' makes pointer from integer without a cast Both functions expect an 'volatile void __iomem *' but get an u32. The 'u32 addr' variable is initialized with the address of an 'volatile void __iomem *' pointer. Passing the pointer directly, avoids the warning and semantics are preserved. This warning was found with vampyr. Signed-off-by: NStefan Hengelein <stefan.hengelein@fau.de> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 28 10月, 2014 1 次提交
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由 Tony Lindgren 提交于
Commit 673ce00c (ARM: omap2plus_defconfig: Add support for distros with systemd) caused considerable bloat as noted by Paul Walmsley <paul@pwsan.com>. Let's fix this issue by making what we can into loadable modules for the systemd options. That's only IPV6 and AUTOFS4_FS it seems, and IPv6 defaults to a loadable module. Reported-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 25 10月, 2014 3 次提交
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由 Fabio Estevam 提交于
Commit 78b81f46 ("ARM: dts: imx28-evk: Run I2C0 at 400kHz") caused issues when doing the following sequence in loop: - Boot the kernel - Perform audio playback - Reboot the system via 'reboot' command In many times the audio card cannot be probed, which causes playback to fail. After restoring to the original i2c0 frequency of 100kHz there is no such problem anymore. This reverts commit 78b81f46. Cc: <stable@vger.kernel.org> # 3.16+ Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Steve Longerbeam 提交于
Fix a typo error, the "emi" names refer to the eim clocks. The change fixes typo in EIM and EIM_SLOW pre-output dividers and selectors clock names. Notably EIM_SLOW clock itself is named correctly. Signed-off-by: NSteve Longerbeam <steve_longerbeam@mentor.com> [vladimir_zapolskiy@mentor.com: ported to v3.17] Signed-off-by: NVladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Cc: Sascha Hauer <kernel@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Dinh Nguyen 提交于
Clean up the socfpga_defconfig file by doing: make socfpga_defconfig make make savedefconfig Then add the following to socfpga_defconfig: CONFIG_SIGNALFD=y CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_SRAM=y CONFIG_DEVTMPFS_MOUNT=y CONFIG_CONFIGFS_FS=y CONFIG_PMBUS=y CONFIG_SENSORS_PMBUS=y CONFIG_SENSORS_LTC2978=y CONFIG_SENSORS_LTC2978_REGULATOR=y CONFIG_PRINTK_TIME=y CONFIG_EXT4_FS=y Signed-off-by: NThor Thayer <tthayer@opensource.altera.com> Signed-off-by: NSteffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: NAlan Tull <atull@opensource.altera.com> Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com>
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- 24 10月, 2014 2 次提交
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由 Olof Johansson 提交于
Allows booting from SD/MMC on RK3288 and other platforms. Added here so I can enable the board in the boot farm. Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Olof Johansson 提交于
I missed in 9a2ad529 that REGULATOR_FIXED_VOLTAGE had also gotten deselected, so it needs to be added back as an explicit option. Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 23 10月, 2014 3 次提交
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由 Dinh Nguyen 提交于
Without the 3.3V regulator node, the SDMMC driver will give these warnings: dw_mmc ff704000.dwmmc0: No vmmc regulator found dw_mmc ff704000.dwmmc0: No vqmmc regulator found This patch adds the regulator node, and points the SD/MMC to the regulator. Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com> Reviewed-by: NDoug Anderson <dianders@chromium.org> --- v3: Rename nodes to have schematic-name_regulator and remove "boot-on" and "always-on" v2: Move the regulator nodes to their respective board dts file and correctly rename them to match the schematic
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由 Dinh Nguyen 提交于
Without this patch, the booting the SOCFPGA platform would hang at the SDMMC driver loading. The issue, debugged by Doug Anderson, turned out to be that the GPIO bank used by the SD card-detect was not set to status="okay". Also update the cd-gpios to point to portb of the &gpio1 GPIO IP. Suggested-by: NDoug Anderson <dianders@chromium.org> Reviewed-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com> --- v4: Use &gpio1 to set status="okay" and update cd-gpio=&portb v3: Correctly degugged the issue to be a gpio node not having status="okay"
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由 Dinh Nguyen 提交于
Since the Synopsys GPIO IP can support multiple ports of varying widths, it would make more sense to have the GPIO node DTS entry as this: gpio0: gpio@ff708000{ porta{ }; }; Also, this is documented in the snps-dwapb-gpio.txt. Suggested-by: NDoug Anderson <dianders@chromium.org> Reviewed-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com>
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- 22 10月, 2014 2 次提交
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由 Boris Brezillon 提交于
PLLB input and output ranges were wrongly copied from at91sam9261 as the datasheet didn't mention explicitly PLLB. Correct their values. This fixes USB. Reported-by: NAndreas Henriksson <andreas.henriksson@endian.se> Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Acked-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Tested-by: NAndreas Henriksson <andreas.henriksson@endian.se> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Dinh Nguyen 提交于
When CPU1 is brought out of reset, it's MMU is not turned on yet, so it will only be able to use physical addresses. For systems with that have the MMU page configured for 0xC0000000, 0x80000000, or 0x40000000 "BIC 0x40000000" will work just fine, as it was just converting the virtual address of &cpu1start_addr into a physical address, ie. 0xC0000000 became 0x80000000. So for systems where the SDRAM controller was able to do a wrap-around access, this was working fine, as it was just dropping the MSB, but for systems where out of bounds memory access is not allowed, this would not allow CPU1 to correctly fetch &cpu1start_addr. This patch fixes the secondary_trampoline code to correctly fetch the physical address of cpu1start_addr directly. The patch will subtract the correct PAGE_OFFSET from &cpu1start_addr. And since on this platform, the physical memory will always start at 0x0, subtracting PAGE_OFFSET from &cpu1start_addr will allow CPU1 to correctly fetch the value of cpu1start_addr. While at it, change the name of cpu1start_addr to socfpga_cpu1start_addr to avoid any future naming collisions for multiplatform image. Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com> --- v4: Updated commit log to correctly lay out the usage of PAGE_OFFSET and add comments to the same effect. v3: Used PAGE_OFFSET to get the physical address v2: Correctly get the physical address instead of just a BIC hack.
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- 21 10月, 2014 3 次提交
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由 Russell King 提交于
GCC 4.9 complains if we take the difference of two pointers, and it's printed with "%d". Fix this by using the proper flag - "t" for ptrdiff_t. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Robert Jarzmik 提交于
The commit 2111667b ("ARM: pxa: call debug_ll_io_init for earlyprintk") triggers in the current kernel the attached backtrace on PXA/tosa early in the boot time when DEBUG_LL is enabled. It is due to overlap between uart virtual memory defined in DEBUG_UART_VIRT and mapped by debug_ll_io_init() and peripheral bus mapped by pxa_map_io at the same address, 0xf2100000. As hinted by Arnd, map early virtual memory for low level debug on address 0xf6200000, even if that means 2 virtual mappings will give access to the pxa internal UARTs (FFUART, BTUART, STUART, ...). ------------[ cut here ]------------ kernel BUG at /home/lumag/linux/mm/vmalloc.c:1143! Internal error: Oops - BUG: 0 [#1] PREEMPT ARM Modules linked in: CPU: 0 PID: 0 Comm: swapper Not tainted 3.17.0-00032-g8e0d202-dirty #23 task: c062a5a8 ti: c0620000 task.ti: c0620000 PC is at vm_area_add_early+0x54/0x84 LR is at add_static_vm_early+0xc/0x60 pc : [<c03e1100>] lr : [<c03d9ef4>] psr: 800001d3 sp : c0621f04 ip : c03efa74 fp : c03edf84 r10: c0637e98 r9 : 40000001 r8 : c03da57c r7 : c3ffcfb0 r6 : 00000000 r5 : c3ffcfb0 r4 : 02000000 r3 : c3ffcfd8 r2 : f2100000 r1 : f4000000 r0 : c3ffcfb0 Flags: Nzcv IRQs off FIQs off Mode SVC_32 ISA ARM Segment kernel Control: 00007977 Table: a0004000 DAC: 00000017 Process swapper (pid: 0, stack limit = 0xc06201c8) Stack: (0xc0621f04 to 0xc0622000) 1f00: c3ffcfd8 40000001 c3ffcfd8 c03ee08c c03da570 c03db90c c0637d24 1f20: 00000000 c03ec7cc c066e654 a0700000 000a0700 c03db914 c03db90c c03daf84 1f40: 00000000 000a0000 c0000000 c03ec7cc 000a0700 c0700000 ffff1000 000a3fff 1f60: 00001000 00000007 00000000 c03ec7cc c0008000 c03ed748 c0621fd4 c03d5d18 1f80: 69052d00 a03ec48c 00000000 c03d8ad0 0000006c 00007977 c036c6e8 00000001 1fa0: c0621fd4 c03ed744 c0628000 a0004000 69052d00 a03ec48c 00000000 c03d68d4 1fc0: 00000000 00000000 00000000 00000000 00000000 c03ed748 c0649894 c062801c 1fe0: c03ed744 c062b2f0 a0004000 69052d00 a03ec48c a0008040 00000000 00000000 [<c03e1100>] (vm_area_add_early) from [<c03d9ef4>] (add_static_vm_early+0xc/0x60) [<c03d9ef4>] (add_static_vm_early) from [<c03da570>] (iotable_init.part.6+0xa8/0xb4) [<c03da570>] (iotable_init.part.6) from [<c03db914>] (pxa25x_map_io+0x8/0x24) [<c03db914>] (pxa25x_map_io) from [<c03daf84>] (paging_init+0x744/0x8d8) [<c03daf84>] (paging_init) from [<c03d8ad0>] (setup_arch+0x354/0x608) [<c03d8ad0>] (setup_arch) from [<c03d68d4>] (start_kernel+0xa8/0x3dc) [<c03d68d4>] (start_kernel) from [<a0008040>] (0xa0008040) Code: e5904008 e0811004 e1520001 2a000005 (e7f001f2) ---[ end trace f24b6c88ae00fa9a ]--- Kernel panic - not syncing: Attempted to kill the idle task! ---[ end Kernel panic - not syncing: Attempted to kill the idle task! Cc: <stable@vger.kernel.org> Reported-by: NDmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr> Acked-by: NArnd Bergmann <arnd@arndb.de>
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由 Carlo Caione 提交于
Update the multi_v7_defconfig enabling the watchdog driver for Meson SoCs. Signed-off-by: NCarlo Caione <carlo@caione.org> Reviewed-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NWim Van Sebroeck <wim@iguana.be>
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- 20 10月, 2014 3 次提交
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由 Michal Simek 提交于
sed -i 's/}\ ;/};/g' Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Add the cadence watchdog node to the Zynq devicetree. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Add missing reference for memory-controller. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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