1. 17 9月, 2012 2 次提交
  2. 11 9月, 2012 2 次提交
  3. 09 9月, 2012 1 次提交
  4. 04 9月, 2012 1 次提交
  5. 03 9月, 2012 2 次提交
  6. 24 8月, 2012 2 次提交
  7. 23 8月, 2012 2 次提交
  8. 21 8月, 2012 1 次提交
    • D
      drm/i915: use hsw rps tuning values everywhere on gen6+ · 1ee9ae32
      Daniel Vetter 提交于
      James Bottomley reported [1] a massive power regression, due to the
      enabling of semaphores by default in 3.5. A workaround for him is to
      again disable semaphores. And indeed, his system has a very hard time
      to enter rc6 with semaphores enabled.
      
      Ben Widawsky run around with a kill-a-watt a lot and noticed:
      - There are indeed a few rare systems that seem to have a hard time
        entering rc6 when desktop-idle.
      - One machine, The Indestructible Toshiba regressed in this behaviour
        between 3.5 and 3.6 in a merge commit! So rc6 behaviour with the
        current setting seems to be highly timing dependent and not robust
        at all.
      - The behaviour James reported wrt semaphores seems to be a freak
        timing thing that only happens on his specific machine, confirming
        that enabling semaphores shouldn't reduce rc6 residency.
      
      Now furthermore the Google ChromeOS guys reported [2] a while ago that
      at least on some machines a simply a blinking cursor can keep the gpu
      turbo at the highest frequency. This is because the current rps limits
      used on snb/ivb are highly asymmetric.
      
      On the theory that gpu turbo and rc6 tuning values are related, we've
      tried whether the much saner looking (since much less asymmetric) rps
      tuning values used for hsw would also help entering rc6 more robustly.
      
      And it seems to mostly work, and we don't really have the resources to
      through-roughly tune things in any better way: The values from the
      ChromeOS ppl seem to fare a bit worse for James' machine, so I guess
      we better stick with something vpg (the gpu hw/windows group)
      provided, hoping that they've done their jobs.
      
      Reference[1]: http://lists.freedesktop.org/archives/dri-devel/2012-July/025675.html
      Reference[2]: http://lists.freedesktop.org/archives/intel-gfx/2012-July/018692.html
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=53393Tested-by: NBen Widawsky <ben@bwidawsk.net>
      Cc: stable@vger.kernel.org
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      1ee9ae32
  9. 17 8月, 2012 5 次提交
  10. 14 8月, 2012 3 次提交
    • C
      drm/i915: Apply post-sync write for pipe control invalidates · 7d54a904
      Chris Wilson 提交于
      When invalidating the TLBs it is documentated as requiring a post-sync
      write. Failure to do so seems to result in a GPU hang.
      
      Exposure to this hang on IVB seems to be a result of removing the extra
      stalls required for SNB pipecontrol workarounds:
      
      commit 6c6cf5aa
      Author: Chris Wilson <chris@chris-wilson.co.uk>
      Date:   Fri Jul 20 18:02:28 2012 +0100
      
          drm/i915: Only apply the SNB pipe control w/a to gen6
      
      Note: Manually switch the pipe_control cmd to 4 dwords to avoid a
      (silent) functional conflict with -next. This way will get a loud (but
      conflict with next (since the scratch_addr has been deleted there).
      
      Reported-and-tested-by: yex.tian@intel.com
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=53322Acked-by: NBen Widawsky <ben@bwidawsk.net>
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      [danvet: added note about merge conflict with -next.]
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      7d54a904
    • D
      drm/i915: reorder edp disabling to fix ivb MacBook Air · 35a38556
      Daniel Vetter 提交于
      eDP is tons of fun. It turns out that at least the new MacBook Air 5,1
      model absolutely doesn't like the new force vdd dance we've introduced
      in
      
      commit 6cb49835
      Author: Daniel Vetter <daniel.vetter@ffwll.ch>
      Date:   Sun May 20 17:14:50 2012 +0200
      
          drm/i915: enable vdd when switching off the eDP panel
      
      But that patch also tried to fix some neat edp sequence issue with the
      force_vdd timings. Closer inspection reveals that we've raised
      force_vdd only to do the aux channel communication dp_sink_dpms. If we
      move the edp_panel_off below that, we don't need any force_vdd for the
      disable sequence, which makes the Air happy.
      
      Unfortunately the reporter of the original bug that the above commit
      fixed is travelling, so we can't test whether this regresses things.
      But my theory is that since we don't check for any power-off ->
      force_vdd-on delays in edp_panel_vdd_on, this was the actual
      root-cause of this failure. With that force_vdd dance completely
      eliminated, I'm hopeful the original bug stays fixed, too.
      
      For reference the old bug, which hopefully doesn't get broken by this:
      
      https://bugzilla.kernel.org/show_bug.cgi?id=43163
      
      In any case, regression fixers win over plain bugfixes, so this needs
      to go in asap.
      
      v2: The crucial pieces seems to be to clear the force_vdd flag
      uncoditionally, too, in edp_panel_off. Looks like this is left behind
      by the firmware somehow.
      
      v3: The Apple firmware seems to switch off the panel on it's own, hence
      we still need to keep force_vdd on, but properly clear it when switching
      the panel off.
      
      Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=45671Tested-by: NRoberto Romer <sildurin@gmail.com>
      Tested-by: NDaniel Wagner <wagi@monom.org>
      Tested-by: NKeith Packard <keithp@keithp.com>
      Cc: stable@vger.kernel.org
      Cc: Keith Packard <keithp@keithp.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      35a38556
    • J
      drm/i915: ensure i2c adapter is all set before adding it · cee25168
      Jani Nikula 提交于
      i2c_add_adapter() may do i2c transfers on the bus to detect supported
      devices. Therefore the adapter needs to be all set before adding it. This
      was not the case for the bit-banging fallback, resulting in an oops if the
      device detection GMBUS transfers timed out. Fix the issue by calling
      i2c_add_adapter() only after intel_gpio_setup().
      
      LKML-Reference: <5021F00B.7000503@ionic.de>
      Tested-by: NMihai Moldovan <ionic@ionic.de>
      Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      cee25168
  11. 12 8月, 2012 2 次提交
    • D
      drm/i915: ignore eDP bpc settings from vbt · 4344b813
      Daniel Vetter 提交于
      This has originally been introduced to not oversubscribe the dp links
      in
      
      commit 885a5fb5
      Author: Zhenyu Wang <zhenyuw@linux.intel.com>
      Date:   Tue Jan 12 05:38:31 2010 +0800
      
          drm/i915: fix pixel color depth setting on eDP
      
      Since then we've fixed up the dp link bandwidth calculation code and
      should now automatically fall back to 6bpc dithering. So this is
      unnecessary.
      
      Furthermore it seems to break the new MacbookPro with retina display,
      hence let's just rip this out.
      Reported-by: NBenoit Gschwind <gschwind@gnu-log.net>
      Cc: Benoit Gschwind <gschwind@gnu-log.net>
      Cc: Francois Rigaut <frigaut@gmail.com>
      Cc: Greg KH <gregkh@linuxfoundation.org>
      Cc: stable@vger.kernel.org
      Tested-by: NBenoit Gschwind <gschwind@gnu-log.net>
      Tested-by: Bernhard Froemel <froemel at vmars tuwien.ac.at>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      
      --
      
      Testing feedback highgly welcome, and thanks for Benoit for finding
      out that the bpc computations are busted.
      -Daniel
      4344b813
    • T
      drm/i915: Fix blank panel at reopening lid · 770c1231
      Takashi Iwai 提交于
      When you reopen the lid on a laptop with PCH, the panel suddenly goes
      blank sometimes.  It seems because BLC_PWM_CPU_CTL register is cleared
      to zero when BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1 registers are
      enabled.
      
      This patch fixes the problem by moving the call of the function setting
      BLC_PWM_CPU_CTL after enabling other two registers.
      Reported-and-tested-by: NHugh Dickins <hughd@google.com>
      Signed-off-by: NTakashi Iwai <tiwai@suse.de>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      770c1231
  12. 08 8月, 2012 1 次提交
  13. 07 8月, 2012 2 次提交
  14. 06 8月, 2012 5 次提交
  15. 27 7月, 2012 1 次提交
    • D
      drm/i915: fix forcewake related hangs on snb · 6af2d180
      Daniel Vetter 提交于
      ... by adding seemingly redudant posting reads.
      
      This little dragon lair exploded the first time around when we've
      refactored the code a bit to use the common wait_for_atomic_us in
      "drm/i915: Group the GT routines together in both code and vtable",
      which caused QA to file fdo bug #51738.
      
      Chris Wilson entertained a few approaches to fixing #51738: Replacing
      the udelay(1) with the previously-used udelay(10) (or any other
      "sufficiently larger" delay), adding a posting read, or ditching the
      delay completely and using cpu_relax. We went with the cpu_relax and
      "915: Workaround hang with BSD and forcewake on SandyBridge". Which
      blew up in fdo bug #52424, but adding the posting read while still
      using cpu_relax seems to also fix that, it looks like the
      posting read is the important ingriedient to fix these rc6 related
      hangs on snb.
      
      Popular theories as to why this is like it is include:
      - A herd of pink elephants got royally angered somehow.
      
      - The gpu has internally different functional units and judging by the
        register offsets, the forcewake request register and the forcewake
        ack registers are _not_ in the same functional unit (or at least
        aren't reached through the same routes). Hence the posting read
        syncs up with the wrong block and gets the entire gpu confused.
      
      - ...
      
      As a minimal ducttape fix for 3.6, let's just put these posting reads
      into place again. We can try fancier approaches (like adding back the
      cpu_relax instead of the udelay) in -next.
      
      This (re-)fixes a regression introduced in
      
      commit 990bbdad
      Author: Chris Wilson <chris@chris-wilson.co.uk>
      Date:   Mon Jul 2 11:51:02 2012 -0300
      
          drm/i915: Group the GT routines together in both code and vtable
      
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Tested-by: NChris Wilson <chris@chris-wilson.co.uk>
      Tested-by: NDu Yan <yanx.du@intel.com>
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=52424
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=51738uSigned-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      6af2d180
  16. 26 7月, 2012 3 次提交
  17. 25 7月, 2012 5 次提交