- 03 1月, 2020 1 次提交
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由 Arnd Bergmann 提交于
The ata_sas_scsi_ioctl() function implements a number of HDIO_* commands for SCSI devices, it is used by all libata drivers as well as a few drivers that support SAS attached SATA drives. The only command that is not safe for compat ioctls here is HDIO_GET_32BIT. Change the implementation to check for in_compat_syscall() in order to do both cases correctly, and change all callers to use it as both native and compat callback pointers, including the indirect callers through sas_ioctl and ata_scsi_ioctl. Reviewed-by: NBen Hutchings <ben.hutchings@codethink.co.uk> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 13 11月, 2019 2 次提交
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由 Xiang Chen 提交于
Currently we call function hisi_sas_debugfs_exit() to remove debugfs_dir before freeing interrupt irqs and destroying workqueue in the driver remove path. If a dump is triggered before function hisi_sas_debugfs_exit() but debugfs_work may be called after it, so it may refer to already removed debugfs_dir which will cause NULL pointer dereference. To avoid it, put function hisi_sas_debugfs_exit() after free_irqs and destroy workqueue when removing hisi_sas driver. Link: https://lore.kernel.org/r/1573551059-107873-4-git-send-email-john.garry@huawei.comSigned-off-by: NXiang Chen <chenxiang66@hisilicon.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Xiang Chen 提交于
Need to return directly if init hardware failed. Fixes: 73a4925d ("scsi: hisi_sas: Update all the registers after suspend and resume") Link: https://lore.kernel.org/r/1573551059-107873-3-git-send-email-john.garry@huawei.comSigned-off-by: NXiang Chen <chenxiang66@hisilicon.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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- 25 10月, 2019 4 次提交
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由 Luo Jiaxing 提交于
The number of phy down reflects the quality of the link between SAS controller and disk. In order to allow the user to confirm the link quality of the system, we record the number of phy down for each phy. The user can check the current phy down count by reading the debugfs file corresponding to the specific phy, or clear the phy down count by writing 0 to the debugfs file. Link: https://lore.kernel.org/r/1571926105-74636-19-git-send-email-john.garry@huawei.comSigned-off-by: NLuo Jiaxing <luojiaxing@huawei.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Luo Jiaxing 提交于
Although if the debugfs initialization fails, we will delete the debugfs folder of hisi_sas, but we did not consider the scenario where debugfs was successfully initialized, but the probe failed for other reasons. We found out that hisi_sas folder is still remain after the probe failed. When probe fail, we should delete debugfs folder to avoid the above issue. Link: https://lore.kernel.org/r/1571926105-74636-18-git-send-email-john.garry@huawei.comSigned-off-by: NLuo Jiaxing <luojiaxing@huawei.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Xiang Chen 提交于
When injecting 2bit ecc errors, it will cause confusion inside SAS controller which needs host reset to recover it. If a device is gone at the same times inject 2bit ecc errors, we may not receive the ITCT interrupt so it will wait for completion in clear_itct_v3_hw() all the time. And host reset will also not occur because it can't require hisi_hba->sem, so the system will be suspended. To solve the issue, use wait_for_completion_timeout() instead of wait_for_completion(), and also don't mark the gone device as SAS_PHY_UNUSED when device gone. Link: https://lore.kernel.org/r/1571926105-74636-4-git-send-email-john.garry@huawei.comSigned-off-by: NXiang Chen <chenxiang66@hisilicon.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Xiang Chen 提交于
If set the BIST init value after enabling BIST, there may be still some few error bits. According to the process, need to set the BIST init value before enabling BIST. Fixes: 97b151e7 ("scsi: hisi_sas: Add BIST support for phy loopback") Link: https://lore.kernel.org/r/1571926105-74636-3-git-send-email-john.garry@huawei.comSigned-off-by: NXiang Chen <chenxiang66@hisilicon.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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- 11 9月, 2019 5 次提交
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由 Xiang Chen 提交于
Add BIST (built in self test) support for phy loopback. Through the new debugfs interface, the user can configure loopback mode/linkrate/phy id/code mode before enabling it. And also user can enable/disable BIST function. Link: https://lore.kernel.org/r/1567774537-20003-13-git-send-email-john.garry@huawei.comSigned-off-by: NXiang Chen <chenxiang66@hisilicon.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Luo Jiaxing 提交于
Some function arguments are unused, so remove them. Also move the timeout print in for wait_cmds_complete_timeout_vX_hw() callsites into that same function. Link: https://lore.kernel.org/r/1567774537-20003-11-git-send-email-john.garry@huawei.comSigned-off-by: NLuo Jiaxing <luojiaxing@huawei.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Luo Jiaxing 提交于
We never call hisi_sas_hw.slot_complete, so remove it. Link: https://lore.kernel.org/r/1567774537-20003-9-git-send-email-john.garry@huawei.comSigned-off-by: NLuo Jiaxing <luojiaxing@huawei.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Xiang Chen 提交于
Currently the NCQ tag is only assigned for FPDMA READ and FPDMA WRITE commands, and for other NCQ commands (such as FPDMA SEND), their NCQ tags are set in the delivery command to 0. So for all the NCQ commands, we also need to assign normal NCQ tag for them, so drop the command type check in hisi_sas_get_ncq_tag() [drop hisi_sas_get_ncq_tag() altogether actually], and always use the ATA command NCQ tag when appropriate. Link: https://lore.kernel.org/r/1567774537-20003-8-git-send-email-john.garry@huawei.comSigned-off-by: NXiang Chen <chenxiang66@hisilicon.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Xiang Chen 提交于
After suspend and resume, the HW registers will be set back to their initial value. We use init_reg_v3_hw() to set some registers, but some registers are set via firmware in ACPI "_RST" method, so add reset handler before init_reg_v3_hw(). Link: https://lore.kernel.org/r/1567774537-20003-7-git-send-email-john.garry@huawei.comSigned-off-by: NXiang Chen <chenxiang66@hisilicon.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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- 08 8月, 2019 9 次提交
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由 Xiang Chen 提交于
The format specifier "%p" can leak kernel address, and use "%pK" instead. Signed-off-by: NXiang Chen <chenxiang66@hisilicon.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Xiang Chen 提交于
Remove some unnecessary code, including: - Explicit zeroing of memory allocated for dmam_alloc_coherent() - Some duplicated code - Some redundant masking Signed-off-by: NXiang Chen <chenxiang66@hisilicon.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Xiang Chen 提交于
It will free irq automatically if devm_request_irq() failed, so drop free_irq() if devm_request_irq() failed. Signed-off-by: NXiang Chen <chenxiang66@hisilicon.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 John Garry 提交于
The SMP frame response is written to the command table and not the SMP response pointer from libsas, so don't bother DMA mapping (and unmapping) the SMP response from libsas. Suggested-by: NXiang Chen <chenxiang66@hisilicon.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 John Garry 提交于
The call to kmap_atomic() in the SMP command completion code is unnecessary, since kmap() is only really concerned with highmem, which is not relevant on arm64. The controller only finds itself in arm64 systems. Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Luo Jiaxing 提交于
The AXI and RAS register values should also should be snapshot at debugfs. Signed-off-by: NLuo Jiaxing <luojiaxing@huawei.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Luo Jiaxing 提交于
The value of IOST/ITCT is updated to cache first, and then synchronize to DDR periodically. So the value in IOST/ITCT cache is the latest data and it's important for debugging. So, the HW cache of IOST and ITCT should be snapshot at debugfs. Signed-off-by: NLuo Jiaxing <luojiaxing@huawei.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 John Garry 提交于
In commit 1273d65f ("scsi: hisi_sas: change queue depth from 512 to 4096"), the depth of each queue is the same as the max IPTT in the system. As such, as long as we have an IPTT allocated, we will have enough space on any delivery queue. All .get_free_slot functions were checking for space on the queue by reading the DQ read pointer. Drop this, and also raise the code into common code, as there is nothing hw specific remaining. Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 John Garry 提交于
There is a small optimisation to be had by making the max IPTT the same for all hw revisions, that being we can drop the check for read and write pointer being the same in the get free slot function. Change v1 hw to have max IPTT of 4096 - same as v2 and v3 hw - and drop hisi_sas_hw.max_command_entries. Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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- 21 6月, 2019 1 次提交
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由 John Garry 提交于
Many times in libsas, and in LLDDs which use libsas, the check for an expander device is re-implemented or open coded. Use dev_is_expander() instead. We rename this from sas_dev_type_is_expander() to not spill so many lines in referencing. Signed-off-by: NJohn Garry <john.garry@huawei.com> Reviewed-by: NJason Yan <yanaijie@huawei.com> Reviewed-by: NJack Wang <jinpu.wang@cloud.ionos.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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- 19 6月, 2019 4 次提交
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由 Xiang Chen 提交于
For v3 hw, stash is enabled to promote performance, but it does little to improve performance according to current tests. What's more, it causes exceptions for some situations, so disable it. Signed-off-by: NXiang Chen <chenxiang66@hisilicon.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Luo Jiaxing 提交于
Several error codes will be generated between PHY down to up. This issue was introduced by HW design. The designers came to the conclusion that we should ignore these errors. Signed-off-by: NJiaxing Luo <luojiaxing@huawei.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Xiang Chen 提交于
It reports a error as follows from some tools at two places in our code: runtime error: left shift of 4 by 29 places cannot be represented in type 'int' So change the type of the two numbers to unsigned to avoid the error. Signed-off-by: NXiang Chen <chenxiang66@hisilicon.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Xiaofei Tan 提交于
The argument of dev_err() called by multi_bit_ecc_error_process_v3_hw() is not right. We pass two arguments, but there is only one printk format specifier in the string. Also move the print format string to dev_err(). Signed-off-by: NXiaofei Tan <tanxiaofei@huawei.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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- 31 5月, 2019 1 次提交
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由 Thomas Gleixner 提交于
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Reviewed-by: NAllison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.deSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 13 4月, 2019 5 次提交
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由 Xiang Chen 提交于
Do some minor tidy-up. Signed-off-by: NXiang Chen <chenxiang66@hisilicon.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Xiaofei Tan 提交于
This patch is to switch HW all error handling from PCI AER to MSI interrupt due to non-standard PCI implementation. All HW errors which were being reported through PCI AER can be reported through MSI interrupt also. Do two things to complete the switch: 1. Notify FW to switch to MSI handling through ACPI DSM. 2. Add MSI handling for some hw errors, ECC errors and poison errors (we also call some of them AXI reuser error). They were handled only through PCI AER before. For old FW reporting PCI AER events, the PCI AER handler will see that the driver on longer support AER, and will leave the device in offlined state, which is safe. Signed-off-by: NXiaofei Tan <tanxiaofei@huawei.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Xiang Chen 提交于
In commit 8b8d6653 ("scsi: hisi_sas: make SAS address of SATA disks unique"), we ensured that each SATA disk in the system has a unique SAS address, even if it is fake. That was for v2 hw. Add this for v3 hw. Signed-off-by: NXiang Chen <chenxiang66@hisilicon.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 John Garry 提交于
In commit efdcad62 ("scsi: hisi_sas: Set PHY linkrate when disconnected"), we use the sas_phy_data.enable flag to track whether the PHY was enabled or not, so that we know if we should set the PHY negotiated linkrate at SAS_LINK_RATE_UNKNOWN or SAS_PHY_DISABLED. However, it is not proper to use sas_phy_data.enable, since it is only set when libsas attempts to set the PHY disabled/enabled; hence, it may not even have an initial value. As a solution to this problem, introduce hisi_sas_phy.enable to track whether the PHY is enabled or not, so that we can set the negotiated linkrate properly when the PHY comes down. Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Xiang Chen 提交于
Add host reset interface to make it easier for testing the host reset feature. Signed-off-by: NXiang Chen <chenxiang66@hisilicon.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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- 07 3月, 2019 3 次提交
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由 Xiang Chen 提交于
With default value of register SERDES_CFG, the link is not stable for some special disks when running IO. According to HW guys' suggestion, need to make the bit10~19 value of register SERDES_CFG the max value to increase the reliability of the HiLink. Signed-off-by: NXiang Chen <chenxiang66@hisilicon.com> Reviewed-by: NYupeng Zhou <zhouyupeng1@huawei.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Xiaofei Tan 提交于
The later revision of v3 hw has added an function of interrupt coalesce according to time for PHY RX errors. We set the coalesce time to 1s. Then we print PHY RX errors count when PHY RX errors happen, and don't need to worry that there may be too much log prints. Besides, we use hisi_sas_phy.lock to protect error count value. Because we update them by calling phy_get_events_v3_hw(), which is also used by core driver (for get PHY events function). We relocate phy_get_events_v3_hw() to avoid a further declaration. Signed-off-by: NXiaofei Tan <tanxiaofei@huawei.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Xiang Chen 提交于
According to the tool fortify, phy_up_v3_hw() returns signed value, while it should return an unsigned value. So change variable "res" from int to irq_return_t. Signed-off-by: NXiang Chen <chenxiang66@hisilicon.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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- 26 2月, 2019 1 次提交
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由 Hannes Reinecke 提交于
The change to use dma_set_mask_and_coherent() incorrectly made a second call with the 32 bit DMA mask value when the call with the 64 bit DMA mask value succeeded. [mkp: fixed commit message] Fixes: e4db40e7 ("scsi: hisi_sas: use dma_set_mask_and_coherent") Cc: <stable@vger.kernel.org> Suggested-by: NEwan D. Milne <emilne@redhat.com> Signed-off-by: NHannes Reinecke <hare@suse.com> Reviewed-by: NChristoph Hellwig <hch@lst.de> Signed-off-by: NHannes Reinecke <hare@suse.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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- 09 2月, 2019 4 次提交
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由 John Garry 提交于
Do some very minor tidy-up, for things like needlessly initing variable and not leaving whitespace before quote endings. Originally-from: Xiang Chen <chenxiang66@hisilicon.com> Originally-from: Luo Jiaxing <luojiaxing@huawei.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Xiang Chen 提交于
For auto-control irq affinity mode, choose the dq to deliver IO according to the current CPU. Then it decreases the performance regression that fio and CQ interrupts are processed on different node. For user control irq affinity mode, keep it as before. To realize it, also need to distinguish the usage of dq lock and sas_dev lock. We mark as experimental due to ongoing discussion on managed MSI IRQ during hotplug: https://marc.info/?l=linux-scsi&m=154876335707751&w=2 We're almost at the point where we can expose multiple queues to the upper layer for SCSI MQ, but we need to sort out the per-HBA tags performance issue. Signed-off-by: NXiang Chen <chenxiang66@hisilicon.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 John Garry 提交于
To support queue mapped to a CPU, it needs to be ensured that issuing an internal abort is safe, in that it is guaranteed that an internal abort is processed for a single IO or a device after all the relevant command(s) which it is attempting to abort have been processed by the controller. Currently we only deliver commands for any device on a single queue to solve this problem, as we know that commands issued on the same queue will be processed in order, and we will not have a scenario where the internal abort is racing against a command(s) which it is trying to abort. To enqueue commands on queue mapped to a CPU, choosing a queue for an command is based on the associated queue for the current CPU, so this is not safe for internal abort since it would definitely not be guaranteed that commands for the command devices are issued on the same queue. To solve this issue, we take a bludgeoning approach, and issue a separate internal abort on any queue(s) relevant to the command or device, in that we will be guaranteed that at least one of these internal aborts will be received last in the controller. So, for aborting a single command, we can just force the internal abort to be issued on the same queue as the command which we are trying to abort. For aborting all commands associated with a device, we issue a separate internal abort on all relevant queues. Issuing multiple internal aborts in this fashion would have not side affect. Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NXiang Chen <chenxiang66@hisilicon.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Xiang Chen 提交于
This patch adds support for DIX to v3 hw driver. For this, we build upon support for DIF, most significantly is adding new DMA map and unmap paths. Some pre-existing macro precedence issues are also tidied. They were detected by checkpatch --strict. Signed-off-by: NXiang Chen <chenxiang66@hisilicon.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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