1. 25 7月, 2009 1 次提交
    • P
      OMAP2/3 clock: split, rename omap2_wait_clock_ready() · 72350b29
      Paul Walmsley 提交于
      Some OMAP2/3 hardware modules have CM_IDLEST attributes that are not
      handled by the current omap2_wait_clock_ready() code.  In preparation
      for patches that fix the unusual devices, rename the function
      omap2_wait_clock_ready() to omap2_wait_module_ready() and split it
      into three parts:
      
      1. A clkops-specific companion clock return function (by default,
         omap2_clk_dflt_find_companion())
      
      2. A clkops-specific CM_IDLEST register address and bit shift return
         function (by default, omap2_clk_dflt_find_idlest())
      
      3. Code to wait for the CM to indicate that the module is ready
         (omap2_cm_wait_idlest())
      
      Clocks can now specify their own custom find_companion() and find_idlest()
      functions; used in subsequent patches.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      72350b29
  2. 20 2月, 2009 1 次提交
    • R
      [ARM] omap: add support for bypassing DPLLs · c0bf3132
      Russell King 提交于
      This roughly corresponds with OMAP commits: 7d06c48, 3241b19,
      88b5d9b, 18a5500, 9c909ac, 5c6497b, 8b1f0bd, 2ac1da8.
      
      For both OMAP2 and OMAP3, we note the reference and bypass clocks in
      the DPLL data structure.  Whenever we modify the DPLL rate, we first
      ensure that both the reference and bypass clocks are enabled.  Then,
      we decide whether to use the reference and DPLL, or the bypass clock
      if the desired rate is identical to the bypass rate, and program the
      DPLL appropriately.  Finally, we update the clock's parent, and then
      disable the unused clocks.
      
      This keeps the parents correctly balanced, and more importantly ensures
      that the bypass clock is running whenever we reprogram the DPLL.  This
      is especially important because the procedure for reprogramming the DPLL
      involves switching to the bypass clock.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      c0bf3132
  3. 14 2月, 2009 1 次提交
    • R
      [ARM] omap: arrange for clock recalc methods to return the rate · 8b9dbc16
      Russell King 提交于
      linux-omap source commit 33d000c99ee393fe2042f93e8422f94976d276ce
      introduces a way to "dry run" clock changes before they're committed.
      However, this involves putting logic to handle this into each and
      every recalc function, and unfortunately due to the caching, led to
      some bugs.
      
      Solve both of issues by making the recalc methods always return the
      clock rate for the clock, which the caller decides what to do with.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      8b9dbc16
  4. 09 2月, 2009 1 次提交
    • P
      [ARM] OMAP: Fix sparse, checkpatch warnings in OMAP2/3 PRCM/PM code · fecb494b
      Paul Walmsley 提交于
      Fix sparse & checkpatch warnings in OMAP2/3 PRCM & PM code.  This mostly
      consists of:
      
      - converting pointer comparisons to integers in form similar to
        (ptr == 0) to the standard idiom (!ptr)
      
      - labeling a few non-static private functions as static
      
      - adding prototypes for *_init() functions in the appropriate header
        files, and getting rid of the corresponding open-coded extern
        prototypes in other C files
      
      - renaming the variable 'sclk' in mach-omap2/clock.c:omap2_get_apll_clkin
        to avoid shadowing an earlier declaration
      
      Clean up checkpatch issues.  This mostly involves:
      
      - converting some asm/ includes to linux/ includes
      
      - cleaning up some whitespace
      
      - getting rid of braces for conditionals with single following statements
      
      Also take care of a few odds and ends, including:
      
      - getting rid of unlikely() and likely() - none of this code is particularly
        fast-path code, so the performance impact seems slim; and some of those
        likely() and unlikely() indicators are probably not as accurate as the
        ARM's branch predictor
      
      - removing some superfluous casts
      
      linux-omap source commit is 347df59f5d20fdf905afbc26b1328b0e28a8a01b.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      fecb494b
  5. 08 2月, 2009 2 次提交
  6. 06 10月, 2008 1 次提交
    • T
      ARM: OMAP2: Misc updates from linux-omap tree · 646e3ed1
      Tony Lindgren 提交于
      Misc updates from linux-omap tree, mostly to update common
      device initialization and add missing defines from linux-omap
      tree. Also some changes to make room for adding 34xx in
      following patches.
      
      Note that the I2C resources are now set up in
      arch/arm/plat-omap/i2c.c helper, and can be removed
      from devices.c.
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      646e3ed1
  7. 19 8月, 2008 1 次提交
  8. 07 8月, 2008 1 次提交
  9. 03 7月, 2008 2 次提交
    • P
      ARM: OMAP2: Clock: New OMAP2/3 DPLL rate rounding algorithm · 88b8ba90
      Paul Walmsley 提交于
      This patch adds a new rate rounding algorithm for DPLL clocks on the
      OMAP2/3 architecture.
      
      For a desired DPLL target rate, there may be several
      multiplier/divider (M, N) values which will generate a sufficiently
      close rate.  Lower N values result in greater power economy.  However,
      lower N values can cause the difference between the rounded rate and
      the target rate ("rate error") to be larger than it would be with a
      higher N.  This can cause downstream devices to run more slowly than
      they otherwise would.
      
      This DPLL rate rounding algorithm:
      
      - attempts to find the lowest possible N (DPLL divider) to reach the
        target_rate (since, according to Richard Woodruff <r-woodruff@ti.com>,
        lower N values save more power than higher N values).
      
      - allows developers to set an upper bound on the error between the
        rounded rate and the desired target rate ("rate tolerance"), so an
        appropriate balance between rate fidelity and power savings can be
        set.  This maximum rate error tolerance is set via
        omap2_set_dpll_rate_tolerance().
      
      - never returns a rounded rate higher than the target rate.
      
      The rate rounding algorithm caches the last rounded M, N, and rate
      computation to avoid rounding the rate twice for each clk_set_rate()
      call.  (This patch does not yet implement set_rate for DPLLs; that
      follows in a future patch.)
      
      The algorithm trades execution speed for rate accuracy.  It will find
      the (M, N) set that results in the least rate error, within a
      specified rate tolerance.  It does this by evaluating each divider
      setting - on OMAP3, this involves 128 steps.  Another approach to DPLL
      rate rounding would be to bail out as soon as a valid rate is found
      within the rate tolerance, which would trade rate accuracy for
      execution speed.  Alternate implementations welcome.
      
      This code is not yet used by the OMAP24XX DPLL clock, since it
      is currently defined as a composite clock, fusing the DPLL M,N and the
      M2 output divider.  This patch also renames the existing OMAP24xx DPLL
      programming functions to highlight that they program both the DPLL and
      the DPLL's output multiplier.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      88b8ba90
    • T
      ARM: OMAP: Turn CM and PRM access into functions · ff00fcc9
      Tony Lindgren 提交于
      Otherwise compiling in omap2 and omap3 will not work.
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      ff00fcc9
  10. 15 4月, 2008 3 次提交
  11. 21 5月, 2007 1 次提交
  12. 07 3月, 2007 1 次提交
  13. 25 9月, 2006 2 次提交
  14. 27 6月, 2006 1 次提交
  15. 03 4月, 2006 1 次提交
  16. 18 1月, 2006 1 次提交
  17. 10 11月, 2005 1 次提交