Skip to content

K
Kernel

openeuler / Kernel
1 年多 前同步成功

通知 8
Star 0
Fork 0
K
Kernel
切换分支/标签
  1. 28 4月, 2016 2 次提交
    • T
      i2c: mv64xxx: use clk_{prepare_enable,disable_unprepare} · 70719350
      由 Thomas Petazzoni 提交于 
      Instead of separately calling clk_prepare()/clk_enable(), use
clk_prepare_enable(), and instead of calling
clk_disable()/clk_unprepare(), use clk_disable_unprepare(). Those
handy shortcuts have been introduced specifically to simplify the
numerous call sites were both functions were called in sequence.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
      70719350
    • T
      i2c: mv64xxx: handle probe deferral for the clock · 9f4d6f16
      由 Thomas Petazzoni 提交于 
      If a clock is registered by a platform driver and not by the
OF_CLK_DECLARE() mechanism, it might show up after the first attempt
to probe i2c-mv64xxx. In order to solve this, we need to handle
-EPROBE_PREFER as a special return value of devm_clk_get(), and return
the same error code from probe().

This gives us three situations:

 - There is no reference to a clock in the DT. In this case,
   devm_clk_get() returns an error that is not -EPROBE_DEFER
   (something like -ENODEV), and we continue the probing without
   enabling the clock.

 - There is a reference to the clock in the DT, and the clock is
   ready. devm_clk_get() returns a valid reference to the clock, and
   we prepare/enable it.

 - There is a reference to the clock in the DT, but the clock is not
   ready. devm_clk_get() returns -EPROBE_DEFER, and we exit from
   probe() with the same error code so that probe() is tried again
   later.

This is needed for Marvell Armada 7K/8K, where the clock driver is a
platform driver.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
      9f4d6f16
  3. 30 11月, 2015 1 次提交
  5. 22 10月, 2015 1 次提交
  7. 18 12月, 2014 2 次提交
    • T
      i2c: mv64xxx: rework offload support to fix several problems · 00d8689b
      由 Thomas Petazzoni 提交于 
      Originally, the I2C controller supported by the i2c-mv64xxx driver
requires a lot of software support: an interrupt is generated at each
step of an I2C transaction (after the start bit, after sending the
address, etc.) and the driver is in charge of re-programming the I2C
controller to do the next step of the I2C transaction. This explains
the fairly complex state machine that the driver has.

On Marvell Armada XP and later processors (Armada 375, 38x, etc.), the
I2C controller was extended with a part called the "I2C Bridge", which
allows to offload the I2C transaction completely to the
hardware. Initial support for this mechanism was added in commit
930ab3d4 ("i2c: mv64xxx: Add I2C Transaction Generator support").

However, the implementation done in this commit has two related
issues, which this commit fixes by completely changing how the offload
implementation is done:

 * SMBus read transfers, where there is one write to select the
   register immediately followed in the same transaction by one read,
   were making the processor hang. This was easier visible on the
   Marvell Armada XP WRT1900AC platform using a driver for an I2C LED
   controller, or on other Armada XP platforms by using a simple
   'i2cget' command to read an I2C EEPROM.

 * The implementation was based on the fact that the offload engine
   was re-programmed to transfer each message of an I2C xfer: this
   meant that each message sent with the offload engine was starting
   with a normal I2C start sequence. However, the I2C subsystem
   assumes that all messages belonging to the same xfer will use the
   so-called "repeated start" so that the entire I2C xfer is seen as
   one transfer by the I2C devices and cannot be interrupt by other
   I2C masters on the same bus.

In fact, the "I2C Bridge" allows to offload three types of xfer:

 - xfer of one write message
 - xfer of one read message
 - xfer of one write message followed by one read message

For all other situations, we have to fallback to not using the "I2C
Bridge" in order to get proper I2C semantics.

Therefore, this commit reworks the offload implementation to put it
not at the message level, but at the xfer level: in the
mv64xxx_i2c_xfer() function, we decide if the transaction can be
offloaded (in which case it is handled by the
mv64xxx_i2c_offload_xfer() function), or otherwise it is handled by
the slow path (implemented in the existing mv64xxx_i2c_execute_msg()).

This allows to simplify the state machine, which no longer needs to
have any state related to the offload implementation: the offload
implementation is now completely separated from the slow path (with
the exception of the interrupt handler, of course).

In summary:

 - mv64xxx_i2c_can_offload() will analyze an I2C xfer and decided of
   the "I2C Bridge" can be used to offload it or not.

 - mv64xxx_i2c_offload_xfer() will actually program the "I2C Bridge"
   to offload one xfer (of either one or two messages), and block
   using mv64xxx_i2c_wait_for_completion() until the xfer completes.

 - The interrupt handler mv64xxx_i2c_intr() is modified to push the
   offload related code to a separate function,
   mv64xxx_i2c_intr_offload(). It will take care of reading the
   received data if needed.

This commit was tested on:

 - Armada XP OpenBlocks AX3-4 (EEPROM on I2C and RTC on I2C)
 - Armada XP WRT1900AC (LED controller on I2C)
 - Armada XP GP (EEPROM on I2C)

Fixes: 930ab3d4 ("i2c: mv64xxx: Add I2C Transaction Generator support")
Cc: <stable@vger.kernel.org> # v3.12+
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
[wsa: fixed checkpatch warnings]
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
      00d8689b
    • T
      i2c: mv64xxx: use BIT() macro for register value definitions · 12598695
      由 Thomas Petazzoni 提交于 
      Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
      12598695
  9. 20 10月, 2014 1 次提交
  11. 02 9月, 2014 1 次提交
  13. 17 7月, 2014 1 次提交
    • W
      i2c: i2c-mv64xxx: Drop class based scanning to improve bootup time · 8c49086c
      由 Wolfram Sang 提交于 
      This driver has been flagged to drop class based instantiation. The removal
improves boot-up time and is unneeded for embedded controllers. Users have been
warned to switch for some time now, so we can actually do the removal. Keep the
DEPRECATED flag, so the core can inform users that the behaviour finally
changed now. After another transition period, this flag can go, too.
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
      8c49086c
  15. 22 5月, 2014 1 次提交
  17. 28 3月, 2014 2 次提交
    • W
      i2c: i2c-mv64xxx: deprecate class based instantiation · 5fe29d49
      由 Wolfram Sang 提交于 
      Warn users that class based instantiation is going away soon in favour
of more robust probing and faster bootup times.
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
      5fe29d49
    • M
      i2c: mv64xxx: Fix reset controller handling · f2a67d0c
      由 Maxime Ripard 提交于 
      The reset framework recently gained optional stubs when CONFIG_RESET_CONTROLLER
is not selected. It also introduced a function reset_get_optional, that is also
dummy-defined whenever the framework isn't enabled, for drivers that needs an
optional reset controller.

Switch to this function, since the mv64xxx driver is in this case. This also
fixes a compilation breakage whenever the reset framework wasn't selected:

drivers/i2c/busses/i2c-mv64xxx.c:771:2: error: implicit declaration of function 'devm_reset_control_get'

While we're at it, remove the redundant test on dev.of_node surrounding the
calls to reset framework functions, since it will either be a valid pointer, an
error pointer in the case where we called reset_get_optional without an of_node
pointer or if it failed, or NULL if we're not loaded through DT.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
      f2a67d0c
  19. 11 3月, 2014 3 次提交
  21. 06 3月, 2014 2 次提交
  23. 15 2月, 2014 1 次提交
  25. 14 1月, 2014 1 次提交
  27. 04 10月, 2013 1 次提交
  29. 28 9月, 2013 2 次提交
  31. 23 8月, 2013 3 次提交
  33. 20 8月, 2013 1 次提交
  35. 26 6月, 2013 2 次提交
  37. 15 6月, 2013 3 次提交
  39. 06 6月, 2013 8 次提交
  41. 18 5月, 2013 1 次提交