Instead of separately calling clk_prepare()/clk_enable(), use
clk_prepare_enable(), and instead of calling
clk_disable()/clk_unprepare(), use clk_disable_unprepare(). Those
handy shortcuts have been introduced specifically to simplify the
numerous call sites were both functions were called in sequence.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

If a clock is registered by a platform driver and not by the
OF_CLK_DECLARE() mechanism, it might show up after the first attempt
to probe i2c-mv64xxx. In order to solve this, we need to handle
-EPROBE_PREFER as a special return value of devm_clk_get(), and return
the same error code from probe().

This gives us three situations:

 - There is no reference to a clock in the DT. In this case,
   devm_clk_get() returns an error that is not -EPROBE_DEFER
   (something like -ENODEV), and we continue the probing without
   enabling the clock.

 - There is a reference to the clock in the DT, and the clock is
   ready. devm_clk_get() returns a valid reference to the clock, and
   we prepare/enable it.

 - There is a reference to the clock in the DT, but the clock is not
   ready. devm_clk_get() returns -EPROBE_DEFER, and we exit from
   probe() with the same error code so that probe() is tried again
   later.

This is needed for Marvell Armada 7K/8K, where the clock driver is a
platform driver.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The new ARM64 Marvell Armada 7K/8K SoC family is using the same I2C
controller as the 32-bits Marvell EBU SoCs, so this commit allows
mv64xxx to be enabled when ARCH_MVEBU=y.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

CN3860 does not interrupt the CPU when the i2c status changes. If
we get a timeout, and see the status has in fact changed, we know we
have this problem, and drop back to polling.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NJan Glauber <jglauber@cavium.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The IS_ENABLED() macro checks if a Kconfig symbol has been enabled either
built-in or as a module, use that macro instead of open coding the same.
Signed-off-by: NJavier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Documentation/timers/timers-howto.txt recommends to use
usleep_range on delays > 10usec. According to my test results
with Neonode zForce touchscreen driver, usleep_range indeed
reduces CPU load.

Stats collected with "./perf record -a -g -F 1000 sleep 10"

i2c-imx with udelay(50):
34.19% 0.00% irq/220-Neonode [kernel.kallsyms] [k] irq_thread
    ---irq_thread
       |--33.75%--irq_thread_fn
       |    |--19.27%--0x7f08a878
       |    |     i2c_master_recv
       |    |     i2c_transfer
       |    |     __i2c_transfer
       |    |     i2c_imx_xfer
       |    |     |--11.71%--i2c_imx_trx_complete
       |    |     |--5.70%--i2c_imx_start <<<<----------------
       |    |     |     |--5.38%--__timer_const_udelay
       |    |     |     |      __timer_delay
       |    |     |     |      --5.07%--read_current_timer

i2c-imx with usleep_range(50,100)
29.08% 0.00% irq/220-Neonode  [kernel.kallsyms] [k] irq_thread
    ---irq_thread
       |--28.89%--irq_thread_fn
       |    |--17.21%--0x7f08a878
       |    |     i2c_master_recv
       |    |     |--17.14%--i2c_transfer
       |    |     |     __i2c_transfer
       |    |     |     i2c_imx_xfer
       |    |     |     |--14.29%--i2c_imx_trx_complete
       |    |     |     |--1.42%--i2c_imx_start <<<<----------
       |    |     |     |      |--0.71%--usleep_range
       |    |     |     |      |--0.53%--i2c_imx_bus_busy
Signed-off-by: NOleksij Rempel <linux@rempel-privat.de>
Signed-off-by: NDirk Behme <dirk.behme@de.bosch.com>
Reviewed-by: NVladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

There is a race between the TWSI interrupt and the condition
that is required before proceeding:

Low-level: interrupt flag bit must be set
High-level controller: valid bit must be clear

If the interrupt comes too early and the condition is not met
the wait will time out, and the transfer is aborted leading
to very poor performance.

To avoid this race retry for the condition ~80 µs later.
The retry is avoided on the very first invocation of
wait_event_timeout() (which tests the condition before entering
the wait and is therefore always wrong in this case).

EEPROM reads on 100kHz i2c now measure ~5.2kB/s, about 1/2 what's
achievable, and much better than the worst-case 100 bytes/sec before.

While at it remove the debug print from the low-level wait function.
Signed-off-by: NPeter Swain <pswain@cavium.com>
Signed-off-by: NJan Glauber <jglauber@cavium.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Zero-length message support (SMBUS QUICK or i2c) never worked with
the Octeon hardware. Disable SMBUS QUICK support and bail out in
case of a zero-length i2c request.

After this change 'i2c-detect -q' will return an error on Octeon but
the previously reported results were wrong anyway.
Signed-off-by: NJan Glauber <jglauber@cavium.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The clk_prepare_enable() function can fail so check the return
value and propagate the error in case of a failure.
Signed-off-by: NJavier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The driver not always prints the error code in case of a failure but this
information can be very useful for debugging. So let's print if available.
Signed-off-by: NJavier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Improve the readability by:
 - fixing indentation,
 - switching to proper block comments,
 - removing spurious blank lines,
 - checkpatch: void function return statements are not generally useful,
 - checkpatch: braces {} are not necessary for any arm of this
   statement,
 - checkpatch: missing a blank line after declarations.
Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: NJavier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Cleanup the weird function-level comments and remove obvious
documentation for probe/remove.
Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: NJavier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

If during probe() the s3c24xx_i2c_init() failed, the clock was left in
disabled but prepared state.
Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: NJavier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

cn78xx has a different interrupt architecture, so we have to manage
the interrupts differently.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NJan Glauber <jglauber@cavium.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Use High-Level Controller (HLC) when possible. The HLC can read/write
up to 8 bytes and is completely optional. The most important difference
of the HLC is that it only requires one interrupt for a transfer
(up to 8 bytes) where the low-level read/write requires 2 interrupts
plus one interrupt per transferred byte. Since the interrupts are costly
using the HLC improves the performance. Also, the HLC provides improved
error handling.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NJan Glauber <jglauber@cavium.com>
[wsa: fixed trivial checkpatch warnings]
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Add helper function that reads back a value after writing to
make sure the write is finished and use it in octeon_i2c_write_int().
Signed-off-by: NPeter Swain <pswain@cavium.com>
Signed-off-by: NJan Glauber <jglauber@cavium.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Switch to the i2c bus recovery framework using generic SCL recovery.
If this fails try to reset the hardware. The recovery is triggered
during START on timeout of the interrupt or failure to reach
the START / repeated-START condition.

The START function is moved to xfer and while at it remove the
xfer debug message (i2c core already provides a debug message
for this).
Signed-off-by: NJan Glauber <jglauber@cavium.com>
[wsa: removed one empty line]
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Introduce a function that checks for valid status codes depending
on the phase of a transmit or receive. Also add all existing status
codes and improve error handling for various states.

The Octeon TWSI has an "assert acknowledge" bit (TWSI_CTL_AAK) that
is required to be set in master receive mode until the last byte is
requested. The state check needs to consider if this bit was set.
Signed-off-by: NJan Glauber <jglauber@cavium.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS to simplify the code.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Reviewed-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS to simplify the code.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Reviewed-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The lock is taken while reading two registers. On RT the first lock is
taken in hard irq where it might sleep and in the threaded irq.
The threaded irq runs in oneshot mode so the hard irq does not run until
the thread the completes so there is no reason to grab the lock.
Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
[grygorii.strashko@ti.com: drop locking from isr completely and remove
lock field from struct omap_i2c_dev]
Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Share the ACPI companion for the platform device with the
i2c adapter, so that the adapter has access to the properties
defined in ACPI tables.
Signed-off-by: NIrina Tirdea <irina.tirdea@intel.com>
Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Switch to the new generic functions: i2c_parse_fw_timings().
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Remove superfluous check and stray newline.
Signed-off-by: NJan Glauber <jglauber@cavium.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Add helper functions for control, data and status register access.
This simplifies the code and makes the purpose of the register
access clearer.
Signed-off-by: NJan Glauber <jglauber@cavium.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Rename the [read|write]_sw functions to make it clearer they access
the TWSI registers.
Signed-off-by: NJan Glauber <jglauber@cavium.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

No functional change, just moving the functions upward in
preparation of improving the recovery.
Signed-off-by: NJan Glauber <jglauber@cavium.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Convert the adapter timeout to 2 ms independently of depending on CONFIG_HZ.
CONFIG_HZ is 100 for MIPS Cavium-Octeon so the timeout value is not changed.

Also set retries to 5 to improve robustness.
Signed-off-by: NJan Glauber <jglauber@cavium.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Enable multi-master mode in I2C_CNFG reg based on hw features.
Using single/multi-master mode bit introduced for Tegra210,
whereas multi-master mode is enabled by default in HW for T124 and
earlier Tegra SOC. Enabling this bit doesn't explicitly start
treating the bus has having multiple masters, but will start
checking for arbitration lost and reporting when it occurs.

The Tegra210 I2C controller supports single/multi master mode.
Add chipdata for Tegra210 and its compatibility string so that
Tegra210 will select data that enables multi master mode correctly.

Do below prerequisites for multi-master bus if "multi-master"
dt property entry is added.
 1. Enable 1st level clock always set.
 2. Disable 2nd level clock gating (slcg which
    is supported from T124 SOC and later chips)
Signed-off-by: NShardar Shariff Md <smohammed@nvidia.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Allow runtime PM so that PM and PCI core can put the device into low-power
state when idle and resume it back when needed in those platforms that
support PM for i801 device.

Enable also autosuspend with 1 second delay in order to not needlessly
toggle power state on and off if there are multiple transactions during
short time.

Device is resumed at the beginning of bus access and marked idle ready
for autosuspend at the end of it.
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Tested-by: NReinette Chatre <reinette.chatre@intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Stop using legacy PCI PM support and convert to standard dev_pm_ops.
This provides more straightforward path to add runtime PM.

While at it remove explicit PCI power state control and configuration space
save/restore as the PCI core does it.
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Tested-by: NReinette Chatre <reinette.chatre@intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>