The rpmcc driver is providing the XO clock, which is the parent of almost
all clocks. But during boot, this driver may probe later and leave most of
the clocks without parent. The common clock framework currently reports
invalid rate for orphan clocks and this may confuse drivers.

To resolve this, use fixed clocks registration until we have some support
to deal with the this issue. Removing the generic rpmcc compatible is
enough to switch back to fixed factor XO clock.
Signed-off-by: NGeorgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

This adds mmc-ddr-1_8v support to DT for sdhc1 of msm8916.
Signed-off-by: NRitesh Harjani <riteshh@codeaurora.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

Add xo entry to sdhc clock node on all qcom platforms.
Signed-off-by: NRitesh Harjani <riteshh@codeaurora.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

This patch add support to Analog audio both Playback and Capture via
msm8916 WCD muti codec.
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

The Hexagon core on the msm8916 provides services for audio control,
audio output, sensors and the Hexagon SDK. The Hexagon remoteproc node
allows us to boot this core.

Although its part of the core platform its left disabled as it will
crash without the rmtfs QMI service and we do not yet handle crashes
gracefully.
Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

Add the Hexagon SMD edge, so that QRTR is probed when the Hexagon is
booted.
Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

The MSM8916 SoC contains a MDP5 based display block, and one DSI output.
Add the top level MDSS DT node, and the MDP5, DSI and DSI PHY children
sub-blocks. Establish the link between MDP5's INTF1 output port and DSI's
input port.

Cc: Andy Gross <andy.gross@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: NArchit Taneja <architt@codeaurora.org>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

Add thermal zones, tsens and qfprom nodes
Acked-by: NEduardo Valentin <edubezval@gmail.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NRajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

When a device uses the GIC as its interrupt controller and generates
SPIs, only the values 1 (edge rising) and 4 (level high) are legal.

Anything else is just plain wrong (can't be programmed into the HW),
and leads to aborted driver probes (USB doesn't work with 4.8-rc1
on a Dragonboard 410C).
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
Reviewed-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

The TCSR memory segment includes various functionality, among other
things the halt-registers for the Hexagon.
Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

On msm8916 SCM acts as a controller for the MSS_RESET found in the GCC,
update the DT node so that we can address this.
Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

The modem boot authenticator needs space to play in, this is supposed to
be relocatable and as such could later be replaced with a dynamically
allocated chunk of memory. But let's give it a reserve for now, as we
know that works.
Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

This patch adds the smsm and smp2p nodes for the hexagon and wcnss
cores.
Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

Update reserved-memory in accordance with memory the detailed memory map
for 8916, so that we will be able to reference the firmware memory
regions.
Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

This adds the devicetree node for the SCM firmware.
Acked-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>
Reviewed-by: NStephen Boyd <sboyd@codeaurora.org>

Add the PMU so we can get proper perf event support on this SoC.
Signed-off-by: NStephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

Add device bindings for CPUs to suspend using PSCI as the enable-method.

Cc: <devicetree@vger.kernel.org>
Signed-off-by: NLina Iyer <lina.iyer@linaro.org>
Tested-by: NAndy Gross <andy.gross@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

This patch updates the digital voltage levels from corner values to
microvolts as we are going to use s1 regulator directly for vddcx
instead of s1_corner.
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@linaro.org>

This patch adds lpass node to the SOC.
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@linaro.org>

This patch adds manual pull up setting for usb otg indicating that the
vbus is vbus is not routed to USB controller/phy therefore enables
pull-up explicitly before starting controller.
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@linaro.org>

Add the RPM Clock Controller DT node and include the necessary header
file for clocks.
Signed-off-by: NGeorgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

This patch adds label to smd rpm regulators so that the board level file
can use the label directly to populate the regulators, rather than
having deep nesting.
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

s2 is spmi controller regulator on msm8916 according to downstream 3.10
kernel, so remove it from the dt to avoid confusion an use of it.
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

The msm8916 SoC has an L2 cache for all 4 CPUs. Add it to the
dtsi file so that the cache hierarchy can be probed.

Cc: <devicetree@vger.kernel.org>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Reviewed-by: NAndy Gross <andy.gross@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

Use the standard name for clock controller nodes instead of a
qcom specific name.
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Reviewed-by: NAndy Gross <andy.gross@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

This patch adds the PM8916 regulator nodes found on MSM8916 platforms.
Signed-off-by: NAndy Gross <agross@codeaurora.org>
Acked-by: NBjorn Andersson <bjorn.andersson@sonymobile.com>

Add support for the SMD and RPM devices found on MSM8916 platforms.
Signed-off-by: NAndy Gross <agross@codeaurora.org>
Acked-by: NBjorn Andersson <bjorn.andersson@sonymobile.com>

This patch adds the nodes necessary to support the SMEM driver on MSM8916
platforms.
Signed-off-by: NAndy Gross <agross@codeaurora.org>
Acked-by: NBjorn Andersson <bjorn.andersson@sonymobile.com>

Currently the rates of the xo and sleep clocks are hard-coded in the
GCC driver, but this is a board layout description that actually should
be in the DT. Moving them into DT also allows us to insert the RPM
controlled clocks between the DT and GCC clocks.
Signed-off-by: NGeorgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: NAndy Gross <agross@codeaurora.org>

Add DMA channels definitions for UART1 and UART2 controllers.
Signed-off-by: NIvan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: NAndy Gross <agross@codeaurora.org>

This patch adds missing support for i2c0 and i2c6, this support is
required to connect the i2c slaves on LS expansion on DB410c.
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: NAndy Gross <agross@codeaurora.org>

This patch adds the nodes required to support the UART1 node on the
MSM8916 and also fixes the sleep pins function for UART2.
Signed-off-by: NAndy Gross <agross@codeaurora.org>

Adds rng device tree node for msm8916 SoCs.
Signed-off-by: NStanimir Varbanov <stanimir.varbanov@linaro.org>
Signed-off-by: NAndy Gross <agross@codeaurora.org>

clock controller nodes which also support power domains (gdscs') need
to have a #power-domain-cells property. Add these for gcc and mmcc
nodes of msm8974, gcc of apq8084 and msm8916.
Also update gcc and mmcc bindings for it.
Signed-off-by: NRajendra Nayak <rnayak@codeaurora.org>
Acked-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NAndy Gross <agross@codeaurora.org>

Add Host, Device and OTG configuration nodes.
Signed-off-by: NIvan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: NAndy Gross <agross@codeaurora.org>

Add sdhci1 and sdhci2 device configuration nodes.
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: NIvan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: NAndy Gross <agross@codeaurora.org>

Add device nodes for SPI1, SPI2, SPI3, I2C4, SPI5, SPI6 and
BAM(DMA) engine connected to them.
Signed-off-by: NStanimir Varbanov <stanimir.varbanov@linaro.org>
Signed-off-by: NIvan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: NAndy Gross <agross@codeaurora.org>

Create separate file for MSM8916 pinctrl default/sleep pins state
definitions. Move in UART2 states and add SPI, I2C and SDC configurations.
Signed-off-by: NStanimir Varbanov <stanimir.varbanov@linaro.org>
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: NIvan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: NAndy Gross <agross@codeaurora.org>

Add initial device configuration nodes for APQ8016 and PM8916 GPIO's.
Signed-off-by: NIvan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: NKumar Gala <galak@codeaurora.org>

Add the restart node so we can reboot the device.
Signed-off-by: NIvan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: NKumar Gala <galak@codeaurora.org>