1. 14 1月, 2011 2 次提交
  2. 10 1月, 2011 1 次提交
  3. 25 12月, 2010 2 次提交
  4. 11 12月, 2010 2 次提交
  5. 02 11月, 2010 1 次提交
  6. 19 6月, 2010 2 次提交
  7. 13 5月, 2010 1 次提交
  8. 14 1月, 2010 1 次提交
  9. 03 12月, 2009 2 次提交
  10. 02 12月, 2009 5 次提交
  11. 22 11月, 2009 5 次提交
  12. 21 11月, 2009 2 次提交
  13. 30 10月, 2009 1 次提交
  14. 27 10月, 2009 1 次提交
    • B
      e1000e: allow for swflag to be held over consecutive PHY accesses · 5ccdcecb
      Bruce Allan 提交于
      PCH-based parts (82577/82578) and some ICH8-based parts (82566) need to
      hold the swflag (sw/fw/hw hardware semaphore) over consecutive PHY accesses
      in order to perform sw-driven PHY configuration during initialization to
      workaround known hardware issues (see follow-on patch).  This patch
      provides new PHY read/write functions (and function pointers) that will
      allow accessing the PHY registers assuming the swflag has already been
      acquired.  The actual PHY register access code has moved into helper
      functions that are called with a flag indicating whether or not the swflag
      has already been acquired and acquires/releases it if not.
      
      The functions called from within the updated PHY access functions had to be
      updated to assume the swflag was already acquired, and other functions that
      called those functions were also updated to acquire/release the swflag.
      Signed-off-by: NBruce Allan <bruce.w.allan@intel.com>
      Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      5ccdcecb
  15. 04 7月, 2009 2 次提交
  16. 03 6月, 2009 1 次提交
  17. 22 11月, 2008 2 次提交
  18. 03 9月, 2008 2 次提交
  19. 07 5月, 2008 1 次提交
    • B
      e1000e: Add support for BM PHYs on ICH9 · 97ac8cae
      Bruce Allan 提交于
      This patch adds support for the BM PHY, a new PHY model being used
      on ICH9-based implementations.
      
      This new PHY exposes issues in the ICH9 silicon when receiving
      jumbo frames large enough to use more than a certain part of the
      Rx FIFO, and this unfortunately breaks packet split jumbo receives.
      For this reason we re-introduce (for affected adapters only) the
      jumbo single-skb receive routine back so that people who do
      wish to use jumbo frames on these ich9 platforms can do so.
      Part of this problem has to do with CPU sleep states and to make
      sure that all the wake up timings are correctly we force them
      with the recently merged pm_qos infrastructure written by Mark
      Gross. (See http://lkml.org/lkml/2007/10/4/400).
      
      To make code read a bit easier we introduce a _IS_ICH flag so
      that we don't need to do mac type checks over the code.
      Signed-off-by: NBruce Allan <bruce.w.allan@intel.com>
      Signed-off-by: NAuke Kok <auke-jan.h.kok@intel.com>
      Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
      97ac8cae
  20. 25 4月, 2008 1 次提交
  21. 29 3月, 2008 2 次提交
  22. 24 2月, 2008 1 次提交