Signed-off-by: NAlessandro Rubini <rubini@unipv.it>
Acked-by: NAndrea Gallo <andrea.gallo@stericsson.com>
Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Conflicts:
	drivers/mtd/mtdcore.c

Merged in order that I can apply the Nomadik nand/onenand support patches.

Tested 64KiB block size only.
Signed-off-by: NKevin Cernekee <cernekee@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

We may end up doing DMA to/from these. Until the new MTD API fixes the
issues, this should stop things from falling over.

Original idea from Gilles Casse <list@gcasse.net>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

As with orion_nand in commit f33dabbe
("register orion_nand using platform_driver_probe()"), avoid .init.text
problems by using platform_device_probe(). This isn't going to be
hotplugged anyway.
Reported-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Using __nand_correct_data() helper function, this driver can read 512
byte (with 6 byte ECC) at a time.  This results minor performance
improvement.
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This driver may be reading 512 bytes at a times, but still calculates
256-byte sector ECC.  So the nand_correct_data() is not appropriate
for this driver.  Implement its ecc.correct function calling
__nand_correct_data() twice.
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Acked-by: NDmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Acked-by: NVimal Singh <vimalsingh@ti.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Split nand_correct_data() into two part, a pure calculation function
and a wrapper for mtd interface.

The tmio_nand driver can implement its ecc.correct function easily
using this __nand_correct_data helper.
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Acked-by: NDmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Acked-by: NVimal Singh <vimalsingh@ti.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

The M29W128G Numonyx flash devices are intolerant to any 0xFF command:
in the Cfi_util.c the function cfi_qry_mode_off() (that resets the device
after the autoselect mode) must have a 0xF0 command after the 0xFF command.
This fix solves also the cause of the fixup_M29W128G_write_buffer() fix,
that can be removed now.
The following patch applies to 2.6.30 kernel.
Signed-off-by: NMassimo Cirillo <maxcir@gmail.com>
Acked-by: NAlexey Korolev <akorolev@infradead.org>
Cc: stable@kernel.org
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NMohan Lal Jangir <mohanlaljangir@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NStefan Roese <sr@denx.de>
Signed-off-by: NVitaly Bordug <vitb@kernel.crashing.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Fix ECC Correction bug where the byte offset location were double
fliped causing correction routine to toggle the wrong byte location
in the ECC segment. The ndfc_calculate_ecc routine change the order
of getting the ECC code.
        /* The NDFC uses Smart Media (SMC) bytes order */
        ecc_code[0] = p[2];
        ecc_code[1] = p[1];
        ecc_code[2] = p[3];
But in the Correction algorithm when calculating the byte offset
location, the b1 is used as the upper part of the address. Which
again reverse the order making the final byte offset address
location incorrect.
	byte_addr = (addressbits[b1] << 4) + addressbits[b0];
The order is change to read it in straight and let the correction
function to revert it to SMC order.

Cc: stable@kernel.org
Signed-off-by: NFeng Kan <fkan@amcc.com>
Acked-by: NVictor Gallardo <vgallardo@amcc.com>
Acked-by: NProdyut Hazarika <phazarika@amcc.com>
Acked-by: NStefan Roese <sr@denx.de>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

The previous implementation breaks the dts binding "mtd-physmap.txt". This
implementation fixes the issue by checking the availability of the reg
property instead of the name property.

Cc: stable@kernel.org
Signed-off-by: NBenjamin Krill <ben@codiert.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

On TI's da850/omap-l138 EVM, MAC address is stored in SPI flash.

This patch changes the initialization sequence of the drivers
by moving mtd and spi ahead of net in drivers/Makefile thereby
enabling da850/omap-l138 ethernet driver to read the MAC address
while booting.
Signed-off-by: NSudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch adds DMA mode support for nand prefetch/post-write engine.
Signed-off-by: NVimal Singh <vimalsingh@ti.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch adds prefetch support to access nand flash in mpu mode.
This patch also adds 8-bit nand support (omap_read/write_buf8).
Prefetch can be used for both 8- and 16-bit devices.
Signed-off-by: NVimal Singh <vimalsingh@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Add w90p910 NAND driver for w90p910 evaluation board
based on w90p910,there is a K8F1G08 NAND on my board.

[dwmw2: depend on MTD_PARTITIONS]
Signed-off-by: NWan ZongShun <mcuos.com@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Use physmap_of to access RAMs as mtd and add documenation for it. This approach
is a lot less intrusive as adding an of-wrapper around plat-ram.c. As most
extensions of plat-ram.c (e.g. custom map-functions) can't be mapped to the
device tree anyhow, extending physmap_of seems to be the cleanest approach.

Tested with a phyCORE-MPC5121e.
Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>
Cc: Vitaly Wool <vwool@ru.mvista.com>
Cc: Artem Bityutskiy <dedekind@infradead.org>
Cc: Ken MacLeod <ken@bitsko.slc.ut.us>
Cc: Albrecht Dreß <albrecht.dress@arcor.de>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Acked-by: NEric Miao <eric.y.miao@gmail.com>
Signed-off-by: NYeasah Pell <yeasah@comrex.com>
Signed-off-by: NMike Rapoport <mike@compulab.co.il>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch allows i.MX27 to support 2KiB pagesize NAND flash.
We are using a 1.8V NAND flash which datasheet (unfortunately only
available under NDA) says :
Page size: x8: 2,112 bytes (2,048 + 64 bytes).
Without this patch, all sectors are marked as bad eraseblock.
Signed-off-by: NEric Benard <ebenard@eukrea.com>
Acked-by : Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

The error handling in the phram driver is pretty bad -- in many places,
errors are silently ignored or logged, but then still ignored in the
return value.  So convert all of the code to pass back the correct return
value and log error messages properly (and using the new pr_fmt() helper).

If everything does go smoothly, rather than exit silently, dump a helpful
info message like pretty much every other MTD driver does.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
Acked-by: NJoern Engel <joern@logfs.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Support SST25WF{512,010,020,040} SPI flashes.
Signed-off-by: NGraf Yang <graf.yang@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

The SST SPI flashes are a bit non-standard in that they can be programmed
one byte at a time (including address!), or they can be written two bytes
at a time with auto address incrementing (AAI).  The latter form is
obviously much better for performance, so let's use it when possible.
Signed-off-by: NGraf Yang <graf.yang@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

The MTD_TEST config option was added in between the MTD_PARTITIONS config
and its dependent options which causes the resulting menu system to
display incorrectly as MTD_TEST does not depend on MTD_PARTITIONS.  So
move it up a few lines where it won't cause a problem.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This driver lets people use GPIO's for additional address lines in case
their processor does not have enough address lines already.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
Signed-off-by: NBryan Wu <cooloney@kernel.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

If MTD_RAM is built as a module, the uClinux map does not work since it
can only be built in to the kernel.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

The uClinux map driver doesn't even use partitions, so we shouldn't require
it in order to work properly.
Signed-off-by: NTimofei Bondarenko <tim@ipi.ac.ru>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
CC: Greg Ungerer <gerg@uclinux.org>
CC: uclinux-dev@uclinux.org
CC: linux-mtd@lists.infradead.org
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

linux v2.6.31-rc6 can not detect NEC uPD29F064115.

uPD29F064115 is a 16 bit device.
datasheet:
  http://www.cn.necel.com/memory/cn/download/M16062EJ2V0DS00.pdf

This applies the same fix as used for SST chips in commit 
ca6f12c6 ("jedec_probe: Fix SST 16-bit 
chip detection").
Signed-off-by: NHiroshi Ito <ito@mlb.co.jp>
Cc: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

If the erase region was found in the first iteration we read from
regions[-1]
Signed-off-by: NRoel Kluin <roel.kluin@gmail.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

If the erase region was found in the first iteration we read from
eraseregions[-1]
Signed-off-by: NRoel Kluin <roel.kluin@gmail.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NRoel Kluin <roel.kluin@gmail.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch adds 4-bit ECC support for large page NAND chips using the new
ECC mode NAND_ECC_HW_OOB_FIRST.  The platform data from board-dm355-evm
has been adjusted to use this mode.

The patches have been verified on DM355 device with 2KiB-page Micron
devices using mtd-tests and JFFS2.  Error correction up to 4 bits has
also been verified using nandwrite/nanddump utilities.
Reviewed-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NSneha Narnakaje <nsnehaprabha@ti.com>
Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch adds the new mode NAND_ECC_HW_OOB_FIRST in the nand code to
support 4-bit ECC on TI DaVinci devices with large page (up to 2KiB) NAND
chips.  This ECC mode is similar to NAND_ECC_HW, with the exception of
read_page API that first reads the OOB area, reads the data in chunks,
feeds the ECC from OOB area to the ECC hw engine and perform any
correction on the data as per the ECC status reported by the engine.

"ECC_HW_OOB_FIRST" name suggested by Thomas Gleixner
Reviewed-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NSneha Narnakaje <nsnehaprabha@ti.com>
Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch adds a new "page" parameter to all NAND read_page/read_page_raw
APIs.  The read_page API for the new mode ECC_HW_OOB_FIRST requires the
page information to send the READOOB command and read the OOB area before
the data area.
Reviewed-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NSneha Narnakaje <nsnehaprabha@ti.com>
Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Remove the ARM dependency from the generic "onenand" platform device
driver.  This change makes the driver useful for other architectures as
well.  Needed for the SuperH kfr2r09 board.

Apart from the obvious Kconfig bits, the most important change is the move
away from ARM specific includes and platform data.  Together with this
change the only in-tree board code gets an update, and the driver name is
also changed gracefully break potential out of tree drivers.

The driver is also updated to allow NULL as platform data together with a
few changes to make use of resource_size() and dev_name().
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Kyungmin Park <kmpark@infradead.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

orion_nand_probe lives in .init.text, so using platform_driver_register to
register it is wrong because binding a device after the init memory is
discarded (e.g.  via sysfs) results in an oops.

As requested by Nicolas Pitre platform_driver_probe is used instead of
moving the probe function to .devinit.text as proposed initially.  This
saves some memory, but devices registered after the driver is probed are
not bound (probably there are none) and binding via sysfs isn't possible.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Lennert Buytenhek <buytenh@marvell.com>
Cc: Saeed Bishara <saeed@marvell.com>
Cc: Joern Engel <joern@logfs.org>
Acked-by: NNicolas Pitre <nico@marvell.com>
Cc: Greg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Add an omitted unlock to one sst25l_erase fail path.
Signed-off-by: NJiri Slaby <jirislaby@gmail.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Add support for the non JEDEC SST25L SPI Flash devices.

[dwmw2: Some cleanups]
Signed-off-by: NAndre Renaud <andre@bluewatersys.com>
Signed-off-by: NRyan Mallon <ryan@bluewatersys.com>
Acked-by: NLinus Walleij <linus.walleij@stericsson.com>
Cc: Anton Vorontsov <avorontsov@ru.mvista.com>
Cc: "H Hartley Sweeten" <hartleys@visionengravers.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Merge branch 'x86-platform-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip

* 'x86-platform-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (38 commits)
  x86: Move get/set_wallclock to x86_platform_ops
  x86: platform: Fix section annotations
  x86: apic namespace cleanup
  x86: Distangle ioapic and i8259
  x86: Add Moorestown early detection
  x86: Add hardware_subarch ID for Moorestown
  x86: Add early platform detection
  x86: Move tsc_init to late_time_init
  x86: Move tsc_calibration to x86_init_ops
  x86: Replace the now identical time_32/64.c by time.c
  x86: time_32/64.c unify profile_pc
  x86: Move calibrate_cpu to tsc.c
  x86: Make timer setup and global variables the same in time_32/64.c
  x86: Remove mca bus ifdef from timer interrupt
  x86: Simplify timer_ack magic in time_32.c
  x86: Prepare unification of time_32/64.c
  x86: Remove do_timer hook
  x86: Add timer_init to x86_init_ops
  x86: Move percpu clockevents setup to x86_init_ops
  x86: Move xen_post_allocator_init into xen_pagetable_setup_done
  ...

Fix up conflicts in arch/x86/include/asm/io_apic.h

Signed-off-by: NGeoffrey Thomas <geofft@ksplice.com>
Signed-off-by: NTim Abbott <tabbott@ksplice.com>
Acked-by: NSam Ravnborg <sam@ravnborg.org>
Acked-by: NDavid S. Miller <davem@davemloft.net>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>