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  1. 09 4月, 2021 1 次提交
  3. 18 11月, 2020 1 次提交
    • M
      can: flexcan: flexcan_chip_start(): fix erroneous flexcan_transceiver_enable()... · cd9f13c5
      由 Marc Kleine-Budde 提交于 
      can: flexcan: flexcan_chip_start(): fix erroneous flexcan_transceiver_enable() during bus-off recovery

If the CAN controller goes into bus off, the do_set_mode() callback with
CAN_MODE_START can be used to recover the controller, which then calls
flexcan_chip_start(). If configured, this is done automatically by the
framework or manually by the user.

In flexcan_chip_start() there is an explicit call to
flexcan_transceiver_enable(), which does a regulator_enable() on the
transceiver regulator. This results in a net usage counter increase, as there
is no corresponding flexcan_transceiver_disable() in the bus off code path.
This further leads to the transceiver stuck enabled, even if the CAN interface
is shut down.

To fix this problem the
flexcan_transceiver_enable()/flexcan_transceiver_disable() are moved out of
flexcan_chip_start()/flexcan_chip_stop() into flexcan_open()/flexcan_close().

Fixes: e955cead ("CAN: Add Flexcan CAN controller driver")
Link: https://lore.kernel.org/r/20201118150148.2664024-1-mkl@pengutronix.deSigned-off-by: NMarc Kleine-Budde <mkl@pengutronix.de>
      cd9f13c5
  5. 16 11月, 2020 2 次提交
  7. 04 11月, 2020 4 次提交
  9. 08 10月, 2020 1 次提交
  11. 01 10月, 2020 3 次提交
  13. 22 9月, 2020 20 次提交
  15. 21 9月, 2020 1 次提交
  17. 08 12月, 2019 3 次提交
    • J
      can: flexcan: poll MCR_LPM_ACK instead of GPR ACK for stop mode acknowledgment · 048e3a34
      由 Joakim Zhang 提交于 
      Stop Mode is entered when Stop Mode is requested at chip level and
MCR[LPM_ACK] is asserted by the FlexCAN.

Double check with IP owner, the MCR[LPM_ACK] bit should be polled for
stop mode acknowledgment, not the acknowledgment from chip level which
is used to gate flexcan clocks.

This patch depends on:

    b7603d08 ("can: flexcan: add low power enter/exit acknowledgment helper")

Fixes: 5f186c25 (can: flexcan: fix stop mode acknowledgment)
Tested-by: NSean Nyekjaer <sean@geanix.com>
Signed-off-by: NJoakim Zhang <qiangqing.zhang@nxp.com>
Cc: linux-stable <stable@vger.kernel.org> # >= v5.0
Signed-off-by: NMarc Kleine-Budde <mkl@pengutronix.de>
      048e3a34
    • J
      can: flexcan: add low power enter/exit acknowledgment helper · b7603d08
      由 Joakim Zhang 提交于 
      The MCR[LPMACK] read-only bit indicates that FlexCAN is in a lower-power
mode (Disabled mode, Doze mode, Stop mode).

The CPU can poll this bit to know when FlexCAN has actually entered low
power mode. The low power enter/exit acknowledgment helper will reduce
code duplication for disabled mode, doze mode and stop mode.
Tested-by: NSean Nyekjaer <sean@geanix.com>
Signed-off-by: NJoakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: NMarc Kleine-Budde <mkl@pengutronix.de>
      b7603d08
    • S
      can: flexcan: fix possible deadlock and out-of-order reception after wakeup · e707180a
      由 Sean Nyekjaer 提交于 
      When suspending, and there is still CAN traffic on the interfaces the
flexcan immediately wakes the platform again. As it should :-). But it
throws this error msg:

[ 3169.378661] PM: noirq suspend of devices failed

On the way down to suspend the interface that throws the error message
calls flexcan_suspend() but fails to call flexcan_noirq_suspend(). That
means flexcan_enter_stop_mode() is called, but on the way out of suspend
the driver only calls flexcan_resume() and skips flexcan_noirq_resume(),
thus it doesn't call flexcan_exit_stop_mode(). This leaves the flexcan
in stop mode, and with the current driver it can't recover from this
even with a soft reboot, it requires a hard reboot.

This patch fixes the deadlock when using self wakeup, by calling
flexcan_exit_stop_mode() from flexcan_resume() instead of
flexcan_noirq_resume().

This also fixes another issue: CAN frames are received out-of-order in
first IRQ handler run after wakeup.

The problem is that the wakeup latency from frame reception to the IRQ
handler (where the CAN frames are sorted by timestamp) is much bigger
than the time stamp counter wrap around time. This means it's
impossible to sort the CAN frames by timestamp.

The reason is that the controller exits stop mode during noirq resume,
which means it receives frames immediately, but interrupt handling is
still not possible.

So exit stop mode during resume stage instead of noirq resume fixes this
issue.

Fixes: de3578c1 ("can: flexcan: add self wakeup support")
Signed-off-by: NSean Nyekjaer <sean@geanix.com>
Tested-by: NSean Nyekjaer <sean@geanix.com>
Signed-off-by: NJoakim Zhang <qiangqing.zhang@nxp.com>
Cc: linux-stable <stable@vger.kernel.org> # >= v5.0
Signed-off-by: NMarc Kleine-Budde <mkl@pengutronix.de>
      e707180a
  19. 12 11月, 2019 4 次提交
    • M
      can: flexcan: flexcan_mailbox_read() make use of flexcan_write64() to mark the mailbox as read · b9468ad8
      由 Marc Kleine-Budde 提交于 
      In the previous patch the function flexcan_write64() was introduced.

This patch replaces the open coded variant in flexcan_mailbox_read()
that marks a mailbox as read, by a single call to flexcan_write64().
Signed-off-by: NMarc Kleine-Budde <mkl@pengutronix.de>
      b9468ad8
    • M
      can: flexcan: flexcan_irq(): add support for TX mailbox in iflag1 · b87c28b7
      由 Marc Kleine-Budde 提交于 
      The flexcan IP core has up to 64 mailboxes, each one has a corresponding
interrupt bit in the iflag1 or iflag2 registers and a mask bit in the
imask1 or imask2 registers.

The driver will always use the last mailbox for TX, which falls into the iflag2
register.

To support CANFD the payload size has to increase to 64 bytes and the number of
mailboxes will decrease so much that the TX mailbox will be handled in the
iflag1 register.

This patch add support to handle the TX mailbox independent whether it's
in iflag1 or iflag2 by introducing th flexcan_read_reg_iflag_tx()
function, similar to flexcan_read_reg_iflag_rx(), for the read path.

For the write path the function flexcan_write64() is added.
Signed-off-by: NMarc Kleine-Budde <mkl@pengutronix.de>
      b87c28b7
    • M
      can: flexcan: flexcan_read_reg_iflag_rx(): optimize reading · d3a51507
      由 Marc Kleine-Budde 提交于 
      The flexcan IP core has up to 64 mailboxes, each one has a corresponding
interrupt bit in the iflag1 or iflag2 registers and a mask bit in the
imask1 or imask2 registers.

In the timestamp (i.e. non FIFO) mode the driver needs to mask all non RX
interrupt sources, it uses the precomputed value rx_mask of struct flexcan_priv
for this.

In certain use cases, for example the CANFD mode, the contents of the iflag2
register is completely masked.

This patch optimizes the flexcan_read_reg_iflag_rx() function by not reading
the iflag1 or iflag2 register if the contents is masked.
Signed-off-by: NMarc Kleine-Budde <mkl@pengutronix.de>
      d3a51507
    • M
      can: flexcan: introduce struct flexcan_priv::tx_mask and make use of it · 0ca64f02
      由 Marc Kleine-Budde 提交于 
      The current driver uses FLEXCAN_IFLAG2_MB() to generate the mask to check for
the TX complete interrupt. This works well, as the driver will always use the
last mailbox for TX, which falls into the iflag2 register.

To support CANFD the payload size has to increase to 64 bytes and the
number of mailboxes will decrease so much that the TX mailbox will be
handled in the iflag1 register.

This patch introduces a tx_mask in the struct flexcan_priv (similar to rx_mask)
and makes use of it. The actual support to handle the TX mailbox in iflag1 will
be added in the next patches.
Signed-off-by: NMarc Kleine-Budde <mkl@pengutronix.de>
      0ca64f02