- 21 1月, 2019 1 次提交
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由 Jonathan Neuschäfer 提交于
This patch implements level-triggered IRQs in the Hollywood GPIO driver. Edge triggered interrupts are not supported in this GPIO controller, so I moved their emulation into a separate patch. Signed-off-by: NJonathan Neuschäfer <j.neuschaefer@gmx.net> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 22 12月, 2018 1 次提交
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由 Linus Walleij 提交于
This driver clearly needs OF_GPIO so depend on it. Fixes a build error. Cc: Andrei Stefanescu <Andrei.Stefanescu@microchip.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 21 12月, 2018 2 次提交
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由 Jan Kotas 提交于
This patch adds a driver for Cadence GPIO controller. It can be enabled with GPIO_CADENCE Kconfig option. It uses generic GPIO infrastructure and works as an interrupt controller. At the moment it only supports level sensitive irqs. Signed-off-by: NJan Kotas <jank@cadence.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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PIOBU pins do not lose their voltage during Backup/Self-refresh. This patch adds a simple GPIO controller for them and a maintainer for the driver. This driver adds support for using the pins as GPIO offering the possibility to read/set the voltage. Signed-off-by: NAndrei Stefanescu <andrei.stefanescu@microchip.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 17 12月, 2018 1 次提交
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由 Marek Vasut 提交于
Select REGMAP_I2C in Kconfig, since the driver now depends on regmap and this was missing, thus breaking build on various systems. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 07 12月, 2018 1 次提交
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由 Vladimir Zapolskiy 提交于
The change adds support of LPC18xx/LPC43xx GPIO pin interrupt controller block within SoC GPIO controller. The new interrupt controller driver allows to configure and capture edge or level interrupts on 8 arbitrary selectedinput GPIO pins, and lift the signals to be reported as NVIC rising edge interrupts. Configuration of a particular GPIO pin to serve as interrupt and its mapping to an interrupt on NVIC is done by SCU pin controller, for more details see description of 'nxp,gpio-pin-interrupt' device tree property of a GPIO pin [1]. From LPC18xx and LPC43xx User Manuals the GPIO controller consists of the following blocks: * GPIO pin interrupt block at 0x40087000, this change adds its support, * GPIO GROUP0 interrupt block at 0x40088000, * GPIO GROUP1 interrupt block at 0x40089000, * GPIO port block at 0x400F4000, it is supported by the original driver. While all 4 sub-controller blocks have their own I/O addresses, moreover all 3 interrupt blocks are APB0 peripherals and high-speed GPIO block is an AHB slave, according to the hardware manual the GPIO controller is seen as a single block, and 4 sub-controllers have the shared reset signal RGU #28 and clock to register interface CLK_CPU_GPIO on CCU1. Likely support of two GPIO group interrupt blocks won't be added in short term, because the mechanism to mask several interrupt sources is not well defined. [1] Documentation/devicetree/bindings/pinctrl/nxp,lpc1850-scu.txt Signed-off-by: NVladimir Zapolskiy <vz@mleia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 15 10月, 2018 1 次提交
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由 Randy Dunlap 提交于
Fix kconfig warning for GPIO_SNPS_CREG: WARNING: unmet direct dependencies detected for OF_GPIO Depends on [n]: GPIOLIB [=y] && OF [=n] && HAS_IOMEM [=y] Selected by [y]: - GPIO_SNPS_CREG [=y] && GPIOLIB [=y] && HAS_IOMEM [=y] && (ARC || COMPILE_TEST [=y]) Drivers in drivers/gpio/Kconfig depend on OF_GPIO, not select it. This prevents attempting to build when OF is not enabled. Signed-off-by: NRandy Dunlap <rdunlap@infradead.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 10 10月, 2018 1 次提交
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由 Eugeniy Paltsev 提交于
Add single-register MMIO GPIO driver for complex cases where only several fields in register belong to GPIO lines and each GPIO line owns a field with different length and on/off value. Such CREG GPIOs are used in Synopsys AXS10x and HSDK boards. Signed-off-by: NEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 28 9月, 2018 1 次提交
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由 Uwe Kleine-König 提交于
This driver controls a SIOX device that provides 20 I/O lines. The first twelve are fixed inputs, the remaining eight are outputs. Acked-by: NGavin Schenk <g.schenk@eckelmann.de> Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 29 8月, 2018 3 次提交
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由 Paul Cercueil 提交于
The pinctrl-ingenic driver is now handling the GPIO chips directly. Signed-off-by: NPaul Cercueil <paul@crapouillou.net> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
We can quite easily switch banks/ports A and B to use GPIOLIB_IRQCHIP which is code that will be more careful about handling interrupt descriptors and use a proper irqdomain for translating the IRQs. This cuts down some code in favor of using the implementation inside gpiolib. Acked-by: NAlexander Sverdlin <alexander.sverdlin@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
Instead of open coding logic for reading and writing GPIO lines, use the generic GPIO library. Also switch to using the spinlock from the generic GPIO to protect the registers. Cc: linux-snps-arc@lists.infradead.org Acked-by: NChristian Ruppert <christian.ruppert@alitech.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 11 8月, 2018 1 次提交
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由 Leonid Bloch 提交于
This was tested on actual hardware and found to work fine, but currently the official specifications of this chip could not be obtained to confirm the numbers. Signed-off-by: NLeonid Bloch <lbloch@janustech.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 13 7月, 2018 1 次提交
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由 Arnd Bergmann 提交于
Compile-testing the driver fails unless OF_GPIO is enabled: drivers/gpio/gpio-mt7621.c: In function 'mediatek_gpio_bank_probe': drivers/gpio/gpio-mt7621.c:228:10: error: 'struct gpio_chip' has no member named 'of_node' Fixes: 4ba9c3af ("gpio: mt7621: Add a driver for MT7621") Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 09 7月, 2018 1 次提交
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由 Sergio Paracuellos 提交于
Add driver support for gpio of MT7621 SoC. Signed-off-by: NSergio Paracuellos <sergio.paracuellos@gmail.com> Reviewed-by: NNeilBrown <neil@brown.name> [Switched wording WIDTH to STRIDE] Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 05 6月, 2018 1 次提交
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由 Richard Fitzgerald 提交于
This adds support for the GPIOs on Cirrus Logic Madera class codecs. Any pins not used for special functions (see the pinctrl driver) can be used as general single-bit input or output lines. The number of available GPIOs varies between codecs. Note that this is part of a composite MFD for these codecs and can only be used with the corresponding MFD and other child drivers on those silicon. The GPIO block on these codecs does not exist indepedently of the rest of the MFD. Signed-off-by: NNariman Poushin <nariman@opensource.cirrus.com> Signed-off-by: NRichard Fitzgerald <rf@opensource.cirrus.com> Signed-off-by: NCharles Keepax <ckeepax@opensource.cirrus.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NLee Jones <lee.jones@linaro.org>
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- 23 5月, 2018 1 次提交
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由 Laura Abbott 提交于
The new challenge is to remove VLAs from the kernel (see https://lkml.org/lkml/2018/3/7/621) to eventually turn on -Wvla. Using a kmalloc array is the easy way to fix this but kmalloc is still more expensive than stack allocation. Introduce a fast path with a fixed size stack array to cover most chip with gpios below some fixed amount. The slow path dynamically allocates an array to cover those chips with a large number of gpios. Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NPhil Reid <preid@electromag.com.au> Reviewed-and-tested-by: NLukas Wunner <lukas@wunner.de> Signed-off-by: NLukas Wunner <lukas@wunner.de> Signed-off-by: NLaura Abbott <labbott@redhat.com> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 27 3月, 2018 2 次提交
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由 Baolin Wang 提交于
The Spreadtrum PMIC EIC controller contains only one bank of debounce EIC, and this bank contains 16 EICs. Each EIC can only be used as input mode, as well as supporting the debounce and the capability to trigger interrupts when detecting input signals. Signed-off-by: NBaolin Wang <baolin.wang@linaro.org> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Baolin Wang 提交于
The Spreadtrum digital-chip EIC controller has 4 sub-modules: debounce EIC, latch EIC, async EIC and sync EIC, and each sub-module can has multiple banks and each bank contains 8 EICs. Each EIC can only be used as input mode, and has the capability to trigger interrupts when detecting input signals. Signed-off-by: NBaolin Wang <baolin.wang@linaro.org> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 26 3月, 2018 1 次提交
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由 Arnd Bergmann 提交于
The cris architecture is getting removed, so we no longer need the etraxfs driver. Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 02 3月, 2018 3 次提交
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由 Baruch Siach 提交于
Commit 7ed91505 (gpio: raspberrypi-ext: fix firmware dependency) fixed the Kconfig dependency to ensure that gpio-raspberrypi-exp is not built-in when the firmware is a module. But the Kconfig syntax for doing so is cryptic. Add a comment to make it a little easier. Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: NBaruch Siach <baruch@tkos.co.il> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Baolin Wang 提交于
The Spreadtrum SC9860 platform GPIO controller contains 16 groups and each group contains 16 GPIOs. Each GPIO can set input/output and has the interrupt capability. Signed-off-by: NBaolin Wang <baolin.wang@linaro.org> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Arnd Bergmann 提交于
When the firmware driver is a loadable module, the gpio driver cannot be built-in: drivers/gpio/gpio-raspberrypi-exp.o: In function `rpi_exp_gpio_set': gpio-raspberrypi-exp.c:(.text+0xb4): undefined reference to `rpi_firmware_property' drivers/gpio/gpio-raspberrypi-exp.o: In function `rpi_exp_gpio_get': gpio-raspberrypi-exp.c:(.text+0x1ec): undefined reference to `rpi_firmware_property' drivers/gpio/gpio-raspberrypi-exp.o: In function `rpi_exp_gpio_get_direction': gpio-raspberrypi-exp.c:(.text+0x360): undefined reference to `rpi_firmware_property' drivers/gpio/gpio-raspberrypi-exp.o: In function `rpi_exp_gpio_get_polarity': gpio-raspberrypi-exp.c:(.text+0x4d4): undefined reference to `rpi_firmware_property' drivers/gpio/gpio-raspberrypi-exp.o: In function `rpi_exp_gpio_dir_out': gpio-raspberrypi-exp.c:(.text+0x670): undefined reference to `rpi_firmware_property' drivers/gpio/gpio-raspberrypi-exp.o:gpio-raspberrypi-exp.c:(.text+0x7fc): more undefined references to `rpi_firmware_property' follow drivers/gpio/gpio-raspberrypi-exp.o: In function `rpi_exp_gpio_dir_in': drivers/gpio/gpio-raspberrypi-exp.o: In function `rpi_exp_gpio_probe': gpio-raspberrypi-exp.c:(.text+0x93c): undefined reference to `rpi_firmware_get' We already have a Kconfig dependency for it, but when compile-testing, it is disregarded. This changes the dependency so that compile-testing is only done when the firmware driver is completely disabled. Fixes: a98d90e7 ("gpio: raspberrypi-exp: Driver for RPi3 GPIO expander via mailbox service") Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 01 3月, 2018 1 次提交
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由 James Hogan 提交于
Now that arch/metag/ has been removed, along with TZ1090 SoC support, remove the TZ1090 GPIO drivers. They are of no value without the architecture and SoC platform code. Signed-off-by: NJames Hogan <jhogan@kernel.org> Cc: linux-gpio@vger.kernel.org Cc: linux-metag@vger.kernel.org Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 26 2月, 2018 1 次提交
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由 Maciej S. Szmigiero 提交于
This reverts commit 92a8046c. Now that the patch series changing ISA_BUS_API dependency to selection was merged this reversion will do the same for gpio-winbond driver to make it consistent with other ISA bus gpio drivers. Signed-off-by: NMaciej S. Szmigiero <mail@maciej.szmigiero.name> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 22 2月, 2018 3 次提交
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由 William Breathitt Gray 提交于
The ISA_BUS_API Kconfig option enables the compilation of the ISA bus driver. The ISA bus driver does not perform any hardware interaction, and is instead just a thin layer of software abstraction to eliminate boilerplate code common to ISA-style device drivers. Since ISA_BUS_API has no dependencies and does not jeopardize the integrity of the system when enabled, drivers should select it when the ISA bus driver functionality is needed. Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: NWilliam Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Jonathan Neuschäfer 提交于
The Nintendo Wii's chipset (called "Hollywood") has a GPIO controller that supports a configurable number of pins (up to 32), interrupts, and some special mechanisms to share the controller between the system's security processor (an ARM926) and the PowerPC CPU. Pin multiplexing is not supported. This patch adds a basic driver for this GPIO controller. Interrupt support will come in a later patch. This patch is based on code developed by Albert Herranz and the GameCube Linux Team, file arch/powerpc/platforms/embedded6xx/hlwd-gpio.c, available at https://github.com/DeltaResero/GC-Wii-Linux-Kernels, but has grown quite dissimilar. v3: - Do some style cleanups, as suggest by Andy Shevchenko v2: - Change hlwd_gpio_driver.driver.name to "gpio-hlwd" to match the filename (was "hlwd_gpio") - Remove unnecessary include of linux/of_gpio.h, as suggested by Linus Walleij. - Add struct device pointer to context struct to make it possible to use dev_info(hlwd->dev, "..."), as suggested by Linus Walleij - Use the GPIO_GENERIC library to reduce code size, as suggested by Linus Walleij - Use iowrite32be instead of __raw_writel for big-endian MMIO access, as suggested by Linus Walleij - Remove commit message paragraph suggesting to diff against the original driver, because it's so different now Signed-off-by: NJonathan Neuschäfer <j.neuschaefer@gmx.net> Cc: Albert Herranz <albert_herranz@yahoo.es> Reviewed-by: NSegher Boessenkool <segher@kernel.crashing.org> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Dave Stevenson 提交于
Pi3 and Compute Module 3 have a GPIO expander that the VPU communicates with. There is a mailbox service that now allows control of this expander, so add a kernel driver that can make use of it. Reviewed-by: NStefan Wahren <stefan.wahren@i2se.com> Signed-off-by: NDave Stevenson <dave.stevenson@raspberrypi.org> Signed-off-by: NBaruch Siach <baruch@tkos.co.il> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 11 1月, 2018 1 次提交
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由 Arnd Bergmann 提交于
The newly added GPIO driver for winbond chipsets causes a circular dependency warning in Kconfig: drivers/gpio/Kconfig:13:error: recursive dependency detected! drivers/gpio/Kconfig:13: symbol GPIOLIB is selected by STX104 drivers/iio/adc/Kconfig:699: symbol STX104 depends on ISA_BUS_API arch/Kconfig:830: symbol ISA_BUS_API is selected by GPIO_WINBOND drivers/gpio/Kconfig:701: symbol GPIO_WINBOND depends on GPIOLIB The underlying problem is that ISA_BUS_API is not meant to be selected by device drivers, instead it is provided by the architectures that support ISA add-on card devices, or in case of x86 have this explicitly enabled. This particular driver appears to be different from the other ISA_BUS_API based drivers, in that it is not normally an add-on card (ISA or PC104) but instead is an LPC-attached component on the mainboard. We already support other functionality provided by this chip, at least drivers/watchdog/w83627hf_wdt.c and drivers/hwmon/w83627ehf.c, plus there is a discovery function for this hardware in drivers/parport/parport_pc.c. If we want to use this driver without having to enable CONFIG_EXPERT, it might be better to not use the isa_bus_type for it, but rather turn it into a platform_driver, acpi_driver or add an MFD for it that is shared with the wdt and hwmon portions and does the probing. For now, this patch fixes the dependency by changing 'select' into 'depends on'. Cc: William Breathitt Gray <vilhelm.gray@gmail.com> Cc: Guenter Roeck <linux@roeck-us.net> Cc: Maciej S. Szmigiero <mail@maciej.szmigiero.name> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Fixes: a0d65009 ("gpio: winbond: Add driver") Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 10 1月, 2018 1 次提交
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由 William Breathitt Gray 提交于
The ACCES PCIe-IDIO-24 device provides 56 lines of digital I/O (24 lines of optically-isolated non-polarized digital inputs for AC and DC control signals, 24 lines of isolated solid state FET digital outputs, and 8 non-isolated TTL/CMOS compatible programmable I/O). An interrupt is generated when any of the inputs change state (low to high or high to low). Input filter control is not supported by this driver, and input filters are deactivated by this driver. These devices are capable of get_multiple and set_multiple functionality, but these functions have not yet been implemented for this driver. Change-Of-State (COS) detection functionality may be configured to fire interrupts on exclusively rising/falling edges, but this driver currently only implements COS detection for either both edges or none. Signed-off-by: NWilliam Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 09 1月, 2018 1 次提交
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由 Maciej S. Szmigiero 提交于
This commit adds GPIO driver for Winbond Super I/Os. Currently, only W83627UHG model (also known as Nuvoton NCT6627UD) is supported but in the future a support for other Winbond models, too, can be added to the driver. A module parameter "gpios" sets a bitmask of GPIO ports to enable (bit 0 is GPIO1, bit 1 is GPIO2, etc.). One should be careful which ports one tinkers with since some might be managed by the firmware (for functions like powering on and off, sleeping, BIOS recovery, etc.) and some of GPIO port pins are physically shared with other devices included in the Super I/O chip. Signed-off-by: NMaciej S. Szmigiero <mail@maciej.szmigiero.name> Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 07 12月, 2017 1 次提交
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由 Quentin Schulz 提交于
To prepare the driver for the upcoming pinctrl features, move the GPIO driver AXP209 from GPIO to pinctrl subsystem. Signed-off-by: NQuentin Schulz <quentin.schulz@free-electrons.com> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Acked-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 08 11月, 2017 1 次提交
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由 Thierry Reding 提交于
Tegra186 has two GPIO controllers that are largely register compatible between one another but are completely different from the controller found on earlier generations. Signed-off-by: NThierry Reding <treding@nvidia.com> Acked-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 31 10月, 2017 2 次提交
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由 Ard Biesheuvel 提交于
In order to reuse this driver for the Socionext Synquacer SC2A11 SoC, which inherited this IP from Fujitsu, remove the ARCH_MB86S7X Kconfig dependency, and revert the changes that prevent it from being built as a module. This reverts commits d65aa4b6 and d5610e51. Cc: Geliang Tang <geliangtang@gmail.com> Cc: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: NArd Biesheuvel <ard.biesheuvel@linaro.org> [Folded in module_platform_driver() fixup] Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Doug Berger 提交于
The GPIOLIB IRQ chip helpers were very appealing, but badly broke the 1:1 mapping between a GPIO controller's device_node and its interrupt domain. When another device-tree node references a GPIO device as its interrupt parent, the irq_create_of_mapping() function looks for the irq domain of the GPIO device and since all bank irq domains reference the same GPIO device node it always resolves to the irq domain of the first bank regardless of which bank the number of the GPIO should resolve. This domain can only map hwirq numbers 0-31 so interrupts on GPIO above that can't be mapped by the device-tree. This commit effectively reverts the patch from Gregory Fong [1] that was accepted upstream and replaces it with a consolidated irq domain implementation with one larger interrupt domain per GPIO controller instance spanning multiple GPIO banks based on an earlier patch [2] also submitted by Gregory Fong. [1] https://patchwork.kernel.org/patch/6921561/ [2] https://patchwork.kernel.org/patch/6347811/ Fixes: 19a7b694 ("gpio: brcmstb: Add interrupt and wakeup source support") Signed-off-by: NDoug Berger <opendmb@gmail.com> Reviewed-by: NGregory Fong <gregory.0xf0@gmail.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 23 10月, 2017 1 次提交
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由 Masahiro Yamada 提交于
This GPIO controller is used on UniPhier SoC family. It also serves as an interrupt controller, but interrupt signals are just delivered to the parent irqchip without any latching or OR'ing. This type of hardware can be well described with hierarchy IRQ domain. One unfortunate thing for this device is that the interrupt mapping to the interrupt parent is not contiguous. I asked how DT can describe interrupt mapping between two irqchips [1], but I could not find a good solution (at least in the framework level). In fact, irqchip drivers using hierarchy domain generally hard-code the DT binding of their parent. After tackling on several approaches such as hard-code of hwirqs, irq_domain_push_irq(), I ended up with a vendor specific property. If we come up with a good idea to support this in the framework, we can migrate over to it, but we can live with a driver-level solution for now. [1] https://lkml.org/lkml/2017/7/6/758Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 20 10月, 2017 1 次提交
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由 Lukas Wunner 提交于
The driver was developed for and tested with the MAX31913 built into the Revolution Pi by KUNBUS, but should work with all members of the MAX3191x family: MAX31910: low power MAX31911: LED drivers MAX31912: LED drivers + 2nd voltage monitor + low power MAX31913: LED drivers + 2nd voltage monitor MAX31953: LED drivers + 2nd voltage monitor + isolation MAX31963: LED drivers + 2nd voltage monitor + isolation + buck regulator Cc: Mathias Duckeck <m.duckeck@kunbus.de> Signed-off-by: NLukas Wunner <lukas@wunner.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 17 10月, 2017 1 次提交
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由 Linus Walleij 提交于
The SX150X driver was moved over to pin control a while back. The GPIO Kconfig symbol creates a circular dependency since it requires GPIOLIB and the pin control driver selects GPIOLIB so get rid of the old annoying Kconfig option. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 19 9月, 2017 1 次提交
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由 Masahiro Yamada 提交于
IRQ_DOMAIN_HIERARCHY is not user-configurable, but supposed to be selected by drivers that need IRQ domain hierarchy support. GPIO_THUNDERX is the only user of "depends on IRQ_DOMAIN_HIERARCHY". This means, we can not enable GPIO_THUNDERX unless other drivers select IRQ_DOMAIN_HIERARCHY elsewhere. This is odd. Flip the logic. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Acked-by: NDavid Daney <david.daney@cavium.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 22 8月, 2017 1 次提交
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由 David Daney 提交于
Cavium ThunderX and OCTEON-TX are arm64 based SoCs. Add driver for the on-chip GPIO pins. Signed-off-by: NDavid Daney <david.daney@cavium.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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