1. 16 5月, 2015 1 次提交
  2. 07 5月, 2015 1 次提交
  3. 06 4月, 2015 1 次提交
    • B
      mtd: m25p80: bind to "nor-jedec" ID, for auto-detection · 1103b851
      Brian Norris 提交于
      Use the new 'nor-jedec' binding to provide automatic detection of flash
      that use the 0x9F READ ID opcode. This can help for use cases where
      platforms just specify compatibility with "m25p80", and then see
      messages like this:
      
        m25p80 spi32766.0: found s25fl256s1, expected m25p80
      
      Instead, they can just specify the generic string and see this:
      
        m25p80 spi32766.0: s25fl256s1 (32768 Kbytes)
      
      Also, update the language about m25p_ids[] to straighten out the
      expectations here. We should no longer need to continuously grow the
      m25p_ids[] table, and in fact, we might want to start removing entries
      which are not used in device trees so far, so we can just default to
      auto-detection as much as possible in the future.
      Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
      Cc: Rafał Miłecki <zajec5@gmail.com>
      1103b851
  4. 01 12月, 2014 1 次提交
  5. 26 11月, 2014 2 次提交
  6. 05 11月, 2014 2 次提交
  7. 22 10月, 2014 1 次提交
    • B
      mtd: m25p80,spi-nor: Fix module aliases for m25p80 · a5b7616c
      Ben Hutchings 提交于
      m25p80's device ID table is now spi_nor_ids, defined in spi-nor.  The
      MODULE_DEVICE_TABLE() macro doesn't work with extern definitions, but
      its use was also removed at the same time.  Now if m25p80 is built as
      a module it doesn't get the necessary aliases to be loaded
      automatically.
      
      A clean solution to this will involve defining the list of device
      IDs in spi-nor.h and removing struct spi_device_id from the spi-nor
      API, but this is quite a large change.
      
      As a quick fix suitable for stable, copy the device IDs back into
      m25p80.
      
      Fixes: 03e296f6 ("mtd: m25p80: use the SPI nor framework")
      Cc: <stable@vger.kernel.org> # 3.16.x: 32f1b7c8: mtd: move support for struct flash_platform_data into m25p80
      Cc: <stable@vger.kernel.org> # 3.16.x: 90e55b38: mtd: m25p80: get rid of spi_get_device_id
      Cc: <stable@vger.kernel.org> # 3.16.x: 70f3ce05: mtd: spi-nor: make spi_nor_scan() take a chip type name, not spi_device_id
      Cc: <stable@vger.kernel.org> # 3.16.x
      Signed-off-by: NBen Hutchings <ben@decadent.org.uk>
      Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
      a5b7616c
  8. 18 10月, 2014 2 次提交
  9. 29 9月, 2014 1 次提交
  10. 13 5月, 2014 1 次提交
  11. 15 4月, 2014 2 次提交
  12. 11 3月, 2014 6 次提交
  13. 28 1月, 2014 2 次提交
  14. 21 1月, 2014 1 次提交
    • B
      mtd: m25p80: assign default read command · 99ed1a16
      Brian Norris 提交于
      In the following commit (in -next):
      
          commit 8552b439
          drivers: mtd: m25p80: convert "bool" read check into an enum
      
      We converted the boolean 'fast_read' property to become an enum
      'flash_read', but at the same time, we changed the conditional path so
      that it doesn't choose a default value in some cases (technically, we
      choose the correct default simply by virtue of devm_kzalloc(), which
      zeroes this out to be a NORMAL read operation, but still...).
      
      Fix this by setting a default for the 'else' clause.
      Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
      Cc: Sourav Poddar <sourav.poddar@ti.com>
      Acked-by: NMarek Vasut <marex@denx.de>
      99ed1a16
  15. 17 1月, 2014 1 次提交
  16. 04 1月, 2014 3 次提交
  17. 07 11月, 2013 8 次提交
  18. 28 10月, 2013 1 次提交
  19. 27 9月, 2013 1 次提交
    • E
      mtd: m25p80: Fix 4 byte addressing mode for Micron devices. · 2b468ef0
      Elie De Brauwer 提交于
      According to the datasheet for Micron n25q256a (N25Q256A13ESF40F) 4-byte
      addressing mode should be entered as follows:
      
      <quote>
      To enter or exit the 4-byte address mode, the WRITE ENABLE command
      must be executed to set the write enable latch bit to 1. (Note: The
      WRITE ENABLE command must NOT be executed on the N25Q256A83ESF40x and
      N25Q256A83E1240x devices.) S# must be driven LOW. The effect of the
      command is immediate; after the command has been executed, the write
      enable latch bit is cleared to 0.
      </quote>
      
      Micron's portable way to perform this for all types of Micron flash
      is to first issue a write enable, then switch the addressing mode
      followed by a write disable to avoid leaving the flash in a write-
      able state.
      Signed-off-by: NElie De Brauwer <eliedebrauwer@email.com>
      [Brian: reworked a bit]
      Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
      Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
      2b468ef0
  20. 31 8月, 2013 2 次提交