Considering the header mess ATM, it is not always possible to include
the correct header files within board code. Let's keep this simple:

  <mach/pxa25x.h>  - for pxa25x based platforms
  <mach/pxa27x.h>  - for pxa27x based platforms
  <mach/pxa300.h>  - for pxa300 based platforms
  <mach/pxa320.h>  - for pxa320 based platforms
  <mach/pxa930.h>  - for pxa930 based platforms

NOTE:

1. one header one board file, they are not compatible (i.e. they have
   conflicting definitions which won't compile if included together).

2. Unless strictly necessary, the following header files are considered
   to be SoC files use _only_, and is not recommended to be included in
   board code:

    <mach/hardware.h>
    <mach/pxa-regs.h>
    <mach/pxa2xx-regs.h>
    <mach/pxa3xx-regs.h>
    <mach/mfp.h>
    <mach/mfp-pxa2xx.h>
    <mach/mfp-pxa25x.h>
    <mach/mfp-pxa27x.h>
    <mach/mfp-pxa3xx.h>
    <mach/mfp-pxa300.h>
    <mach/mfp-pxa320.h>
    <mach/mfp-pxa930.h>
Signed-off-by: NEric Miao <eric.miao@marvell.com>

The only exclusive definitions are SSCR0_SCR and SSCR0_SerClkDiv(), loosen
that exclusive #ifdef .. #else .. #endif to allow other definitions to be
visible when slected multiple processors. This helps to pass the building
of pxa-ssp.c.
Signed-off-by: NEric Miao <eric.miao@marvell.com>

This just leaves include/asm-arm/plat-* to deal with.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Also add some white space for a little clarity.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: NEric Miao <eric.miao@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Fixes a sequencing bug in spi driver pxa2xx_spi.c in which the chip select
for a transfer may be asserted before the clock polarity is set on the
interface.  As a result of this bug, the clock signal may have the wrong
polarity at transfer start, so it may need to make an extra half transition
before the intended clock/data signals begin.  (This probably means all
transfers are one bit out of sequence.)

This only occurs on the first transfer following a change in clock polarity
in systems using more than one more than one such polarity.  The fix
assures that the clock mode is properly set before asserting chip select.

This bug was introduced in a patch merged on 2006/12/10, kernel 2.6.20.
The patch defines an additional bit in: include/asm-arm/arch-pxa/regs-ssp.h
for 2.6.25 and newer kernels but this addition must be made in:
include/asm-arm/arch-pxa/pxa-regs.h for kernels between 2.6.20 and 2.6.24,
inclusive
Signed-off-by: NNed Forrester <nforrester@whoi.edu>
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Cc: Russell King <rmk@arm.linux.org.uk>
Cc: <stable@kernel.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

1. change SSP register definitions from absolute virtual addresses to
   offsets

2. use __raw_writel()/__raw_readl() for functions of ssp_xxxx()
Signed-off-by: Neric miao <eric.miao@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: Neric miao <eric.miao@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>